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ARM: dts: msm: add CSOT with SPR config

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Adds new variant of the CSOT command mode panel with SPR enabled
on AP side, as opposed to DDIC side.

Change-Id: I94cfc2150e7b714822349a5ff9392351e2e22356
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
This commit is contained in:
Kirill Shpin
2024-02-27 14:56:58 -08:00
parent c8fc77e24c
commit 310142dab6
6 changed files with 203 additions and 5 deletions
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132
display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi Normal file
View File

@@ -0,0 +1,132 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&mdss_mdp {
dsi_nt37801_amoled_cmd_spr: qcom,mdss_dsi_nt37801_wqhd_plus_cmd_spr {
qcom,mdss-dsi-panel-name =
"nt37801 amoled cmd mode dsi csot panel with DSC and AP SPR";
qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
qcom,mdss-dsi-panel-physical-type = "oled";
qcom,mdss-dsi-virtual-channel-id = <0>;
qcom,mdss-dsi-stream = <0>;
qcom,mdss-dsi-bpp = <24>;
qcom,mdss-dsi-color-order = "rgb_swap_rgb";
qcom,mdss-dsi-underflow-color = <0xff>;
qcom,mdss-dsi-border-color = <0>;
qcom,dsi-ctrl-num = <0>;
qcom,dsi-phy-num = <0>;
qcom,dsi-sec-ctrl-num = <1>;
qcom,dsi-sec-phy-num = <1>;
qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
qcom,mdss-dsi-lane-map = "lane_map_0123";
qcom,mdss-dsi-bllp-eof-power-mode;
qcom,mdss-dsi-bllp-power-mode;
qcom,mdss-dsi-lane-0-state;
qcom,mdss-dsi-lane-1-state;
qcom,mdss-dsi-lane-2-state;
qcom,mdss-dsi-lane-3-state;
qcom,mdss-dsi-dma-trigger = "trigger_sw";
qcom,mdss-dsi-mdp-trigger = "none";
qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
qcom,mdss-dsi-te-pin-select = <1>;
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
qcom,spr-pack-type = "pentile";
qcom,mdss-dsi-display-timings {
timing@0 {
cell-index = <0>;
qcom,mdss-dsi-panel-framerate = <120>;
qcom,mdss-dsi-panel-width = <1440>;
qcom,mdss-dsi-panel-height = <3200>;
qcom,mdss-dsi-h-front-porch = <20>;
qcom,mdss-dsi-h-back-porch = <20>;
qcom,mdss-dsi-h-pulse-width = <4>;
qcom,mdss-dsi-h-sync-skew = <0>;
qcom,mdss-dsi-v-back-porch = <18>;
qcom,mdss-dsi-v-front-porch = <20>;
qcom,mdss-dsi-v-pulse-width = <2>;
qcom,mdss-dsi-h-left-border = <0>;
qcom,mdss-dsi-h-right-border = <0>;
qcom,mdss-dsi-v-top-border = <0>;
qcom,mdss-dsi-v-bottom-border = <0>;
qcom,mdss-dsi-panel-jitter = <0x4 0x1>;
qcom,mdss-dsc-version = <0x12>;
qcom,src-chroma-format = <1>;
qcom,mdss-dsi-on-command = [
39 01 00 00 00 00 06 F0 55 AA 52 08 01
39 01 00 00 00 00 02 6F 01
39 01 00 00 00 00 04 C5 0B 0B 0B
39 01 00 00 00 00 05 FF AA 55 A5 80
39 01 00 00 00 00 02 6F 02
39 01 00 00 00 00 02 F5 10
39 01 00 00 00 00 02 6F 1B
39 01 00 00 00 00 02 F4 55
39 01 00 00 00 00 02 6F 18
39 01 00 00 00 00 02 F8 19
39 01 00 00 00 00 02 6F 0F
39 01 00 00 00 00 02 FC 00
39 01 00 00 00 00 05 2A 00 00 05 9F
39 01 00 00 00 00 05 2B 00 00 0C 7F
39 01 00 00 00 00 03 90 03 03
39 01 00 00 00 00 13 91 A0 F0 00 32 D1
00 01 E2 01 9B 00 3C 02 20 08 A4 11
50
39 01 00 00 00 00 02 6F 06
39 01 00 00 00 00 02 F3 DC
39 01 00 00 00 00 02 26 00
39 01 00 00 00 00 02 35 00
39 01 00 00 00 00 05 3B 00 18 00 10
39 01 00 00 00 00 02 53 20
39 01 00 00 00 00 07 51 07 FF 07 FF 0F FF
39 01 00 00 00 00 02 5A 01
39 01 00 00 00 00 02 5F 00
39 01 00 00 00 00 02 9C 01
05 01 00 00 00 00 01 2C
39 01 00 00 00 00 02 2F 00
39 01 00 00 00 00 06 F0 55 AA 52 08 03
39 01 00 00 00 00 02 6F 08
39 01 00 00 00 00 02 DE 00
39 01 00 00 00 00 02 6F 09
39 01 00 00 00 00 07 DE 10 34 25 30 14 25
39 01 00 00 00 00 05 FF AA 55 A5 81
39 01 00 00 00 00 02 6F 1D
39 01 00 00 00 00 02 FB 6F
39 01 00 00 00 00 06 F0 55 AA 52 08 07
39 01 00 00 00 00 02 B0 24
39 01 00 00 00 00 02 03 10
05 01 00 00 78 00 01 11
05 01 00 00 14 00 01 29
];
qcom,mdss-dsi-off-command = [
05 01 00 00 14 00 02 28 00
05 01 00 00 78 00 02 10 00];
qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
qcom,mdss-dsi-timing-switch-command-state =
"dsi_lp_mode";
qcom,mdss-dsi-h-sync-pulse = <0>;
qcom,compression-mode = "dsc";
qcom,mdss-dsc-slice-height = <40>;
qcom,mdss-dsc-slice-width = <720>;
qcom,mdss-dsc-slice-per-pkt = <1>;
qcom,mdss-dsc-bit-per-component = <8>;
qcom,mdss-dsc-bit-per-pixel = <8>;
qcom,mdss-dsc-block-prediction-enable;
};
};
};
};

21
display/sun-sde-display-cdp.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include "sun-sde-display.dtsi"
@@ -77,6 +77,19 @@
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_cmd_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
};
&dsi_vtdr6130_amoled_120hz_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -185,8 +198,9 @@
panel = <&dsi_nt37801_amoled_cmd
&dsi_nt37801_amoled_cmd_cphy
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_dsc_10b_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_dsc_10b_video>;
&dsi_nt37801_amoled_cmd_spr>;
};
};
@@ -196,6 +210,7 @@
panel = <&dsi_nt37801_amoled_cmd
&dsi_nt37801_amoled_cmd_cphy
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_video_cphy>;
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_cmd_spr>;
};
};

21
display/sun-sde-display-common.dtsi
View File

@@ -8,6 +8,7 @@
#include "dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi"
#include "dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi"
#include "dsi-panel-nt37801-dsc-10bit-video.dtsi"
#include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-spr.dtsi"
#include "dsi-panel-sharp-dsc-4k-cmd.dtsi"
#include "dsi-panel-sharp-dsc-4k-video.dtsi"
#include "dsi-panel-sim-cmd-au.dtsi"
@@ -519,6 +520,26 @@
};
};
&dsi_nt37801_amoled_cmd_spr {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
qcom,mdss-dsi-panel-status-value = <0x9c>;
qcom,mdss-dsi-panel-status-read-length = <1>;
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-phy-timings = [00 28 0a 0b 1b 1a 0a
0b 0a 02 04 00 21 0f];
qcom,display-topology = <2 2 1>;
qcom,default-topology-index = <0>;
};
};
};
&dsi_sharp_4k_dsc_cmd {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";

16
display/sun-sde-display-mtp.dtsi
View File

@@ -71,6 +71,16 @@
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_cmd_spr {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_vtdr6130_amoled_120hz_video {
qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
@@ -179,7 +189,8 @@
&dsi_nt37801_amoled_cmd_cphy
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_dsc_10b_video>;
&dsi_nt37801_amoled_dsc_10b_video
&dsi_nt37801_amoled_cmd_spr>;
};
};
@@ -187,5 +198,6 @@
qcom,display-panels = <&dsi_nt37801_amoled_cmd
&dsi_nt37801_amoled_cmd_cphy
&dsi_nt37801_amoled_video
&dsi_nt37801_amoled_video_cphy>;
&dsi_nt37801_amoled_video_cphy
&dsi_nt37801_amoled_cmd_spr>;
};

9
display/trustedvm-sun-sde-display-cdp.dtsi
View File

@@ -54,6 +54,15 @@
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_cmd_spr {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_vtdr6130_amoled_120hz_video {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;

9
display/trustedvm-sun-sde-display-mtp.dtsi
View File

@@ -23,6 +23,15 @@
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_nt37801_amoled_cmd_spr {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;
qcom,mdss-dsi-bl-max-level = <4095>;
qcom,mdss-brightness-max-level = <8191>;
qcom,mdss-dsi-bl-inverted-dbv;
qcom,platform-reset-gpio = <&tlmm 98 0>;
};
&dsi_sim_panel_au {
qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
qcom,mdss-dsi-bl-min-level = <10>;