Currently, charger FW configures and enables ship mode in parallel with
shutdown activity. This can cause a race condition leaving the device in
a bad state if the device is powering off while SW is still issuing SPMI
writes.
Add the battery charger "qcom,ship-mode-immediate" property on Sun
platforms so that ship mode will be configured immediately by charger FW
after user sets ship_mode_en.
Change-Id: I55a78c7b5c59b8b82519713fb4267d081c54a92f
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Disable tpdm-sdcc2 on sun, because kernel can't enable some clocks of it.
Change-Id: I5f8a29a6991d1b59e82bce0caf4149f8e9993697
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Add minidump vdeivce in vm-config to support minidump for Sun TUIVM.
Change-Id: I8aed4b1bec0b137bdcf8e103af59eb0cb70b999a
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
Add device tree files to support v6 and v8 power grids
for MTP platform with QMP1000 on Sun SoC.
Change-Id: Ic8636091236e3bcedd5af1fb2c5742371483607d
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Adopt the upstream ufs bus voting implementation using
commit <03ce80a1bb8>
("scsi: ufs: qcom: Add support for scaling interconnects").
With this implementation, the Qualcomm's bus voting parameters
are moved to the driver source code. As a result, remove the bus
voting DT entries here.
Change-Id: I6366fe76fba4022cbd97bb757eaac2183274bcd2
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
has added a devicetree property "iommu-addresses", which
describes to the DMA api what IOVA addresses a device
can/cannot use. So we replace “qcom,iommu-dma-addr-pool”
by “iommu-addresses” since kernel 6.5 to follow upstream.
Change-Id: I9c99fc931fa9a59a472f371bfb59f615f83539f4
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Update pcie phy settings for sun to version 94.
Change-Id: I5af8d79cecba0ee1088f379b0d823f3a841e8420
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
This device is necessary to notify the scheduler about CPU thermal
pressure.
Change-Id: Ibf1e636dfee32ab8b7c3b9202264603d638c577a
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add ftrace_dump_on_oops in kernel cmdline to enable capture
of ftrace in minidump for pineapple/sun SoCs.
Change-Id: I1d07d01dbd5f4240f12eba53a252ec8941262623
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Add mosi, clock gpios and doorbell interrupt for Q2SPI wakeup support
for Sun.
Change-Id: I199a1cd41b8e69799f3fc8cc1caebd67406e8744
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
Fix values for QMP PHY configs according to updates from Hardware
Settings team which allow resolving Host mode enumeration issues for
SuperSpeed devices.
Change-Id: I4ad0ff3df8b8b8588679e93135aaac72c537015c
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
Use upstream compatible device smmu address space DT property
"iommu-addresses" in accordance to FR92369. Replace existing use of
"qcom,iommu-dma-addr-pool" with "iommu-addresses" for dwc3 node in usb0
for describing to the DMA API what IOVA addresses dwc3 cannot use.
Change-Id: Ia18d064649fb86e809023dbd61262c0e026acf73
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
Update tsens controller 1 and controller 3 sensor count and
update sensor id of impacted thermal zones for sun-v2.
Change-Id: I52cf2ecb0445ec9b4d1b2df16c4ea7002fff89eb
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
There are 6 SW DRV IDs supported for display. Update same.
Change-Id: I5a58e7e81884e5201ef218f4418204aeed47e5ac
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Add common iommu group for WCNSS and ADSP for direct
link use case.
Change-Id: I031283713b4f89176d574580f5b11d44f870a0ca
Signed-off-by: Yeshwanth Sriram Guntuka <quic_ysriramg@quicinc.com>
According to the camera team, this is required due to camera hw
architecture changes on sun.
Change-Id: Iaba200c194f9758cd506cd871bd4c4853542c028
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Change compatible of ETM to "arm,coresight-etm4x-sysreg" to use sysreg
access on Sun.
Change-Id: Ie7fbc759a96e0fb4fbe87c7f5467d301cef3405d
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Disable turing dpm1/dpm2 tpdm because some clocks can not be enabled
from kernel side.
Change-Id: I4c51b3dbfdba44f843617e788ccd7c7d559646fc
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Update cpucp device to include reg-names property.
Change-Id: I78d9d386971952511f66f455857adcc8ea9edf58
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
All transferring memory between tvm, oemvm and pvm.
Change-Id: I2016350893bf79cfc09a22741dfa69627c795840
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
