Merge "ARM: dts: msm: Add support of mosi, clk gpios and doorbell interrupt"
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&soc {
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@@ -962,7 +962,8 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg-names = "se_phys";
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interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
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interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>,
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<&tlmm 23 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "se-clk";
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clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
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interconnect-names = "qup-core", "qup-config", "qup-memory";
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@@ -970,6 +971,8 @@
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<&clk_virt MASTER_QUP_CORE_2 &clk_virt SLAVE_QUP_CORE_2>,
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<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_2>,
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<&aggre2_noc MASTER_QUP_2 &mc_virt SLAVE_EBI1>;
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mosi-pin = <&tlmm 21 0>;
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clk-pin = <&tlmm 22 0>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&qupv3_se13_q2spi_mosi_active>, <&qupv3_se13_q2spi_miso_active>,
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<&qupv3_se13_q2spi_clk_active>, <&qupv3_se13_q2spi_doorbell_active>;
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