Commit Graph

1601 Commits

Author SHA1 Message Date
QCTECMDR Service
a00ca72ec4 Merge "ARM: dts: msm: Add boot_config support for Parrot" 2024-08-22 01:51:39 -07:00
QCTECMDR Service
166bd82f88 Merge "ARM: dts: msm: Add CPUIdle and PSCI related devices for tuna" 2024-08-22 01:51:39 -07:00
QCTECMDR Service
72ac5e9ce8 Merge "ARM: dts: msm: Add aliases and tlmm node for sdxkova" 2024-08-22 01:51:39 -07:00
Khaja Hussain Shaik Khaji
e78d9052db ARM: dts: qcom: Add tlmm gpio reserved ranges for sdxkova
Add the TLMM GPIO reserved ranges for the sdxkova platform.
The reserved range is set to <110 6> to ensure proper
allocation and avoid conflicts with other GPIOs.

Change-Id: I6b01f9c6a21f918df078dcbe078be602dd889898
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-08-22 12:01:50 +05:30
QCTECMDR Service
6e47aaccae Merge "ARM: dts: msm: sun: add interconnects for soccp rproc" 2024-08-21 13:47:41 -07:00
Prasanna S
bf34f7e5c8 ARM: dts: msm: Add QUPv3 UART console node for kera
Enable console support on kera.

Change-Id: I5ad3d0c05512b6f49cd67a773e5b2e16f6d1a10d
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
2024-08-21 18:29:56 +05:30
Yogesh Lal
98ebac6b5f ARM: dts: msm: Add aliases and tlmm node for sdxkova
Initial change to add aliases and tlmm.

Change-Id: I3c3b7c5474761b6cadcc1d7781be0f1cb9199108
Signed-off-by: Yogesh Lal <quic_ylal@quicinc.com>
2024-08-21 15:31:22 +05:30
Kalpak Kawadkar
27f3f46701 ARM: dts: msm: Add cambistmclkcc support for Sun v2
Update the compatible string of cambistmclkcc for SUN v2
platform.

Change-Id: I5a984c8ea24308fbe39c4e84e61cc38891e1f7eb
Signed-off-by: Kalpak Kawadkar <quic_kkawadka@quicinc.com>
2024-08-21 14:45:52 +05:30
Patan Saddam
fc55b42d53 ARM: dts: msm: Add adsprpc-mem and adsprpc-mem CMA nodes
Add adsprpc-mem and CMA nodes for tuna target.

Change-Id: I6da8838d50578b4f621bdd2b48215c4ba002ed7b
Signed-off-by: Patan Saddam <quic_psaddam@quicinc.com>
2024-08-21 00:26:25 -07:00
Patan Saddam
f71bb8e08f ARM: dts: msm: Add adsprpc-mem and adsprpc-mem CMA nodes
Add adsprpc-mem and CMA nodes for kera target.

Change-Id: Ic1f0d3962281cb31cbddaeddf53fefa2ae1ef830
Signed-off-by: Patan Saddam <quic_psaddam@quicinc.com>
2024-08-21 00:26:04 -07:00
QCTECMDR Service
b491fa6563 Merge "ARM: dts: msm: pcie: Set ultrashort channel settings sun PCIe" 2024-08-20 03:06:39 -07:00
Saranya R
2ce01442f5 ARM: dts: msm: Spilt memdump entries to static and dynamic
Spilt memdump entries to static and dynamic dumps. Static dumps
are enabled by default. Dynamic mem dumps are enabled/disabled
using sysfs nodes and it's disabled in perf build.

Change-Id: I1f1f105d796391ec6e6001c249add9e8ba4b91ce
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
2024-08-20 11:00:21 +05:30
Vivek Pernamitta
5d615962e8 ARM: dts: msm: pcie: Set ultrashort channel settings sun PCIe
Set RX settings mode to zero for Ultrashort channel
settings for sun PCIe controller.

Change-Id: I50b7896e6dabb2cda069c9242340dee02a225b8c
Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
2024-08-19 21:35:00 -07:00
QCTECMDR Service
073b033833 Merge "ARM: dts: msm: Fix trust_ui_vm_mem alignment for Parrot" 2024-08-19 02:42:41 -07:00
QCTECMDR Service
ee84699fd2 Merge "ARM: dts: qcom: Add cold temperature mitigation cooling device" 2024-08-19 02:42:41 -07:00
Prakash Yadachi
b097308d9e ARM: dts: msm: Add memory and clock support for Parrot-VM
Add memory and clock support for qup for Parrot-VM target.

Change-Id: I2bdd7fea970fafc9c245277c31d5dc4003294734
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
2024-08-19 12:01:43 +05:30
QCTECMDR Service
30a6c6b4d7 Merge "ARM: dts: msm: Add platform_mpam slc node for sun" 2024-08-17 09:52:09 -07:00
QCTECMDR Service
63b45e34ec Merge "ARM: dts: msm: Add initial device tree for parrot/ravelin vm" 2024-08-17 06:34:05 -07:00
Nitesh Kumar
c6abca418a ARM: dts: qcom: Add cold temperature mitigation cooling device
Add cx regulator cooling device to handle cold interrupt case
in parrot, it gets activated when cold temperatures interrupt
triggers.

Change-Id: I75c350ac3b30304e97e7bb2f2450f197b0a34900
Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com>
2024-08-16 03:38:38 -07:00
Sneh Mankad
bfeba3fcee ARM: dts: msm: Add CPUIdle and PSCI related devices for tuna
Add idle states for CPUs and CPU clusters, added PSCI device,
to enable CPUs to enter deeper LPMs.
Disabled the idle states till Rumi validations are done.

Additionally. updated APPS RSC device to be in cluster power domain
to handle RSC activities when cluster is powering off.

Change-Id: I0dc50ff04bb480eb9ebdfa0bbaebfdf954c7c41b
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
2024-08-16 14:31:38 +05:30
Georgi Djakov
35f3c16d5e ARM: dts: msm: Add tui_test heap for sun-vm
The tui_test heap will be used by the large_dmabuf test
on sun-vm.

Change-Id: I84e5aee85c03e2cc809acc307509ce00aa74d967
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
2024-08-15 10:19:04 -07:00
Patrick Daly
29854f0195 ARM: dts: msm: Add interconnect vote for kgsl-smmu on sun
When all clients remove DDR bandwidth vote, DDR may power collapse.
As part of its shutdown sequence, it waits for an 'active' signal to
no longer be asserted by the gpu cx gdsc. Thus, if SW votes for the
gdsc to be active, but not for DDR bandwidth, this sequence may
get stuck.

Change-Id: I48d704f08cfe6d17159eb04d02f5ed123809f967
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-08-14 15:29:38 -07:00
QCTECMDR Service
a4b731a3d6 Merge "ARM: dts: qcom: Add Nodes for SLC MPAM support" 2024-08-14 03:25:38 -07:00
QCTECMDR Service
bf34df5bc6 Merge "ARM: dts: msm: Add a node for cpufreq cycle counter driver" 2024-08-13 22:14:21 -07:00
Huang Yiwei
63d17b94ea ARM: dts: msm: Add platform_mpam slc node for sun
Add platform_mpam slc node for sun.

Change-Id: Iacf470e2a8ca60277a817a4f8d159b5c75b80bc6
Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
2024-08-14 10:54:04 +08:00
QCTECMDR Service
8fe431f13c Merge "dt-bindings: Move qcom,cycle-cntr.yaml to correct location" 2024-08-13 19:13:25 -07:00
Gokul krishna Krishnakumar
8791d1c355 ARM: dts: msm: sun: add interconnects for soccp rproc
APPS needs to place proxy votes to ddr and cnoc when the SOCCP is in D0.

Change-Id: Idfa93910b51c6df033ea010480c1a8adeacd4af5
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-08-13 13:41:39 -07:00
Gokul krishna Krishnakumar
f7f2a9a731 ARM: dts: msm: sun: Add SOCCP_SOCCP_SPARE_REG0 to check SOCCP status
SOCCP_SOCCP_SPARE_REG0 is used to check D0 status of SOCCP.
TCSR_SOCCP_SLEEP_STATUS is used to check D3 status of SOCCP.

Change-Id: Icee37cddb0b7ef303962cab0d9a8f37a211a05da
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-08-13 13:40:10 -07:00
QCTECMDR Service
a42a64bb1e Merge "ARM: dts: msm: Update SLC SCID Heuristics property" 2024-08-13 12:29:04 -07:00
QCTECMDR Service
3a282c5a09 Merge "ARM: dts: msm: Add pmic-glink support and its clients for tuna" 2024-08-13 12:29:04 -07:00
Sai Harshini Nimmala
f0f1c41d9d dt-bindings: Move qcom,cycle-cntr.yaml to correct location
Bindings file for WALT cycle counter driver is in incorrect location.
Move it to the correct location where all other bindings files are
present.

Change-Id: I9e8ef0a87ac6b311931535a82ccf3c784bcdc896
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>
2024-08-13 11:46:25 -07:00
Hrishabh Rajput
e5e656ad48 ARM: dts: msm: Fix trust_ui_vm_mem alignment for Parrot
Parrot need to follow non-relocatable absolute addresses for VM due to
firmware constraints. VM kernel load address is the start address of the
vm_mem_region and build system requires the load address of the kernel
to be 2MB aligned.

This patch adjusts the start address of the trust_ui_vm_mem region for
Parrot to align to 2MB. This also means reducing its size by 1MB.

Change-Id: I1816ec5f6ff18f55ecc4dec39958d442151f8cb0
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
2024-08-13 01:51:58 -07:00
Avinash Philip
12d8a87783 ARM: dts: qcom: Add Nodes for SLC MPAM support
Support for MPAM SLC support.

Change-Id: Id98cc9e2d346d536905d92d0ef15ecf90ca8d162
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
2024-08-13 06:46:01 +05:30
QCTECMDR Service
6932695c34 Merge "ARM: dts: msm: Remove cpusys_vm region on sun" 2024-08-12 14:14:24 -07:00
Avinash Philip
55be01b6fc ARM: dts: msm: Update SLC SCID Heuristics property
Update vendor prefix qcom for heuristics SCID property.

Change-Id: I9a683f6ac543a2a7108986abd68f21c1df8a54bb
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
2024-08-12 23:58:10 +05:30
QCTECMDR Service
ff92656556 Merge "ARM: dts: msm: Add hdcp device node for ravelin" 2024-08-12 10:34:26 -07:00
Swetha Chikkaboraiah
a191ae962a ARM: dts: msm: Add initial device tree for parrot/ravelin vm
Add initial device tree support for parrot/ravelin vm target.
This is a snapshot of dtsi files as of KP.1.0
'commit <370d8eab7cc6> ("Merge "ARM: dts: qcom:
Disable cnss-kiwi SOL on anorak platform"")'.

Change-Id: Iaf69c882974f38b69d9edd671d675f14dfb9774d
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
2024-08-12 21:34:51 +05:30
Kavya Nunna
0cac1b3f87 ARM: dts: msm: Add pmic-glink support and its clients for tuna
Add pmic-glink support and its clients like qti-battery-charger,
altmode, ucsi and pmic-glink-adc support for tuna.

Change-Id: Ib2dd7cee63e6697e744783aabf954b62814b7ad8
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2024-08-12 11:46:13 +05:30
Kavya Nunna
c81f508a2b ARM: dts: msm: add primary SPMI Arbiter and SPMI debug bus for tuna boards
Add spmi-pmic-arb devices for the primary and secondary SPMI buses
found on tuna.  The primary bus operates at 19.2 MHz and is used
for most of the PMICs. The secondary bus operates at 4.8 MHz
and is used exclusively for charging PMICs. Note that the
secondary bus is not used so it is kept disabled.

Add SPMI debug device and associated child devices for the primary
SPMI interface. This provides consumers with unrestricted access
to the PMIC registers on pre-production devices. This helps
make debugging easier.

Change-Id: I9efadb5082389a519f76f7b5db43f0bde84f2239
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2024-08-12 11:46:04 +05:30
Sachin Patil
e893ebd3c0 ARM: dts: qcom: intent redistribution of sensor glink channel
Currently, 4 glink intents are used by sensors channels
Not enough for handling large no. of transactions between aon
and hal. Increase the no. of glink intents such that more
no. of transactions can be supported between aon and hal.

Change-Id: I676021e1f3968639c542a921bd213942cb2c8e2a
Signed-off-by: Sachin Patil <quic_sachpati@quicinc.com>
2024-08-11 22:42:32 +05:30
QCTECMDR Service
4625e901da Merge "ARM: dts: msm: Add UFS nodes for tuna pre-sil" 2024-08-09 11:05:36 -07:00
QCTECMDR Service
a9da76801b Merge "ARM: dts: msm: SLC SCID Heuristics support for sun" 2024-08-09 11:05:36 -07:00
Avinash Philip
b340945a35 ARM: dts: msm: SLC SCID Heuristics support for sun
Enables HEURISTICS SCID for sun.

Change-Id: I1f52aeb0000c5835236bf6c04cc3c51e87cdfedf
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
2024-08-09 14:56:28 +05:30
Ajit Pandey
2e025643d4 ARM: dts: msm: Add support for camera clock controllers on Tuna
Add support for CAMCC and CAM_BIST_MCLK_CC clock controller nodes
on Tuna platform. While at it, move camcc gdsc's to real.

Change-Id: I14e7add272a549cd21c39083a26baac4c50de31e
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
2024-08-09 12:17:50 +05:30
Manish Pandey
d06b485834 ARM: dts: msm: Add UFS nodes for tuna pre-sil
Add UFS host controller and PHY nodes for tuna soc.

Change-Id: I27f7c09355c54de15d7f9544918db830496e6c1f
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
2024-08-09 10:51:50 +05:30
Shilpa Suresh
3e9b6564b4 ARM: dts: msm: Add qcom,old-i2c-freq-cfg for parrot/ravelin
For backward compatibility for parrot and ravelin targets, add the
qcom,old-i2c-freq-cfg property. This will ensure that the
legacy counter settings are used for the i2c frequency configuration
for communication with pm8008 chip.

Change-Id: I97eaa1cc240932c25d02c5422e6fb584816f8ece
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
2024-08-08 18:37:10 +05:30
QCTECMDR Service
9a62421626 Merge "ARM: dts: qcom: Remove cpu pause action on boot core" 2024-08-07 17:37:30 -07:00
QCTECMDR Service
cda4e3edf8 Merge "ARM: dts: msm: Update PMIC adc_tm nodes for ravelin" 2024-08-07 17:37:30 -07:00
QCTECMDR Service
f89f566c43 Merge "ARM: dts: msm: Increase virtio-mem maximum size" 2024-08-07 17:37:30 -07:00
QCTECMDR Service
f7095458d1 Merge "ARM: dts: msm: Reduce common CMA region size for monaco" 2024-08-07 11:35:52 -07:00