Merge "ARM: dts: msm: Add pmic-glink support and its clients for tuna"

This commit is contained in:
QCTECMDR Service
2024-08-13 12:29:04 -07:00
committed by Gerrit - the friendly Code Review server

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@@ -18,6 +18,7 @@
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/spmi/spmi.h>
/ {
model = "Qualcomm Technologies, Inc. Tuna";
@@ -1099,6 +1100,185 @@
status = "disabled";
};
spmi_bus: spmi0_bus: qcom,spmi@c42d000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0xc42d000 0x4000>,
<0xc400000 0x3000>,
<0xc500000 0x400000>,
<0xc440000 0x80000>,
<0xc4c0000 0x10000>;
reg-names = "cnfg", "core", "chnls", "obsrvr", "intr";
interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "periph_irq";
interrupt-controller;
#interrupt-cells = <4>;
#address-cells = <2>;
#size-cells = <0>;
cell-index = <0>;
qcom,channel = <0>;
qcom,ee = <0>;
qcom,bus-id = <0>;
};
spmi1_bus: qcom,spmi@c432000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0xc432000 0x4000>,
<0xc400000 0x3000>,
<0xc500000 0x400000>,
<0xc440000 0x80000>,
<0xc4d0000 0x10000>;
reg-names = "cnfg", "core", "chnls", "obsrvr", "intr";
interrupts-extended = <&pdc 3 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "periph_irq";
interrupt-controller;
#interrupt-cells = <4>;
#address-cells = <2>;
#size-cells = <0>;
cell-index = <0>;
qcom,channel = <0>;
qcom,ee = <0>;
qcom,bus-id = <1>;
depends-on-supply = <&spmi0_bus>;
status = "disabled";
};
spmi0_debug_bus: qcom,spmi-debug@10b14000 {
compatible = "qcom,spmi-pmic-arb-debug";
reg = <0x10b14000 0x60>, <0x221c8784 0x4>;
reg-names = "core", "fuse";
clocks = <&aoss_qmp>;
clock-names = "core_clk";
qcom,fuse-enable-bit = <18>;
#address-cells = <2>;
#size-cells = <0>;
depends-on-supply = <&spmi_bus>;
pmk8550@0 {
compatible = "qcom,spmi-pmic";
reg = <0 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pmxr2230@1 {
compatible = "qcom,spmi-pmic";
reg = <1 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pm8550vs@3 {
compatible = "qcom,spmi-pmic";
reg = <3 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pmd802x@4 {
compatible = "qcom,spmi-pmic";
reg = <4 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pm8550ve@5 {
compatible = "qcom,spmi-pmic";
reg = <5 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pm8550vs@6 {
compatible = "qcom,spmi-pmic";
reg = <6 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pmg1110@8 {
compatible = "qcom,spmi-pmic";
reg = <8 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pmg1110@9 {
compatible = "qcom,spmi-pmic";
reg = <9 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
pmr735d@a {
compatible = "qcom,spmi-pmic";
reg = <10 SPMI_USID>;
#address-cells = <2>;
#size-cells = <0>;
qcom,can-sleep;
};
};
thermal_zones: thermal-zones {
};
qcom,pmic_glink {
compatible = "qcom,qti-pmic-glink";
qcom,pmic-glink-channel = "PMIC_RTR_ADSP_APPS";
qcom,subsys-name = "lpass";
qcom,protection-domain = "tms/servreg", "msm/adsp/charger_pd";
depends-on-supply = <&ipcc_mproc>;
battery_charger: qcom,battery_charger {
compatible = "qcom,battery-charger";
};
ucsi: qcom,ucsi {
compatible = "qcom,ucsi-glink";
};
altmode: qcom,altmode {
compatible = "qcom,altmode-glink";
#altmode-cells = <1>;
};
};
qcom,pmic_glink_log {
compatible = "qcom,qti-pmic-glink";
qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS";
qcom,battery_debug {
compatible = "qcom,battery-debug";
};
qcom,charger_ulog_glink {
compatible = "qcom,charger-ulog-glink";
};
pmic_glink_debug: qcom,pmic_glink_debug {
compatible = "qcom,pmic-glink-debug";
#address-cells = <1>;
#size-cells = <0>;
depends-on-supply = <&spmi1_bus>;
};
pmic_glink_adc: qcom,glink-adc {
compatible = "qcom,glink-adc";
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
status = "disabled";
};
};
};
#include "tuna-gdsc.dtsi"