QCTECMDR Service
eb14fbd8d3
Merge "arm64: dts: qcom: Add SDX75 platform and IDP board support"
2024-07-13 04:19:21 -07:00
Yuanfang Zhang
636081e6bd
ARM: dts: msm: move apps_scandump dump entry to static table
...
Move apps_scandump memory dump entry to static dump table.
Change-Id: I26e9d8359d7d814ed88f3eca9edb2cbd87f7a91c
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com >
2024-07-12 07:31:59 -07:00
QCTECMDR Service
c536af632b
Merge "dt-bindings: interrupt-controller: Add SDX75 PDC compatible"
2024-07-12 04:26:17 -07:00
QCTECMDR Service
5208ad7724
Merge "ARM: dts: msm: Remove qcom,msm_fastrpc from ravelin.dtsi"
2024-07-12 04:26:17 -07:00
QCTECMDR Service
e034936786
Merge "dt-bindings: arm: qcom: Document sdxkova platform and boards"
2024-07-12 04:26:17 -07:00
QCTECMDR Service
f58e42aa02
Merge "ARM: dts: msm: Update ravelin glink node"
2024-07-12 04:26:17 -07:00
QCTECMDR Service
cd5d297206
Merge "ARM: dts: msm: gunyah: Add large dmabuf test nodes for sun"
2024-07-12 04:26:17 -07:00
QCTECMDR Service
3ded231481
Merge "ARM: dts: msm: Add ddr registers to DCC on sun"
2024-07-12 04:26:17 -07:00
QCTECMDR Service
59f476fc20
Merge "dt-bindings: clock: qcom: Add RPMHCC for SDX75"
2024-07-12 00:54:40 -07:00
QCTECMDR Service
511f0ea94f
Merge "ARM: dts: msm: Disable clock gating for sun"
2024-07-12 00:54:40 -07:00
QCTECMDR Service
06fb48f5ee
Merge "dt-bindings: cpufreq: cpufreq-qcom-hw: Add SDX75 compatible"
2024-07-12 00:54:40 -07:00
QCTECMDR Service
4ffba8ac66
Merge "dt-bindings: firmware: scm: Add compatible for SDX75"
2024-07-12 00:54:40 -07:00
QCTECMDR Service
3cb76104bc
Merge "dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings"
2024-07-12 00:54:40 -07:00
Nitesh Kumar
5542d27939
ARM: dts: qcom: Add cx regulator cooling device in zeroc thermal-zone
...
Add cooling device to monitor cold temperature
interrupts.
Use "hot" trip type for thermal zone software shutdown trip
for all thermal zones. It just notifies userspace thermal
manager which in turn triggers a graceful shutdown.
Change-Id: Id82d4f29e839e31742fb4d02859984f4584d148a
Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com >
2024-07-12 12:24:34 +05:30
Srinivasarao Pathipati
14f61e9e14
ARM: dts: msm: parrot: remove atomic in secure use case
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Atomic and secure domains are not a legal combination so remove
atomic entry for secure use case.
Change-Id: Id897102499385f6c6c504f030f2d9b0aef4853d0
Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com >
2024-07-11 23:45:09 -07:00
Balaji Vekatesh Kalkonda
165dc87ece
ARM: dts: msm: ravelin: add compatible string for focaltech touch
...
This change enables compatible string for focaltech touch driver.
Change-Id: I66d416092a5cbb8fa06ea8b77b8955637134b56b
Signed-off-by: Balaji Vekatesh Kalkonda <quic_bkalkond@quicinc.com >
2024-07-11 23:29:44 -07:00
QCTECMDR Service
d5db47e65a
Merge "ARM: dts: msm: Add UFS ESI CPU mask for pineapple"
2024-07-11 11:35:23 -07:00
QCTECMDR Service
d33595e750
Merge "ARM: dts: msm: Update iova-width for gfx tbu nodes for ravelin"
2024-07-11 11:35:23 -07:00
QCTECMDR Service
330c81ed95
Merge "ARM: dts: qcom: Add fan thermal mitigation rules for SunP HDK"
2024-07-11 11:35:23 -07:00
Shivendra Pratap
c48c4da198
ARM: dts: msm: Add qcom_scm node for tuna
...
Add qcom_scm node for tuna.
Change-Id: Ic9e54e2d809ae70d24c903843919d91b996905c4
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com >
2024-07-11 22:51:21 +05:30
Yuanfang Zhang
8e5cf0739a
ARM: dts: msm: Add ddr registers to DCC on sun
...
Add ddr registers to DCC list on sun.
Change-Id: Ie6b5485ca698760a27df47834b79f7bfd5c996e3
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com >
2024-07-11 08:01:45 -07:00
QCTECMDR Service
fa4db02983
Merge "ARM: dts: msm: Enable fsa4480 in parrot dtsi"
2024-07-11 03:09:51 -07:00
Prakash Yadachi
839c5fe40d
ARM: dts: qcom: Add ranges property for qupv3_0 node
...
Added ranges property for qupv3_0 node for Ravelin.
Change-Id: I441dc416c718f8da38a61fdd79c3ffbc676cbf14
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com >
2024-07-11 10:45:18 +05:30
Prakash Yadachi
e3f1806765
ARM: dts: qcom: Update proper clock name
...
Update uart clock name from se to se-clk for Ravelin.
Change-Id: Ib2b614ba3a0f2bf307e7fa7678a10ccfe97da1c1
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com >
2024-07-11 10:39:24 +05:30
Georgi Djakov
eefeac1056
ARM: dts: msm: gunyah: Add large dmabuf test nodes for sun
...
Add test node to sun.dtsi, sun-vm.dtsi and sun-oemvm.dtsi
to validate large dmabuf transfer functionality.
Change-Id: I17cd06d12e18f26a6afe7c2da13fcca23a375b04
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com >
2024-07-10 16:18:43 -07:00
Georgi Djakov
21e4e3bb9a
dt-bindings: qcom: Add gh-large-dmabuf-test binding
...
Add gh-large-dmabuf-test binding description and requirements
which include compatible, label and optional properties.
Change-Id: Ief22a3b609539ea307f289fb62e7c90b3a1284f6
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com >
2024-07-10 05:53:10 -07:00
Rohit Agarwal
b0989c0eb7
dt-bindings: interconnect: Add compatibles for SDX75
...
Add dt-bindings compatibles and interconnect IDs for
Qualcomm SDX75 platform.
Change-Id: I77372b70e4379593499f9d24e4a580edd3c8c051
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/1694614256-24109-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org >
Git-Commit: 956329ec7c5eba430211b48cca1b0372b4a4d702
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-10 13:57:38 +05:30
Imran Shaik
dd7144ddab
dt-bindings: clock: qcom: Add GCC clocks for SDX75
...
Add support for qcom global clock controller bindings for SDX75 platform.
Change-Id: I99f1a44dfe7f444c027d4b7098484ec57f8ef0d8
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com >
Signed-off-by: Taniya Das <quic_tdas@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230512122347.1219-3-quic_tdas@quicinc.com
Git-Commit: 1c305ea86bc32b3f38413ef3dbb1f3c288da024e
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-10 13:51:52 +05:30
Akhil Manikoth Kallankandy
aef94e1a18
ARM: dts: msm: Update ravelin glink node
...
Fix for pmic glink node for ravelin without this change glink
channel registration fails for the ADSP communication.
Change-Id: I02d1ea7b11db6e5e5dfd0f85e384797b1b6b96b9
Signed-off-by: Akhil Manikoth Kallankandy <quic_c_akhika@quicinc.com >
2024-07-09 21:21:08 -07:00
Akhil Manikoth Kallankandy
7754de5de4
ARM: dts: msm: Remove qcom,msm_fastrpc from ravelin.dtsi
...
Remove the qcom,msm_fastrpc nodes as these
are moved to dsp-devicetree.
Change-Id: I2ae6d3d27b27895859c4f1e241012d288f5f7a72
Signed-off-by: Akhil Manikoth Kallankandy <quic_c_akhika@quicinc.com >
2024-07-09 21:18:31 -07:00
Bibek Kumar Patro
21061bbb84
ARM: dts: msm: add initial memory configuration for kera
...
Add initial memory configuration and reserved memory map
for kera, inline with v1.
Change-Id: I2b3ed445feebd6141beb59bd23e416711e17747c
Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com >
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com >
2024-07-10 09:43:47 +05:30
QCTECMDR Service
169dcdc551
Merge "ARM: dts: msm: Use "iommu-addresses" property for ravelin qup"
2024-07-09 16:58:32 -07:00
QCTECMDR Service
fa82bbacb8
Merge "ARM: dts: msm: Add qcom,force-low-pwm-size prop for ravelin pm6450"
2024-07-09 16:58:32 -07:00
QCTECMDR Service
11c46b34ca
Merge "ARM: dts: msm: Use "iommu-addresses" property for ravelin dwc3"
2024-07-09 16:58:32 -07:00
QCTECMDR Service
4a433fcfd2
Merge "ARM: dts: msm: Add initial SMMU configuration for tuna"
2024-07-09 16:58:32 -07:00
QCTECMDR Service
4dd684956d
Merge "ARM: dts: qcom: update gpu mitigation for bcl for sun"
2024-07-09 13:25:46 -07:00
QCTECMDR Service
0ce0b2ec09
Merge "ARM: dts: msm: Remove fastrpc nodes for monaco"
2024-07-09 13:25:45 -07:00
QCTECMDR Service
22f2df78be
Merge "ARM: dts: qcom: Add scm, syscon,shmbridge support in Kera"
2024-07-09 13:25:45 -07:00
QCTECMDR Service
3a53bb2e2c
Merge "ARM: dts: msm: Remove ipa nodes for monaco target"
2024-07-09 13:25:45 -07:00
QCTECMDR Service
72b5e3c533
Merge "dt-bindings: bridge: lt9611uxc: Add bindings"
2024-07-09 13:25:45 -07:00
Dmitry Baryshkov
183bc36233
dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings
...
Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is
expected that all future platforms will use the generic qcom,smmu-500
compat string in addition to SoC-specific and the generic arm,mmu-500
ones. Older bindings are now described as deprecated.
Note: I have split the sdx55 and sdx65 from the legacy bindings. They
are not supported by the qcom SMMU implementation. I can suppose that
they are using the generic implementation rather than the
Qualcomm-speicific one.
[Add dt-bindings for qcom,smmu-500 for Qcom SoCs].
Change-Id: Id2520441f556590403ac712f68aa7487ca4f205e
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20221114170635.1406534-5-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org >
Git-Commit: 6c84bbd103d85696af9cc0f746c01f9b2847637e
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-10 00:05:02 +05:30
Rohit Agarwal
2fcde9c1b5
dt-bindings: arm-smmu: Add SDX75 SMMU compatible
...
Add devicetree binding for Qualcomm SDX75 SMMU.
Change-Id: I393b6ac159f71fdd24cfaa665ccda0271b7531b5
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com >
Acked-by: Conor Dooley <conor.dooley@microchip.com >
Link: https://lore.kernel.org/r/1684487350-30476-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org >
Git-Commit: 48989c0b25ca6ed75f3ea81053936ff0b64d02e7
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-09 23:51:28 +05:30
QCTECMDR Service
d205719b87
Merge "ARM: dts: msm: Enable parade touch driver node"
2024-07-09 10:15:17 -07:00
QCTECMDR Service
a0de938f9e
Merge "ARM: dts: msm: Add smp2p for tuna"
2024-07-09 10:15:17 -07:00
Rohit Agarwal
7497d82540
arm64: dts: qcom: Add SDX75 platform and IDP board support
...
Add basic devicetree support for SDX75 platform and IDP board from
Qualcomm. The SDX75 platform features an ARM Cortex A55 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, UART, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..
[Since we are not using sdx75-idp, do not include its DTS.]
Change-Id: I1562002758e7b077662c69d5d9bbef247aef157d
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/1686311438-24177-6-git-send-email-quic_rohiagar@quicinc.com
Git-Commit: 9181bb939984f1ad4f958c2be3ea10fd67344165
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-09 05:59:40 -07:00
Rohit Agarwal
635da2f7e4
dt-bindings: power: qcom,rpmpd: Add compatible for sdx75
...
Add a compatible string for power domains in sdx75.
Change-Id: I0c9cfc823f74e537e50737b225ebb44805e36788
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com >
Acked-by: Conor Dooley <conor.dooley@microchip.com >
Link: https://lore.kernel.org/r/1690803007-8640-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Git-Commit: 0b9d94e1f19acd19613386096d924af2333b620a
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-09 17:11:27 +05:30
Imran Shaik
e99a0b90c7
dt-bindings: clock: qcom: Add RPMHCC for SDX75
...
Add compatible string for qcom RPMHCC for SDX75 platform.
Change-Id: Id69e2e9dc2961f70624a63053002f8e16dcfce9e
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com >
Signed-off-by: Taniya Das <quic_tdas@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230512122347.1219-4-quic_tdas@quicinc.com
Git-Commit: 379d72721bc4308fbc038e9858b7d2e9191725b5
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-09 14:18:27 +05:30
Rohit Agarwal
28e83f589e
dt-bindings: pinctrl: qcom: Add SDX75 pinctrl devicetree compatible
...
Add device tree binding Documentation details for Qualcomm SDX75
pinctrl driver.
Change-Id: I0d8e959a3dd7e4eb71bf47c693130af5f87117fb
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/1684425432-10072-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
Git-Commit: 1dc3f8812cc5fe82c097811ea8251d7f8af5d54d
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-09 12:59:08 +05:30
Khaja Hussain Shaik Khaji
10aadf0941
dt-bindings: arm: qcom: Document sdxkova platform and boards
...
Document the sdxkova platform binding and also the boards using it.
Change-Id: Ifc488cf86c0113ce4df6140770b328851a786235
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-09 12:17:55 +05:30
Rohit Agarwal
60bbc15bb5
dt-bindings: arm: qcom: Document SDX75 platform and boards
...
Document the SDX75 platform binding and also the boards using it.
Change-Id: I821ae00b6c461ded39383bd8a3c131bb73c5914b
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com >
Acked-by: Conor Dooley <conor.dooley@microchip.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/1686311438-24177-2-git-send-email-quic_rohiagar@quicinc.com
Git-commit: f9a97656ace80c617df2d6003c815877c026a9e3
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com >
2024-07-09 12:07:57 +05:30