Yuanfang Zhang 8e5cf0739a ARM: dts: msm: Add ddr registers to DCC on sun ...

Add ddr registers to DCC list on sun.

Change-Id: Ie6b5485ca698760a27df47834b79f7bfd5c996e3
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>

2024-07-11 08:01:45 -07:00

bindings

Merge "dt-bindings: bridge: lt9611uxc: Add bindings"

2024-07-09 13:25:45 -07:00

qcom

ARM: dts: msm: Add ddr registers to DCC on sun

2024-07-11 08:01:45 -07:00

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Description

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11 MiB

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