sdxkova uses PMK8550, PM7550BA and PMX75. Add SPMI slave device
and some of the peripheral devices for PMX75.
Update PMIC overlay file to add devices from these PMICs that
are common for all sdxkova platforms. Also add PM7550BA-related
configurations required for the IDP MBB platform.
Add spmi_debug_bus so that PMIC peripherals can be accessed via
debug bus on sdxkova devices where the fuse is not blown. This
is useful for debugging.
Add PMIC Glink devices and their client devices. The PMIC Glink
device with name PMIC_RTR_ADSP_APPS supports the clients: ucsi,
altmode, and battery_charger. The PMIC Glink device with name
PMIC_LOGS_ADSP_APPS supports the clients: battery_debug,
pmic_glink_debug, charger_ulog_glink, and glink_adc.
Change-Id: I6dc40cc36a46c1b34edd274655306dadd3143ebf
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Added QUPv3(I2C, SPI and UART), GPI DT nodes and
QUPv3 pinctrl support for sdxkova.
Change-Id: I55394b443be7dd2a37b04e62fa2f308ebdf67753
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
Add base device tree support for ATP, CDP, MTP, QRD, RCM
platforms for Tuna SoC.
Change-Id: I229ea3ba6963c91183c8df9b668e3dfef80f189d
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
Remove crash-fatal property for VMs to support VM
restart feature.
Change-Id: I42a2dd37ff81604b6cfb48179f2dc0133de27fb0
Signed-off-by: Peng Yang <quic_penyan@quicinc.com>
The initialization of the OPP table from the device tree is failing
because the OPP framework expects the CPUFreq node to act as a clock
provider due to the presence of the clocks property in CPU nodes.
However, the qcom-cpufreq-hw scaling driver doesn't have the support
for handling the CPUFreq node as a clock provider, resulting in an
-EPROBE_DEFER error. Thus, to resolve this issue, remove the clocks
property from the CPU nodes.
Change-Id: I243807f58dc82c55f4ec390c09752b8652ac2706
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Add 4 more dma-buf heaps in LE meeting requirements from GenAI use cases.
Change-Id: I97591758f7189144a7ef603f5d9977694d9c0090
Signed-off-by: Jiaxing Li <quic_jiaxli@quicinc.com>
This change removes the dependency of TLMM with PDC so that
it can probe without PDC. We can re-enable PDC dependency
once we validate PDC changes.
Change-Id: I3b78b6a5418ecf98675d31a8b5e47bdeeeedbd6b
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
Add cpufreq cycle counter register information to devicetree in a
separate node for use by associated driver.
Change-Id: I5c57507acf6d4488402424619ac9d2ad356fb308
Signed-off-by: Ankit Sharma <quic_anshar@quicinc.com>
Update the Qualcomm Technologies, Inc. PMIC GPIO binding documentation
to include compatible strings for PMX75.
Change-Id: Ieb9767d9e02619495a5d22715ae73d052d343b17
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Change ATID value of SNOC from 125 to 108.
Change-Id: I74723aea491498ccbcc16da07154b9572a6d7974
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>
This change will update dll_usr_ctl to the recommended value.
Change-Id: I345b59546faf950645c0f173ac145e40124170f1
Signed-off-by: Sachin Gupta <quic_sachgupt@quicinc.com>
Use the same rcu configuration values on both PVM and QTVM.
This reduces latency of synchronize_rcu().
Change-Id: If023ae452c56e6172c33ccb2b14767376f86268b
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Upsteam DT does not have phandle for the armv8-timer node,
hence DT overlay is failing during ABL as phandle is necessary
for the overlay. Hence removed the timer node which was included
via upstream DT and added it along with a phandle.
Change-Id: Iba5b3ec985814fa44125c5918900dbf87cb45a6b
Signed-off-by: Keval Kulkarni <quic_kevalbha@quicinc.com>
This change moves the APSS RSC clients under APSS RSC node
as child nodes. Earlier those were wrongly added under SOC.
Change-Id: I7e04b78a138eae18384a4ee976ff2bc0018ea30d
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
Rename "dynamic_clk" to "atclk", using atclk mode to handle this clock.
Change-Id: I9284156854366657594728ebc7815ebe7a533281
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
