The downstream pmic_glink driver and compatible string has been
renamed to qti_pmic_glink on the qcom-6.6 kernel branch, to avoid
conflict with the independent upstream driver.
This was handled for the "PMIC_RTR_ADSP_APPS" channel clients
(UCSI, Altmode and Battery charger), but got missed for the
"PMIC_LOGS_ADSP_APPS" channel clients (battery-debug, charger-ulog
and spmi-glink-debug). Fix it.
Change-Id: I441aecde368fab411d6df3ae0d8c04b9c3a002f2
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
Add entry for KMHal and DeviceID UID in vm config consumed by
RM to communicate with qtee service.
Change-Id: I1fecedaa960c764d45e154d217c58abf71752125
Signed-off-by: Piyush Pradeep Jain <quic_piyushpr@quicinc.com>
Remove the 'master' property from the VM devicetree
entry. This property is not used anymore so as to
handle any bootup order.
Change-Id: I261f85a61b522f5b07a2e67d4669deccd3a2872d
Signed-off-by: Sarannya S <quic_sarannya@quicinc.com>
Add the smp2p ipa device nodes to enable smp2p
communication with remote processors.
Change-Id: Ifc5232c05ff77d977b9af1dcd8ab1b4d17b4eb8c
Signed-off-by: Pavan Kumar M <quic_rpavan@quicinc.com>
Signed-off-by: Jagadeesh Ponduru <quic_jponduru@quicinc.com>
Add DT entry to enable the memory onject support for si-core.
Change-Id: Ie2551143a14773ac5cdd9196c39832f8579abd5d
Signed-off-by: Amirreza Zarrabi <quic_azarrabi@quicinc.com>
Add "qcom,max-cpus" DT to specify the maximum number
of CPUs the SoC supports.
Change-Id: If7289eeac6732f354c31abd69b4e4fabd549c834
Signed-off-by: kamasali Satyanarayan <quic_kamasali@quicinc.com>
Use reserved memory instead of CMA for memdump node. The dump entries
are divided into two groups, one is static_dump, entries in this group
are enabled by default during startup. dynamic_dump is the other group,
entries in this group can be enabled/disabled after startup and disabled
on perf build.
Change-Id: I4f40cc29e2920cd0b2dd6b6b7285a770f1b39b3e
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Add clock controller bindings for GCC/GPUCC/DISPCC/DEBUGCC
on Monaco Platform.
Add clock controller bindings for RPMCC for Monaco, Khaje and
Holi platform.
Change-Id: I98e6b2094daabc6e6b8b450a397ea3c19799b50a
Signed-off-by: Prerna Singh <quic_prersing@quicinc.com>
Add dt support for qseecom for Parrot SOC.
Change-Id: Idfca637295821e47183e865fd257e44cb4a4dc58
Signed-off-by: Nageswara reddy Karnati <quic_nkarnati@quicinc.com>
Added compatible string for touch screen novatek,NVT-ts for parrot.
Change-Id: I25f19eb2ce731e05c979ab1fdbfd1af85ef87733
Signed-off-by: Syed Ahmed <quic_syedahme@quicinc.com>
Enable the UFS MCQ feature on the Pineapple platforms.
Change-Id: I205f0c0444d5579333cac28a504a89985b95b469
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add the dummy clock and gdsc handles for clients to be able to request
on them for kera platform.
Change-Id: I24fa8bf818483947760c8b87497b25bcf40be84c
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
