ARM: dts: qcom: Enable UFS MCQ on Pineapple platforms
Enable the UFS MCQ feature on the Pineapple platforms. Change-Id: I205f0c0444d5579333cac28a504a89985b95b469 Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
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@@ -1479,11 +1479,20 @@
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};
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};
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ufshc_dma_resv: ufshc_dma_resv_region {
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/*
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* Restrict IOVA mappings for UFSHC buffers to the 3 GB region
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* from 0x1000 - 0xffffffff.
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*/
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iommu-addresses = <&ufshc_mem 0x0 0x1000>;
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};
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ufshc_mem: ufshc@1d84000 {
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compatible = "qcom,ufshc";
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reg = <0x1d84000 0x3000>,
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<0x1d88000 0x18000>;
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reg-names = "ufs_mem", "ice";
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<0x1d88000 0x18000>,
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<0x1da5000 0x2000>, <0x1da4000 0x10>;
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reg-names = "ufs_mem", "ice", "mcq_sqd", "mcq_vs";
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interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&ufsphy_mem>;
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phy-names = "ufsphy";
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@@ -1492,7 +1501,7 @@
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qcom,ice-use-hwkm;
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qcom,prime-mask = <0x80>;
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qcom,silver-mask = <0x0f>;
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qcom,esi-affinity-mask = <0xf0>;
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qcom,esi-affinity-mask = <0xe0>;
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lanes-per-direction = <2>;
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dev-ref-clk-freq = <0>; /* 19.2 MHz */
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@@ -1594,11 +1603,17 @@
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iommus = <&apps_smmu 0x60 0x0>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-msi-size = <0x1000>;
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memory-region = <&ufshc_dma_resv>;
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shared-ice-cfg = <&ice_cfg>;
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dma-coherent;
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qcom,bypass-pbl-rst-wa;
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msi-parent = <&gic_its 0x60>;
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qcom,max-cpus = <8>;
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qcom,broken-ahit-wa;
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status = "disabled";
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qos0 {
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