Update cpucp regions for tuna, inline with v2.
This removes pdp region and reduces cpucp_scandump
region to 1.5MB.
Change-Id: I571d8012545c7c547f0115d86e10183964fe7d8f
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add RET mode support for L2G/L3G for tuna platforms as per
the sleep setting recommendation.
While at it set init mode as LPM for L3G and L6K
regulators. As clients always vote for 0 load, the
regulator framework will not apply it and the HPM
init-mode will not change, leading to higher power
consumption. So update the LPM for L3G and L6K regulators.
Change-Id: I5b210ac3e9ffee94889c2390becfaa5eb6c235ab
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Update initial DCVS devices for Kera. This
includes frequency and memlat mapping tables.
Change-Id: Ie29a3e0d831fe308b9ee843aba34f6484f461933
Signed-off-by: Sayantan Chakraborty <quic_saycha@quicinc.com>
Update gpu mitigation level for tuna and BCL threshold based on latest
recommendation.
Change-Id: I51e9e60d6439439ce76fa4cfbdf7e4d909ef727e
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
Add support for offlining CPUs during VM load for Parrot.
Change-Id: Id5dad4d40375942a2f8ad671345390ecfc7a3926
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
(cherry picked from commit 07b61ddce6)
Fix the clock handle entries in the protected clocks for gcc on Kera.
Change-Id: I0f7f633b0961fa2dda952fb9b53824aa45968595
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add `qcom,cluster-mask`, and `qcom,esi-affinity-mask` to specify
CPU and cluster configurations. These additions aim to enhance UFS
performance by optimizing CPU and cluster utilization.
Change-Id: Ib54d842d47341190a3b400e91a4520d2b72a4e24
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Enable touch support for Kera ATP platform.
Change-Id: Ib4fa26a97df01d90678e5c8c98444ffb1303e0fc
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
Enable the UFS MCQ feature on the Kera platforms.
Change-Id: I3e6349010c442666bef9a7b7c24dcd22e9d717b4
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add support for clk8_a4 as fixed factor clock for client to be
able to request on them for Kera platform.
Change-Id: I3f6fe7e444231be4489cf4459b1f98cc19417b48
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
The Kera UFS 2.x requires a reference clock of 19.2MHz. Currently,
the reference clock provided by the DTSI node RPMH_LN_BB_CLK3
returns clk_get_rate() as 38.4MHz.
To address this, the handler is updated to use clk8_a4, ensuring the
clock rate is set to 19.2MHz.
Change-Id: I92ad772c7b86652c0dc5bdc3af18a9db900d74e5
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Signed-off-by: Vishvanath Singh <quic_vishvana@quicinc.com>
