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Author SHA1 Message Date
QCTECMDR Service
ade8de8fee Merge "FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller" 2025-04-21 22:41:24 -07:00
QCTECMDR Service
4a6f6d40e8 Merge "FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Video clock controller" 2025-04-21 22:41:24 -07:00
QCTECMDR Service
de59686b08 Merge "FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller" 2025-04-21 07:25:09 -07:00
QCTECMDR Service
18a56d1180 Merge "FROMLIST: dt-bindings: clock: qcom: Add QCS615 GCC clocks" 2025-04-21 07:25:07 -07:00
QCTECMDR Service
c3eed3a68b Merge "dt-bindings: arm: Add bindings for sm6150 llcc" 2025-04-18 12:15:51 -07:00
QCTECMDR Service
7695df9f94 Merge "dt-bindings: clock: Add rpmh-clk bindings for sm6150" 2025-04-18 04:28:27 -07:00
Taniya Das
e9b2fd1e94 FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Video clock controller 
Add DT bindings for the Video clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: I0279899c5b53b9dbcba9152ac49d70e87011cec9
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-8-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
 2025-04-18 15:02:53 +05:30
Taniya Das
bb399e6f11 FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller 
Add DT bindings for the Graphics clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: Ia0231c87be0d5217100013c4ab7c3b0a83c3e134
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-6-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
 2025-04-18 15:01:35 +05:30
Taniya Das
39118055b9 FROMLIST: dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller 
Add DT bindings for the Camera clock on QCS615 platforms. Add the
relevant DT include definitions as well.

Change-Id: Iccb0ed8449b3efc4f378311513e757a11c72ae06
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/linux-arm-msm/20250119-qcs615-mm-v4-clockcontroller-v4-2-5d1bdb5a140c@quicinc.com/
Patch-mainline: linux-arm-kernel @ 19/01/25, 15:52
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Dongfang Zhao <quic_doz@quicinc.com>
 2025-04-18 15:00:04 +05:30
Taniya Das
377e8acc3c FROMLIST: dt-bindings: clock: qcom: Add QCS615 GCC clocks 
Add device tree bindings for global clock controller on QCS615 SoCs.

Change-Id: I112235218ab3e7d9e2a44024db8afcc2a1271111
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/all/20241016-qcs615-clock-driver-v3-3-bb5d4135db45@quicinc.com/
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Marco Zhang <quic_zhangx@quicinc.com>
 2025-04-18 14:58:14 +05:30
QCTECMDR Service
8876cc2e78 Merge "dt-bindings: interconnect: add interconnect bindings for SM6150" 2025-04-17 00:26:09 -07:00
QCTECMDR Service
3448abbdd7 Merge "ARM: dts: msm: Add ldo-ocp-notifier support for kera" 2025-04-16 11:20:38 -07:00
QCTECMDR Service
ad8f766707 Merge "ARM: dts: msm: Add smem and syscon support for SM6150" 2025-04-16 11:20:38 -07:00
Aryan Modi
807f033164 dt-bindings: clock: Add rpmh-clk bindings for sm6150 
Add rpmh clock bindings for sm6150 platform.

Change-Id: I8b330755340363cabe6032edc6aa225b19bc7d94
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-16 11:51:20 +05:30
Aryan Modi
8c6f16b12a dt-bindings: interconnect: add interconnect bindings for SM6150 
Add interconnect device bindings. These devices can be used to
describe any RPMH and NoC based interconnect devices.

Change-Id: Ic9a21d11bb3ce92ffb0cde91739990441673861d
Signed-off-by: Veera Vegivada <quic_vvegivad@quicinc.com>
Signed-off-by: Aryan Modi <quic_aryamodi@quicinc.com>
 2025-04-16 11:14:57 +05:30
QCTECMDR Service
cd38f518ce Merge "ARM: dts: msm: Add support for debug info for monaco" 2025-04-15 20:43:05 -07:00
Kavya Nunna
5887bcc216 ARM: dts: msm: Add ldo-ocp-notifier support for kera 
Add ldo-ocp-notifier support for kera platforms.

Change-Id: I6aac9f6faeda06152647cdb56dc2064eca4a64a6
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2025-04-15 02:21:48 -07:00
Saranya R
6833986c6f ARM: dts: msm: Add support for debug info for monaco 
Reserve debug info region of 4KB for monaco.

Change-Id: I9481c9862838cd754a063a351dd02578d2b3dd2f
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
 2025-04-14 03:00:49 -07:00
Asit Shah
2072106de1 ARM: dts: msm: Add smem and syscon support for SM6150 
Added smem, syscon and dependent nodes for SM6150.

Change-Id: Icb9485e46c8720919310bc0e2560bd51b23f5dec
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
 2025-04-14 13:56:42 +05:30
Kunal Singh Ranawat
b5604a5ff7 ARM: dts: msm: Add tlmm pinctrl support for SM6150 
Add support for TLMM pinctrl on SM6150 platform.

Change-Id: I45dfd3d84900ed4b24ecda47462c2c5178bbb02f
Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>
 2025-04-14 13:55:48 +05:30
Asit Shah
dacefe38a6 dt-bindings: arm: Add bindings for sm6150 llcc 
Add bindings for sm6150 llcc node.

Change-Id: I4f239f190c01110e59c1081ccf0a57cb1631fb95
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
(cherry picked from commit 4173e882bd59e39d8b698fed8b92417231c98e4e)
 2025-04-13 23:54:42 -07:00
Bao D. Nguyen
7c24cb15cb ARM: dts: msm: Add SD card LS external feedback clock support 
Add the Level Shifter's external feedback clock entry to support
the SD card HS50 mode running at 50MHz.
By default, the Sun platforms use the Level Shifter devices with
external feedback clock signal connects back to the MSM in order
for the HS50 mode to work at 50MHz. Without the external feedback
clock, the HS50 mode works at reduced frequency at 37.5MHz.

Change-Id: I56c61411d7f792a389fa85661fce7fa5074e2c9f
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
 2025-04-10 13:05:42 -07:00
Ankur Matariya
9beba3aef1 bindings: pinctrl: Add pinctrl bindings for SM610 
Added bindings for SM6150 pinctrl.

Change-Id: I7e06b398f3bdd705669f14bd94b652dfd8d2c19c
Signed-off-by: Ankur Matariya <quic_amatariy@quicinc.com>
 2025-04-08 11:36:42 +05:30
QCTECMDR Service
88c7784f2b Merge "dt-bindings: Add QUSB & USB BAM on dt-bindings" 2025-04-03 13:24:29 -07:00
QCTECMDR Service
ae152d193e Merge "ARM: dts: qcom: Add XO calibration NVMEM in PMK8550" 2025-04-02 15:46:13 -07:00
QCTECMDR Service
1f546698e2 Merge "ARM: dts: qcom: Add XO calibration trigger support for sun" 2025-04-02 15:46:13 -07:00
Kamal Wadhwa
c62c4c7af3 ARM: dts: qcom: Add XO calibration trigger support for sun 
WLAN has a requirement to trigger a PBS sequence for XO calibration
for factory testing. To support this, expose a new register under
PMK8550 SDAM2 for clients to write input data into and a new PBS
regulator on which clients can vote to trigger the PBS sequence.

Change-Id: I0e4882d842ea57def4dfdfe4baa5e606a3847f40
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
 2025-04-02 04:27:42 -07:00
Kamal Wadhwa
c5ac33f01f ARM: dts: qcom: Add XO calibration NVMEM in PMK8550 
WLAN has a requirement to trigger a PBS sequence for XO
calibration for factory testing. As part of this feature
expose a new register under PMK8550 SDAM2, which will
be used by PBS for reading XO trims settings.

Change-Id: I620b2d9d0ca6b7452f693ff665ddf995f17e4e2c
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
 2025-04-02 04:24:31 -07:00
Kamal Wadhwa
65717ed086 ARM: dts: qcom: Add XO calibration trigger support for tuna 
WLAN has a requirement to trigger a PBS sequence for XO calibration
for factory testing. To support this, expose a new register under
PMK8550 SDAM2 for clients to write input data into and a new PBS
regulator on which clients can vote to trigger the PBS sequence.

Change-Id: Ia314c8cba7a6205943b99e7530990ea6dde8b09c
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
 2025-04-02 04:24:13 -07:00
QCTECMDR Service
70d213a96b Merge "ARM: dts: msm: Add RPMH controlled PMIC regulators for SM6150" 2025-04-01 04:50:16 -07:00
Dhaval Radiya
61331f0639 ARM: dts: msm: Add RPMH controlled PMIC regulators for SM6150 
Add rpmh-regulator snapshot for SM6150 from qcom-6.1 branch
commits 0dcf0e0ea8bb ("ARM: dts: msm: Initial DTS support for SA6155").

Change-Id: Ica7b4c09b98233cce66f72b5ecc73fcb38d1a0b0
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
 2025-03-28 05:36:16 -07:00
QCTECMDR Service
7dc162272f Merge "ARM: dts: msm: Add ldo-ocp-notifier support for tuna" 2025-03-26 04:38:08 -07:00
QCTECMDR Service
38ec34669d Merge "ARM: dts: msm: Add touch reset and interrupt gpio in tuna-vm platforms" 2025-03-26 04:38:08 -07:00
QCTECMDR Service
7296149d8a Merge "ARM: dts: msm: Add touch reset and interrupt gpio in sun-vm platforms" 2025-03-26 04:38:08 -07:00
QCTECMDR Service
243dded800 Merge "ARM: dts: msm: Add RSC and PDC devices for SM6150" 2025-03-26 04:38:08 -07:00
QCTECMDR Service
1ee1b80772 Merge "ARM: dts: qcom: Set correct parents for the PHY symbol mux clks" 2025-03-26 04:38:08 -07:00
Anand Tarakh
129deb7f1f ARM: dts: msm: Add touch reset and interrupt gpio in tuna-vm platforms 
Add touch reset and interrupt gpio in tuna-vm QRD, MTP, RCM and CDP
platform.

Change-Id: I0e87a8d72a32b1c2fd4599b6cde04df1ecd0f854
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
 2025-03-24 12:10:56 +05:30
Kavya Nunna
0a31d1df63 ARM: dts: msm: Add ldo-ocp-notifier support for tuna 
Add ldo-ocp notifier support for tuna for platforms.

Change-Id: I46c1feb2f4ff2da3945f9ad445eb5d99f81f7af4
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2025-03-23 21:51:15 -07:00
Dhaval Radiya
5aeca939b2 ARM: dts: msm: Add RSC and PDC devices for SM6150 
This change adds apps & display rsc and pdc node
for SM6150 Target.

Change-Id: I174372330e040c7fa632fb9f52ad58c2b80b2b7e
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
 2025-03-23 21:01:00 -07:00
Anand Tarakh
3c02797dd1 ARM: dts: msm: Add touch reset and interrupt gpio in sun-vm platforms 
Add touch reset and interrupt gpio in sun-vm QRD, MTP and CDP
platforms.

Change-Id: Ic209d570f168a30de6f9a29cc6df3966d249b3aa
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
 2025-03-21 14:25:06 +05:30
QCTECMDR Service
24dfd1761e Merge "bindings: arm: Add bindings for arm,arch-cache" 2025-03-20 20:07:39 -07:00
QCTECMDR Service
1e6911a09f Merge "ARM: dts: msm: Add initial device tree for QCS610 LE target" 2025-03-20 20:07:39 -07:00
Asit Shah
227a64ada4 bindings: arm: Add bindings for arm,arch-cache 
Add device tree bindings for arm,arch-cache node.

Change-Id: I46acfdd171e297368d6bedc431af7dd1270909f8
Signed-off-by: Asit Shah <quic_asitshah@quicinc.com>
 2025-03-20 06:59:38 -07:00
QCTECMDR Service
7e07590570 Merge "ARM: dts: msm: Enable ship-mode immediate property for tuna/kera" 2025-03-19 20:08:03 -07:00
QCTECMDR Service
04b8fb661c Merge "bindings: interrupt-controller: Document PDC compatible for sm6150" 2025-03-19 12:22:36 -07:00
Rajkumar Patel
53765c8d58 dt-bindings: Add QUSB & USB BAM on dt-bindings 
This change adds the entries of qusb phys and
usb bam in yaml format.

Change-Id: I5697f28cf786ab6cc61c462a164ff4b0e4e68aac
Signed-off-by: Rajkumar Patel <quic_rajkpate@quicinc.com>
 2025-03-19 18:43:19 +05:30
QCTECMDR Service
43816d8117 Merge "dt-bindings: pci: qcom: Add PCIe EP DT Bindings on sdxkova" 2025-03-19 04:03:33 -07:00
QCTECMDR Service
81f118efaa Merge "ARM: dts: msm: Update memory map for kera" 2025-03-18 11:07:51 -07:00
Kunal Singh Ranawat
458709ab91 ARM: dts: msm: Add initial device tree for QCS610 LE target 
Added initial device tree for QCS610 LE target.

Change-Id: Ia8b8790fa0916a8a87a5bc696f5b9e23d7e951dc
Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>
 2025-03-18 00:08:10 -07:00
Dhaval Radiya
792daa62c8 bindings: interrupt-controller: Document PDC compatible for sm6150 
Document PDC compatible for sm6150.

Change-Id: Id1cbe87f20263dfb03c4f7c47121ee7a5bb94d1e
Signed-off-by: Dhaval Radiya <quic_dradiya@quicinc.com>
 2025-03-17 23:51:50 -07:00