Add USB AXI clock handle for accessing USB QoS register to program QoS.
Change-Id: I4e0a0057e55283578ab6333f0da1b46c36e01fe5
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Enable idle states devices for virtual CPU to enter LPMs
when idle.
Change-Id: I0e03ea5ac0263a385a1ee4e79f16070826d88320
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Provide separate file for SLT so that ABL can pick
it properly. Currently, ABL doesn't check if multiple
board-id is added.
Change-Id: I9140ca7b19f6b0b368798950145abbe28e32e778
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
Add support for cpufreq_hw and cpufreq_hw_debug nodes on kera platform.
While at it, set the default governor to performance on kera platform.
Change-Id: Id6fd146d3c80f686780591e5efa594bd76155bcd
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Mark the pcie_1 clocks as protected and remove the pcie_1 gdsc
nodes.
Change-Id: I3102a52895a6531fb82a411bdb760073fc3c28f3
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes.
While at it, keep the gdsc's as it is on rumi platform.
Change-Id: I91b4915723e26685e950de3ae575540ac3940036
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Currently, the node for eusb2_phy0 is defined but not used by controller
which makes the associated resources to be consumed. Therefore if phy
probes doesn't happen the controller goes into core soft reset failure.
Fix this by utilizing the node in the controller. This will call the
phy's probe and hence clocks & regulators will be initialized.
Change-Id: Ica46af01154d5e583e011e4f2d84a80fb0589ac8
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
The device tree for dma heaps on vm was incorrectly included.
so, remove it.
Fixes: 92398e011c ("ARM: dts: msm: Enable securemsm related nodes for kera")
Change-Id: Ib812725bedfd0510d6a998ecc83fe5df8619391c
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add devicetree bindings for the schgm-flash driver.
Change-Id: Id9da37b6dd5a33f1d6028007237d2e4fc763534c
Signed-off-by: Varshitha H N <quic_vhn@quicinc.com>
Mark dispcc clock node as GenPD provider and disable the display GDSC
regulator nodes for kera platform.
While at it, keep the gdsc's as it is on kera-rumi platform and update
the compatible to align with freq plan.
Change-Id: If01f876b3d160cf5c1cfe6be13e3e4b42f62cfa6
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Mark videocc clock node as GenPD provider and disable the video GDSC
regulator nodes for kera platform.
While at it, keep the gdsc's as it is on kera-rumi platform.
Change-Id: I4a41aacbaa7d144f72db48b9af3a336a92ef95aa
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for rpmh and debug clock controller nodes on Kera platform.
While at it, keep rpmhcc node as dummy for KERA rumi platform.
Change-Id: Ic11513d45bbc9b3f172a411f854a2348af4bfb94
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for GPU clock controller and move corresponding
gdsc's from dummy to real on Kera platform.
While at it, add the clocks property to camera and display gdscs.
Change-Id: If3061a7603035e799e7548f0e2a93b7ded0e3005
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Remove the force-low-pwm-size property and add the mid-res-support
property. PM6450 does not have support for 76.8Mhz clock source, but
PM6450 has the same subtype which detects high resolution support. Add
medium resolution support which removes 76.8Mhz support and uses the
other 3 clock sources.
Change-Id: I8ba5f28c441ddab5321a7ba24b09424c7f31b538
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
TLMM pin is used to notify USB3/DP Combo PHY about the
orientation. Select this pinctrl from the usb_qmp_dp_phy
and ensure it is selecting the "usb0_phy_ps" pin function for Kera.
Change-Id: Ib4c9b61a36473dc6a00cf7a271c54f2245d4f9d8
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Set RX settings mode to zero for Ultrashort channel settings
for TUNA PCIe controller.
Change-Id: Iff8a09f2ae474e8b8bec35a4dbbdc3df6fb40147
Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
Remove the force-low-pwm-size property and add the mid-res-support
property. PM6450 does not have support for 76.8Mhz clock source, but
PM6450 has the same subtype which detects high resolution support. Add
medium resolution support which removes 76.8Mhz support and uses the
other 3 clock sources for its usage.
Change-Id: I37a52126ff2d7538bca1cd036c83d7e78391acd3
Signed-off-by: Shilpa Suresh <quic_c_sbsure@quicinc.com>
