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Author SHA1 Message Date
qctecmdr
a29c9e3c5f Merge "ARM: dts: msm: Add ddr voting to llcc bwmons for sun" 2024-04-09 14:44:07 -07:00
qctecmdr
fb20f2718a Merge "dt-bindings: pinctrl: qcom,x1e80100-tlmm: restrict number of interrupts" 2024-04-09 12:47:24 -07:00
qctecmdr
00818bd306 Merge "ARM: dts: msm: dt snapshot for monaco target" 2024-04-09 10:00:31 -07:00
qctecmdr
c56ace7502 Merge "dt-bindings: pinctrl: Add documentation for monaco TLMM block" 2024-04-09 10:00:31 -07:00
Amir Vajid
a92554f7e7 ARM: dts: msm: Add ddr voting to llcc bwmons for sun 
Enable secondary ddr voting on llcc bwmons for sun
and remove existing ddr bwmon given this enablement.

Change-Id: Icbb1ad3fbf7b44bf66a64f3cc8cefe9061953015
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
 2024-04-09 09:04:03 -07:00
Maulik Shah
a9cca1a6a5 ARM: dts: msm: Remove CL4 idle state for sun 
Remove CL4 idle state.

Change-Id: I3ded3cc1d2b0acaccb1bd8de65d7353aef2f7d6b
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
 2024-04-08 21:48:27 -07:00
Krzysztof Kozlowski
ca68bf2baf dt-bindings: pinctrl: qcom,x1e80100-tlmm: restrict number of interrupts 
X1E80100 TLMM pin controller comes with only one interrupt, so narrow
the number of interrupts previously defined in common TLMM bindings.

Change-Id: I9779d427cffc339a36fdf6ffcaf9599cc740fd64
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231208215534.195854-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Git-commit: 7e47d9d3750c17bdbbcbeac65f6ca54d633a58b5
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
 2024-04-09 10:01:28 +08:00
Rajendra Nayak
ecae808e0a dt-bindings: pinctrl: qcom: Add X1E80100 pinctrl 
Add device tree binding Documentation details for Qualcomm X1E80100 TLMM
device.

Change-Id: Idd6ea87019bc219eb1ab8edc5e5cfc3b3eecdbd0
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231117093921.31968-2-quic_sibis@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Git-commit: 5180f4fa499eb78f45e2d4ee0883c6483884f4df
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
 2024-04-09 10:01:04 +08:00
qctecmdr
7ff848b6b9 Merge "dt-bindings: Add required bindings for monaco" 2024-04-08 04:44:38 -07:00
Pradnya Dahiwale
42651dd79b dt-bindings: pinctrl: Add documentation for monaco TLMM block 
Add documentation for monaco TLMM block.

Change-Id: I68cf536dff9a4462bcd04be9f97fd0b2b5f77078
Signed-off-by: Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
 2024-04-08 02:06:48 -07:00
qctecmdr
55ae11a6eb Merge "dt-bindings: interconnect: Add interconnect bindings for Parrot" 2024-04-07 23:34:03 -07:00
qctecmdr
e8fa76b168 Merge "ARM: dts: msm: Add tui_demura heap for sun-vm" 2024-04-07 15:04:00 -07:00
qctecmdr
7ba636b166 Merge "ARM: dts: msm: Mark dispcc clock node as GenPD provider" 2024-04-05 20:02:21 -07:00
qctecmdr
83283bc46b Merge "ARM: dts: msm: Add Sun qfprom compat string" 2024-04-05 11:03:53 -07:00
qctecmdr
f467bc627f Merge "ARM: dts: msm: Update mode id for sun vm" 2024-04-05 11:03:52 -07:00
qctecmdr
aeb391b14e Merge "ARM: dts: msm: Add qcom_cpuss_sleep_stats_v4 device for sun" 2024-04-05 08:33:37 -07:00
Maulik Shah
88c9530986 ARM: dts: msm: Update mode id for sun vm 
VMs use platform coordinated PSCI. Update the mode id accordingly.

Change-Id: I8bb0eb3c4ad6f2f4fbdca7781b51e914bd3151b5
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
 2024-04-05 06:47:34 -07:00
qctecmdr
07d371a6ce Merge "ARM: dts: msm: Add initial support for monaco target" 2024-04-05 02:14:16 -07:00
Minghao Zhang
44e4da3d63 ARM: dts: msm: Add qcom_cpuss_sleep_stats_v4 device for sun 
This change add qcom_cpuss_sleep_stats_v4 device.

Change-Id: Iaf226999b468090d4c5af542713a61144caa552b
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
 2024-04-05 01:26:46 -07:00
Minghao Zhang
5c5fb0afd7 dt-bindings: Update dt-binding for cpuss sleep stats v4 
This change updates dt-bindings for qcom_cpuss_sleep_stats_v4 driver
that lpm count and residency can be read.

Change-Id: Ia5dc8fc905610a61561dfba0e8235a4d9dddcf9c
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
 2024-04-05 01:25:54 -07:00
Mukesh Ojha
70d5c7312d ARM: dts: msm: Add Sun qfprom compat string 
Add the soc-specific compatible string for qfprom to
support keepout regions on Sun SoC.

Change-Id: I676acc8110d05dd7d9d7fef0455b5152f3afc4ac
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
 2024-04-04 22:49:51 -07:00
Mukesh Ojha
8483aae65f bindings: Add Sun qfprom compat string 
Add the soc-specific compatible string for qfprom to
support keepout regions on Sun SoC.

Change-Id: Ia48eeb0dba8464407695a2bca1bccb9ad6eec711
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
 2024-04-04 22:49:26 -07:00
qctecmdr
7da5526087 Merge "ARM: dts: msm: Add msm id for Sun Rumi" 2024-04-04 07:35:04 -07:00
Mukesh Ojha
5476d04b68 ARM: dts: msm: Add msm id for Sun Rumi 
Add msm id to avoid build failure for Tuna SoC.

Change-Id: Ie3ff07c0865ae8a2b43225db864eb453134201a6
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
 2024-04-04 03:41:39 -07:00
Naresh Kumar Lingagalla
b23188598c dt-bindings: Add required bindings for monaco 
Add bindings for monaco/monacop/mailbox/remoteproc
on monaco.

Change-Id: Ide227ba8b3772c4a5cc180ba9b7ee1d4831f7b91
Signed-off-by: Naresh Kumar Lingagalla <quic_nlingaga@quicinc.com>
 2024-04-04 01:37:30 -07:00
Chetan C R
8d3e8b959a dt-bindings: interconnect: Add interconnect bindings for Parrot 
Add interconnect device bindings for Parrot SoC. These devices
can be used to describe any RPMH and NoC based interconnect devices.

Change-Id: I6c07467e58283ec88abe054c3e68b6f1af050065
Signed-off-by: Chetan C R <quic_cchinnad@quicinc.com>
 2024-04-03 23:10:42 -07:00
Naresh Kumar Lingagalla
b471e42ad0 ARM: dts: msm: dt snapshot for monaco target 
DT snapshot from branch msm-5.15.c2
commit 8ae5ffe89e0f ("ARM: dts: msm: Add mdsp heap for mDSP compute").

Change-Id: If3e807289b6d981865430c4e1a45dabf236fa345
Signed-off-by: Naresh Kumar Lingagalla <quic_nlingaga@quicinc.com>
 2024-04-03 19:45:51 -07:00
qctecmdr
73b9cad3f8 Merge "dt-bindings: arm: msm: Add ravelin sys-pm-violators device" 2024-04-03 03:24:11 -07:00
qctecmdr
0382918afb Merge "ARM: dts: qcom: Add minidump vdevice for OEMVM" 2024-04-03 00:54:18 -07:00
Naresh Kumar Lingagalla
1a37a8d13b ARM: dts: msm: Add initial support for monaco target 
Add bazel and dts support for monaco target.

Change-Id: Ife045d71b94102f54c25852cdde5e911c1ad7ba4
Signed-off-by: Naresh Kumar Lingagalla <quic_nlingaga@quicinc.com>
 2024-04-03 11:33:20 +05:30
Patrick Daly
81a639270a ARM: dts: msm: Add tui_demura heap for sun-vm 
The tui_demura heap will be used by display on sun-vm.

Change-Id: Ic99e7cfef111e3e289ad2d056b0eea463d6af1fe
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
 2024-04-02 22:26:12 -07:00
Swetha Chikkaboraiah
7b8b13ed5d dt-bindings: arm: msm: Add ravelin sys-pm-violators device 
Add ravelin sys-pm-violators device.

Change-Id: I7b18979fa7fe238bf8ea8dffce42216944b9a845
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
 2024-04-03 10:17:10 +05:30
qctecmdr
e879f4297e Merge "ARM: dts: qcom: change the power regulator to VDD_MX" 2024-04-02 17:09:24 -07:00
Gokul krishna Krishnakumar
f61dcd79f6 ARM: dts: qcom: change the power regulator to VDD_MX 
SOCCP uses mx and cx power rails and not the island rails.

Change-Id: I52f3f28f9206e62b4b7dc99dd4c7c9f19d6f92cf
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
 2024-04-02 10:10:47 -07:00
Gokul krishna Krishnakumar
80c3e1d96b ARM: dts: qcom: change the power regulator to LowSVS 
SOCCP requires only LOWSVS power level for the regulators.

Change-Id: I940304eacd9d4e039d65b42866daf69aaae75b85
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
 2024-04-02 10:10:15 -07:00
qctecmdr
7815414198 Merge "dt-bindings: clock: Add clock controller bindings for Parrot" 2024-04-02 02:10:10 -07:00
qctecmdr
4014c509eb Merge "ARM: dts: msm: Use deepest idle mode for sun vm" 2024-04-01 23:53:17 -07:00
qctecmdr
549011e50e Merge "ARM: dts: msm: remove "qcom,iommu-dma-addr-pool" of ETR on sun" 2024-04-01 21:20:05 -07:00
qctecmdr
fa71f10ae2 Merge "dt-bindings: clock: Add gx_clkctl bindings for Sun" 2024-04-01 16:47:25 -07:00
Yuanfang Zhang
ca0ec45163 ARM: dts: msm: remove "qcom,iommu-dma-addr-pool" of ETR on sun 
Remover "qcom,iommu-dma-addr-pool" property of ETR on sun.

Change-Id: Ib4ebf5f00560b1b4495b57454ad3f1ce29eed5c6
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-04-01 18:42:23 +08:00
Jagadeesh Kona
77cc16e01b dt-bindings: clock: Add gx_clkctl bindings for Sun 
Add gx_clkctl bindings for sun device.

Change-Id: I8fafff7004f27851bf4870466ad506d3441f9070
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
 2024-04-01 15:07:57 +05:30
Cong Zhang
97b7a61933 ARM: dts: qcom: Add minidump vdevice for OEMVM 
Add minidump vdevice to enable minidump support for OEMVM.

Change-Id: I2e4b371cabd8ac1fc2362011e55bd4eb556da70e
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
 2024-04-01 00:49:12 -07:00
qctecmdr
d34be90b94 Merge "Revert "ARM: dts: msm: Add initial device trees for Tuna SoC"" 2024-03-30 17:02:26 -07:00
Bruce Levy
18fcc7c914 Revert "ARM: dts: msm: Add initial device trees for Tuna SoC" 
This reverts commit 5f034afc81.

Reason for revert: We are facing compilation failures when making
a full sun Android build.

Change-Id: Iacbc3022889045357cb2cc0a68047732a80cbbd2
Signed-off-by: Bruce Levy <quic_blevy@quicinc.com>
Signed-off-by: Vivekanand Tryambake <quic_vtryamba@quicinc.com>
 2024-03-30 13:22:17 -07:00
qctecmdr
33c1d4bfd0 Merge "ARM: dts: qcom: Enable mem-offline to send AOP cmd" 2024-03-29 12:47:07 -07:00
qctecmdr
3d93ffa2fc Merge "ARM: dts: msm: add dynamic ATID support for diag/stm on sun" 2024-03-29 10:44:58 -07:00
Maulik Shah
7bff1fda7b ARM: dts: msm: Use deepest idle mode for sun vm 
Use SS3 as deepest CPU idle mode.

Change-Id: Ifd6e82adfea882bcf0087f12b44c9a45f8310216
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
 2024-03-29 19:14:26 +05:30
Pratyush Brahma
b552d881b3 ARM: dts: qcom: Enable mem-offline to send AOP cmd 
Currently, the mechanism to send AOP cmd to offline memblocks is
disabled. Enable the mechanism to achieve desired power savings.

Change-Id: I68a25c34801d020c901ddc7d3e27099a22e88f01
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
 2024-03-29 14:31:58 +05:30
qctecmdr
bbae0ea202 Merge "dt-bindings: Add devicetree binding for msm-cdsp-loader" 2024-03-28 18:03:34 -07:00
qctecmdr
454d875a8e Merge "ARM: dts: msm: Update board-id for QMP1000 support" 2024-03-28 18:03:34 -07:00