Add cpufreq cycle counter register information to devicetree in a
separate node.
Change-Id: Ib9c21300cda585d4f25be12cb9527d719eb630ea
Signed-off-by: Atul Pant <quic_atulpant@quicinc.com>
Commit e3eceb0 (pinctrl:qcom:Add support for Kera SoC in pin control)
updates the UFS_RESET pin from 184 to 185. This commit updates kera
UFS 'reset-gpios' to 185 to ensure proper functioning of UFS.
Change-Id: I9b850a7c997303b467b6fea4a64bc19ec3e6372c
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Use alias to reduce dev mistake of not using
proper path for serial console.
Change-Id: Ie588cc39b8f9e167b323abb9901114b547c278fc
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
The "capacity-dmips-mhz" and "dynamic-power-coefficient" are
used to build Energy model which in turn is used by EAS to take
placement decisions.
Change-Id: I6397ed3038d60fde457297fe3e015c2d5aaaa6a8
Signed-off-by: Atul Pant <quic_atulpant@quicinc.com>
Add Quality of Service (QoS) and shared_ice configurations
for the kera SoC's UFS.
Change-Id: I7695fd02133fcb2b31f00ee9719a8a54942cc44a
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add aliases for node to use in dts.
Change-Id: Ib6aa3c6b1476e8a61bf5d913729b86bbe247b85f
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
Describe the properties and msgqs of the mem-buf device.
Change-Id: I76794172d28090e4c215a86b4fe32de6ce315d7c
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Describe the properties and msgqs of the mem-buf device.
Change-Id: Iae109a5ae0c0b9186e0c11b4d0e3b45b5f9f9623
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add initial set of DCVS device nodes for Kera. This
includes the QCOM DCVS devices, PMU device memlat device
nodes and mapping tables, and bwmon device nodes.
Change-Id: I7fc58b1e3c841d60bca5b3231fd29578422ddebb
Signed-off-by: Sayantan Chakraborty <quic_saycha@quicinc.com>
Add RPMH regulator devices for SMPS, LDO regulators,
found on the PMIC chips used on kera boards, to ensure that
consumers are able to modify the physical state of these regulators.
Change-Id: Idb9d6509a9d3ab0534c34cbd1a6511c01e658918
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Add thermal devicetree changes and thermal configuration
for kera based on the recommendation.
Change-Id: I8c1ff2a1da70359b5d8d84959b0ad30c6d37be93
Signed-off-by: Nitesh Kumar <quic_nitekuma@quicinc.com>
Add SPS module to device tree. SPS (Smart Peripheral System)
enables the support of all BAMs in the system which provide DMA
functionality to various peripherals for kera.
Change-Id: I606567fddd7af1f3b724d6a2ea9555d986efe866
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
Add QUPv3(I2C, SPI and UART) and GPI DT nodes on kera.
Change-Id: I3d0db10cd90a59500b29aade5cb9e4017395a1a0
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
Update memory map for kera, inline with v2.
Change-Id: I28488932a269a5c1ef6c131e9385cf7604ea723e
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
