Commit Graph

25 Commits

Author SHA1 Message Date
Chandana Kishori Chiluveru
d88427773d ARM: dts: msm: add changes for q2spi 4mA drive strength
During Airplane mode testing with BT, UWB and PCIE concurrent
test scenarios, due to pcie traffic signal tolerance issue seen
on q2spi signals. As per the recommendation from design team
decreasing current drive strength from 6mA to 4mA for q2spi
active state GPIO configuration.

Change-Id: I530dfd636e834c4d6eb1e067e8dcb76dcfa4ab87
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-12-29 21:45:38 -08:00
Ravulapati Vishnu Vardhan Rao
cefb451115 ARM: dts: msm: remove of unwanted config
Remove unwanted config value for the gpio.

Change-Id: Id05eda44034b278cc7e3227a8154876026dedc2b
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
2024-06-18 16:10:32 +05:30
qctecmdr
cab3e15e48 Merge "ARM: dts: msm: Update pinctrl changes for ganges SPI instance for SUN" 2024-05-14 00:05:32 -07:00
qctecmdr
f562958903 Merge "ARM: dts: msm: Change I3C pin functions to gpio mode for AON usecase" 2024-04-12 08:39:12 -07:00
Yuanfang Zhang
79fa362a29 ARM: dts: msm: add GPIO CTI trigger support on sun
Add GPIO CTI trigger configuration on sun.

Change-Id: I68b66be1ada16cda36a77f5dc61746ed974afe09
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
2024-04-07 19:08:36 -07:00
Anil Veshala Veshala
e33ee8a6cb ARM: dts: msm: Update pinctrl changes for ganges SPI instance for SUN
Updated SPI CS config for active, sleep pinctrl configurations for sun.

Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Change-Id: I5c72efcc8bca2f19f7066671109bc73b7f024cdb
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2024-04-05 21:59:12 +05:30
Sarath Varma Ganapathiraju
9299d6b13c ARM: dts: msm: add gpio configs for TDM
add gpio pin configs for TDM.

Change-Id: Ibee535c87bff24fc05448ce31d19baa72962db18
Signed-off-by: Sarath Varma Ganapathiraju <quic_ganavarm@quicinc.com>
2024-03-28 10:33:14 -07:00
Jyothi Kumar Seerapu
b26fc7da02 ARM: dts: msm: Correct SPI clock pinctrl function for QUP2_SE3
Corrected the SPI clock pinctrl function for Qup2 SE3 instance.

Change-Id: Ifd2a81cd40a229cc26d48297b7796c11f9e1b872
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2024-03-27 17:48:27 +05:30
Chandana Kishori Chiluveru
bb30aef395 ARM: dts: msm: Add default and shutdown pinctrl configurations
This change is to add default and shutdown
pinctrl states for Q2SPI SE.

Change-Id: Ie221501a9a850cc6cb1cf8be2fb84d17579c076d
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-03-15 22:36:46 -07:00
Chandana Kishori Chiluveru
2b7c57daa4 ARM: dts: msm: Change q2spi mosi and clock sleep configuration
Change q2spi mosi and clock sleep configuration
as per client recommendation.

Change-Id: I151c86e8b4ea356aa1ff3939c1fcdc3f6d5499fa
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-03-14 03:18:30 -07:00
Mukesh Kumar Savaliya
09858a4576 ARM: dts: msm: Change I3C pin functions to gpio mode for AON usecase
For AON usecase switching from HLOS to SSC needs TLMM function to be
non IBI, hence during sleep mode change function of the TLMM to QUP
mode so that SSC can work with IBI disable without any issue.

Also ensures to restore back the TLMM Function to IBI mode when HLOS
i3c usecase starts.

Change-Id: Id6a5cdeafe2c3ee50186c0020831e4eb8f329f95
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
2024-03-05 21:06:45 -08:00
Anil Veshala Veshala
d281341763 ARM: dts: msm: Remove extra space in pin function name for Sun
In pinctrl file there is extra space in function name for
qup1_se0_l1, which is leading to ios lines not in good state.
To solve the removed extra space.

Change-Id: I79b34f15bcf3eb52ac950876b3339c77d036983d
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-11-28 04:16:11 -08:00
qctecmdr
2cd2e95689 Merge "ARM: dts: msm: add fts touch device nodes for Sun" 2023-11-20 20:37:23 -08:00
Rohith Iyer
36a1551ff2 ARM: dts: msm: add fts touch device nodes for Sun
Change adds fts touch driver device nodes for Sun
CDP and MTP target. Also adds pinctrl states for
touchscreen.

Change-Id: Iabba28806e4f1f3cced6270f82cbdca1c1366ede
Signed-off-by: Rohith Iyer <quic_rohiiyer@quicinc.com>
2023-11-15 14:03:57 -08:00
qctecmdr
7bc7c47544 Merge "ARM: dts: msm: add i2c/i3c gpio access to apps and adsp" 2023-11-13 13:43:49 -08:00
qctecmdr
e0b8859b2c Merge "ARM: dts: msm: Add M31 HS and QMP SS USB PHY configuration on sun" 2023-11-09 07:43:35 -08:00
Anil Veshala Veshala
386d893603 ARM: dts: msm: add i2c/i3c gpio access to apps and adsp
To access gpios from apps and adsp, we have added apps and
remote flag in dtsi. To identify apps is busy or not, added
qcom-apps flag during active state and added qcom-remote flag
during suspend state, so other SS can use gpios during apps
in suspend state. with this flags in pinctrl file for respective
GPIOs will help eGPIO to work for AON camera usecase.

Change-Id: I621ae6be653fe89034245d80b650afd8893c7e41
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-11-08 20:29:08 -08:00
Ronak Vijay Raheja
1fb24b5e92 ARM: dts: msm: Add M31 HS and QMP SS USB PHY configuration on sun
Add M31 eUSB2 and QMP SS PHY nodes to sun. Add required dependencies in
pinctrl as well for HW based SS lane detection.

Change-Id: Ib1546aa7d92853a88a05d0bbc836ec4caac40960
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
2023-11-06 11:14:37 -08:00
Chandana Kishori Chiluveru
96fb2799a5 ARM: dts: msm: Add Qupv3 Q2SPI instance for SUN
This change adds Q2SPI support on Qupv3_2 SE5 Instance.

Change-Id: I3af596d38e9997b6744f28e484f93325bbc613be
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2023-11-06 00:22:01 -08:00
Chandana Kishori Chiluveru
73c1325edd ARM: dts: msm: Add QUPv3 and GPI DT nodes on SUN
Add QUPv3(I2C, SPI, UART and I3C) and GPI DT nodes on SUN.

Change-Id: I2520da18d152eb0a30a9f735d879422e876d2d6a
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2023-10-17 03:36:45 -07:00
Lazarus Motha
6e6d4bacc1 ARM: dts: msm: Add PCIe Root port configuration for sun
Add initial devicetree nodes and entries to support
PCIe RC0 port configuration on sun.

Change-Id: I3b7419bfd376a51388785cc4e2f9702ddaabe397
Signed-off-by: Lazarus Motha <quic_lmotha@quicinc.com>
2023-09-22 14:21:32 -07:00
Eric Rosas
1e720dfa08 dt-bindings: Add audio codec bindings for sun
Add bindings for WCD and WSA in pinctrl dt
file for sun.

Change-Id: Icb1fd6fb5950c5814cb4039d369647baac93ddf3
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-09-08 16:19:40 -07:00
Xiaosen He
8bc7f9ce84 ARM: dts: msm: Add SD card support
Add SD card support for sun.

Change-Id: I6620b3671458cbbfce28fe880408e279434804f4
Signed-off-by: Xiaosen He <quic_xiaosenh@quicinc.com>
2023-07-06 00:35:20 -07:00
Prasanna S
cef56baa85 ARM: dts: msm: Add QUPv3 UART console node for sun
Enable console support on sun.

Change-Id: If6c1b2a81e2e18bbfee793c9188afb82dcf6f596
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
2023-05-26 00:17:23 -07:00
Melody Olvera
ca4e3bc19b ARM: dts: qcom: Add pinctrl file for sun
Add pinctrl dtsi file for sun.

Change-Id: I72c684d233d2c9e9d7a0d7bdde322a20fea8e9e0
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
2023-05-16 15:38:30 -07:00