09858a4576
For AON usecase switching from HLOS to SSC needs TLMM function to be non IBI, hence during sleep mode change function of the TLMM to QUP mode so that SSC can work with IBI disable without any issue. Also ensures to restore back the TLMM Function to IBI mode when HLOS i3c usecase starts. Change-Id: Id6a5cdeafe2c3ee50186c0020831e4eb8f329f95 Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
3289 lines
53 KiB
Plaintext
3289 lines
53 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&tlmm {
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qupv3_se7_2uart_pins: qupv3_se7_2uart_pins {
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qupv3_se7_2uart_tx_active: qupv3_se7_2uart_tx_active {
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mux {
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pins = "gpio62";
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function = "qup1_se7_l2";
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};
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config {
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pins = "gpio62";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_2uart_rx_active: qupv3_se7_2uart_rx_active {
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mux {
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pins = "gpio63";
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function = "qup1_se7_l3";
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};
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config {
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pins = "gpio63";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_2uart_sleep: qupv3_se7_2uart_sleep {
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mux {
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pins = "gpio62", "gpio63";
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function = "gpio";
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};
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config {
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pins = "gpio62", "gpio63";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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i2s0_sck {
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i2s0_sck_sleep: i2s0_sck_sleep {
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mux {
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pins = "gpio126";
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function = "gpio";
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};
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config {
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pins = "gpio126";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_sck_active: i2s0_sck_active {
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mux {
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pins = "gpio126";
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function = "i2s0_sck";
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};
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config {
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pins = "gpio126";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s0_ws {
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i2s0_ws_sleep: i2s0_ws_sleep {
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mux {
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pins = "gpio129";
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function = "gpio";
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};
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config {
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pins = "gpio129";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_ws_active: i2s0_ws_active {
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mux {
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pins = "gpio129";
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function = "i2s0_ws";
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};
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config {
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pins = "gpio129";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s0_sd0 {
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i2s0_sd0_sleep: i2s0_sd0_sleep {
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mux {
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pins = "gpio127";
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function = "gpio";
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};
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config {
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pins = "gpio127";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_sd0_active: i2s0_sd0_active {
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mux {
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pins = "gpio127";
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function = "i2s0_data0";
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};
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config {
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pins = "gpio127";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s0_sd1 {
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i2s0_sd1_sleep: i2s0_sd1_sleep {
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mux {
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pins = "gpio128";
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function = "gpio";
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};
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config {
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pins = "gpio128";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s0_sd1_active: i2s0_sd1_active {
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mux {
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pins = "gpio128";
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function = "i2s0_data1";
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};
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config {
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pins = "gpio128";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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output-high;
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};
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};
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};
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i2s1_sck {
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i2s1_sck_sleep: i2s1_sck_sleep {
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mux {
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pins = "gpio121";
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function = "gpio";
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};
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config {
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pins = "gpio121";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_sck_active: i2s1_sck_active {
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mux {
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pins = "gpio121";
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function = "i2s1_sck";
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};
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config {
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pins = "gpio121";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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i2s1_ws {
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i2s1_ws_sleep: i2s1_ws_sleep {
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mux {
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pins = "gpio123";
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function = "gpio";
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};
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config {
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pins = "gpio123";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_ws_active: i2s1_ws_active {
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mux {
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pins = "gpio123";
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function = "i2s1_ws";
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};
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config {
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pins = "gpio123";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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i2s1_sd0 {
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i2s1_sd0_sleep: i2s1_sd0_sleep {
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mux {
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pins = "gpio122";
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function = "gpio";
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};
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config {
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pins = "gpio122";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_sd0_active: i2s1_sd0_active {
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mux {
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pins = "gpio122";
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function = "i2s1_data0";
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};
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config {
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pins = "gpio122";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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i2s1_sd1 {
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i2s1_sd1_sleep: i2s1_sd1_sleep {
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mux {
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pins = "gpio124";
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function = "gpio";
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};
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config {
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pins = "gpio124";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down; /* PULL DOWN */
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input-enable;
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};
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};
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i2s1_sd1_active: i2s1_sd1_active {
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mux {
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pins = "gpio124";
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function = "i2s1_data1";
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};
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config {
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pins = "gpio124";
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drive-strength = <8>; /* 8 mA */
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bias-disable; /* NO PULL */
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};
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};
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};
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pcie0 {
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pcie0_perst_default: pcie0_perst_default {
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mux {
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pins = "gpio102";
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function = "gpio";
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};
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config {
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pins = "gpio102";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie0_clkreq_default: pcie0_clkreq_default {
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mux {
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pins = "gpio103";
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function = "pcie0_clk_req_n";
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};
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config {
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pins = "gpio103";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie0_wake_default: pcie0_wake_default {
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mux {
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pins = "gpio104";
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function = "gpio";
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};
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config {
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pins = "gpio104";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie0_clkreq_sleep: pcie0_clkreq_sleep {
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mux {
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pins = "gpio103";
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function = "gpio";
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};
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config {
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pins = "gpio103";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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sdc2_on: sdc2_on {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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sd-cd {
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pins = "gpio55";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc2_off: sdc2_off {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sd-cd {
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pins = "gpio55";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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/* WCD reset pin */
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wcd939x_reset_active: wcd939x_reset_active {
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mux {
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pins = "gpio101";
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function = "gpio";
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};
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config {
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pins = "gpio101";
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drive-strength = <16>;
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output-high;
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};
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};
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wcd939x_reset_sleep: wcd939x_reset_sleep {
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mux {
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pins = "gpio101";
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function = "gpio";
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};
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config {
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pins = "gpio101";
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drive-strength = <16>;
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bias-disable;
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output-low;
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};
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};
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/* WSA speaker - north reset pins */
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spkr_02_sd_n {
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spkr_02_sd_n_sleep: spkr_02_sd_n_sleep {
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mux {
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pins = "gpio76";
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function = "gpio";
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};
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config {
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pins = "gpio76";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down;
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input-enable;
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};
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};
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spkr_02_sd_n_active: spkr_02_sd_n_active {
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mux {
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pins = "gpio76";
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function = "gpio";
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};
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config {
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pins = "gpio76";
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drive-strength = <16>; /* 16 mA */
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bias-disable;
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output-high;
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};
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};
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};
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/* WSA speaker - south reset pins */
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spkr_13_sd_n {
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spkr_13_sd_n_sleep: spkr_13_sd_n_sleep {
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mux {
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pins = "gpio77";
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function = "gpio";
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};
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config {
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pins = "gpio77";
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drive-strength = <2>; /* 2 mA */
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bias-pull-down;
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input-enable;
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};
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};
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spkr_13_sd_n_active: spkr_13_sd_n_active {
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mux {
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pins = "gpio77";
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function = "gpio";
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};
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config {
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pins = "gpio77";
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drive-strength = <16>; /* 16 mA */
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bias-disable;
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output-high;
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};
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};
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};
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qupv3_se14_4uart_pins: qupv3_se14_4uart_pins {
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qupv3_se14_default_cts: qupv3_se14_default_cts {
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mux {
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pins = "gpio24";
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function = "gpio";
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};
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config {
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pins = "gpio24";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se14_default_rts: qupv3_se14_default_rts {
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mux {
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pins = "gpio25";
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function = "gpio";
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};
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config {
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pins = "gpio25";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se14_default_tx: qupv3_se14_default_tx {
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mux {
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pins = "gpio26";
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function = "gpio";
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};
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config {
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pins = "gpio26";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se14_default_rx: qupv3_se14_default_rx {
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mux {
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pins = "gpio27";
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function = "gpio";
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};
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config {
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pins = "gpio27";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se14_cts: qupv3_se14_cts {
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mux {
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pins = "gpio24";
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function = "qup2_se6_l0";
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};
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config {
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pins = "gpio24";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se14_rts: qupv3_se14_rts {
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mux {
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pins = "gpio25";
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function = "qup2_se6_l1";
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};
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config {
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pins = "gpio25";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se14_tx: qupv3_se14_tx {
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mux {
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pins = "gpio26";
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function = "qup2_se6_l2";
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};
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config {
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pins = "gpio26";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se14_rx_active: qupv3_se14_rx_active {
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mux {
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pins = "gpio27";
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function = "qup2_se6_l3";
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};
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config {
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pins = "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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};
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/* RX to be in gpio mode for sleep config */
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qupv3_se14_rx_wake: qupv3_se14_rx_wake {
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mux {
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pins = "gpio27";
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function = "gpio";
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};
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config {
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pins = "gpio27";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_sda_active: qupv3_se0_i2c_sda_active {
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mux {
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pins = "gpio32";
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function = "qup1_se0_l0";
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};
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config {
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pins = "gpio32";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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qupv3_se0_i2c_scl_active: qupv3_se0_i2c_scl_active {
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mux {
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pins = "gpio33";
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function = "qup1_se0_l1";
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};
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config {
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pins = "gpio33";
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drive-strength = <2>;
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bias-pull-up;
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qcom,i2c_pull;
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};
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};
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|
|
qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i3c_pins: qupv3_se0_i3c_pins {
|
|
qupv3_se0_i3c_sda_active: qupv3_se0_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i3c_scl_active: qupv3_se0_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i3c_sda_sleep: qupv3_se0_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i3c_scl_sleep: qupv3_se0_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i3c_disable: qupv3_se0_i3c_disable {
|
|
mux {
|
|
pins = "gpio32", "gpio33";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_pins: qupv3_se0_spi_pins {
|
|
qupv3_se0_spi_miso_active: qupv3_se0_spi_miso_active {
|
|
mux {
|
|
pins = "gpio32";
|
|
function = "qup1_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_mosi_active: qupv3_se0_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio33";
|
|
function = "qup1_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio33";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_clk_active: qupv3_se0_spi_clk_active {
|
|
mux {
|
|
pins = "gpio34";
|
|
function = "qup1_se0_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio34";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_cs_active: qupv3_se0_spi_cs_active {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "qup1_se0_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
|
|
qupv3_se1_i2c_sda_active: qupv3_se1_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "qup1_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_scl_active: qupv3_se1_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio37";
|
|
function = "qup1_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_pins: qupv3_se1_spi_pins {
|
|
qupv3_se1_spi_miso_active: qupv3_se1_spi_miso_active {
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "qup1_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_mosi_active: qupv3_se1_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio37";
|
|
function = "qup1_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_clk_active: qupv3_se1_spi_clk_active {
|
|
mux {
|
|
pins = "gpio38";
|
|
function = "qup1_se1_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_cs_active: qupv3_se1_spi_cs_active {
|
|
mux {
|
|
pins = "gpio39";
|
|
function = "qup1_se1_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i3c_pins: qupv3_se1_i3c_pins {
|
|
qupv3_se1_i3c_sda_active: qupv3_se1_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i3c_scl_active: qupv3_se1_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio37";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i3c_sda_sleep: qupv3_se1_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio36";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i3c_scl_sleep: qupv3_se1_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio37";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio37";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i3c_disable: qupv3_se1_i3c_disable {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
|
|
qupv3_se2_i2c_sda_active: qupv3_se2_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio40";
|
|
function = "qup1_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_scl_active: qupv3_se2_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio41";
|
|
function = "qup1_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_pins: qupv3_se2_spi_pins {
|
|
qupv3_se2_spi_miso_active: qupv3_se2_spi_miso_active {
|
|
mux {
|
|
pins = "gpio40";
|
|
function = "qup1_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_mosi_active: qupv3_se2_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio41";
|
|
function = "qup1_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio41";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_clk_active: qupv3_se2_spi_clk_active {
|
|
mux {
|
|
pins = "gpio42";
|
|
function = "qup1_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_cs_active: qupv3_se2_spi_cs_active {
|
|
mux {
|
|
pins = "gpio43";
|
|
function = "qup1_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio43";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
|
|
qupv3_se3_i2c_sda_active: qupv3_se3_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio44";
|
|
function = "qup1_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_scl_active: qupv3_se3_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio45";
|
|
function = "qup1_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio45";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_pins: qupv3_se3_spi_pins {
|
|
qupv3_se3_spi_miso_active: qupv3_se3_spi_miso_active {
|
|
mux {
|
|
pins = "gpio44";
|
|
function = "qup1_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_mosi_active: qupv3_se3_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio45";
|
|
function = "qup1_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio45";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_clk_active: qupv3_se3_spi_clk_active {
|
|
mux {
|
|
pins = "gpio46";
|
|
function = "qup1_se3_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio46";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_cs_active: qupv3_se3_spi_cs_active {
|
|
mux {
|
|
pins = "gpio47";
|
|
function = "qup1_se3_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
|
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "qup1_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "qup1_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i3c_pins: qupv3_se4_i3c_pins {
|
|
qupv3_se4_i3c_sda_active: qupv3_se4_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i3c_scl_active: qupv3_se4_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i3c_sda_sleep: qupv3_se4_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i3c_scl_sleep: qupv3_se4_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i3c_disable: qupv3_se4_i3c_disable {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
|
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
|
|
mux {
|
|
pins = "gpio48";
|
|
function = "qup1_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "qup1_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_clk_active: qupv3_se4_spi_clk_active {
|
|
mux {
|
|
pins = "gpio50";
|
|
function = "qup1_se4_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_cs_active: qupv3_se4_spi_cs_active {
|
|
mux {
|
|
pins = "gpio51";
|
|
function = "qup1_se4_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio51";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
|
qupv3_se5_i2c_sda_active: qupv3_se5_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio52";
|
|
function = "qup1_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_scl_active: qupv3_se5_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio53";
|
|
function = "qup1_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio53";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_miso_active: qupv3_se5_spi_miso_active {
|
|
mux {
|
|
pins = "gpio52";
|
|
function = "qup1_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_mosi_active: qupv3_se5_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio53";
|
|
function = "qup1_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio53";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_clk_active: qupv3_se5_spi_clk_active {
|
|
mux {
|
|
pins = "gpio54";
|
|
function = "qup1_se5_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio54";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_cs_active: qupv3_se5_spi_cs_active {
|
|
mux {
|
|
pins = "gpio55";
|
|
function = "qup1_se5_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
|
qupv3_se6_i2c_sda_active: qupv3_se6_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio56";
|
|
function = "qup1_se6_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_scl_active: qupv3_se6_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio57";
|
|
function = "qup1_se6_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio57";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_miso_active: qupv3_se6_spi_miso_active {
|
|
mux {
|
|
pins = "gpio56";
|
|
function = "qup1_se6_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_mosi_active: qupv3_se6_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio57";
|
|
function = "qup1_se6_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio57";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_clk_active: qupv3_se6_spi_clk_active {
|
|
mux {
|
|
pins = "gpio58";
|
|
function = "qup1_se6_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio58";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_cs_active: qupv3_se6_spi_cs_active {
|
|
mux {
|
|
pins = "gpio59";
|
|
function = "qup1_se6_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio59";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
|
|
qupv3_se8_i2c_sda_active: qupv3_se8_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup2_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_scl_active: qupv3_se8_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup2_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_pins: qupv3_se8_spi_pins {
|
|
qupv3_se8_spi_miso_active: qupv3_se8_spi_miso_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup2_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_mosi_active: qupv3_se8_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup2_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_clk_active: qupv3_se8_spi_clk_active {
|
|
mux {
|
|
pins = "gpio2";
|
|
function = "qup2_se0_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio2";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_cs_active: qupv3_se8_spi_cs_active {
|
|
mux {
|
|
pins = "gpio3";
|
|
function = "qup2_se0_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio3";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio2", "gpio3";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i3c_pins: qupv3_se8_i3c_pins {
|
|
qupv3_se8_i3c_sda_active: qupv3_se8_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
qcom,apps;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i3c_scl_active: qupv3_se8_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
qcom,apps;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i3c_sda_sleep: qupv3_se8_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio0";
|
|
function = "qup2_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
qcom,remote;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i3c_scl_sleep: qupv3_se8_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio1";
|
|
function = "qup2_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio1";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
qcom,remote;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_i3c_disable: qupv3_se8_i3c_disable {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
|
qupv3_se9_i2c_sda_active: qupv3_se9_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "qup2_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
qcom,apps;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_scl_active: qupv3_se9_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio5";
|
|
function = "qup2_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
qcom,apps;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
qcom,remote;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
|
qupv3_se9_spi_miso_active: qupv3_se9_spi_miso_active {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "qup2_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_mosi_active: qupv3_se9_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio5";
|
|
function = "qup2_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_clk_active: qupv3_se9_spi_clk_active {
|
|
mux {
|
|
pins = "gpio6";
|
|
function = "qup2_se1_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio6";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_cs_active: qupv3_se9_spi_cs_active {
|
|
mux {
|
|
pins = "gpio7";
|
|
function = "qup2_se1_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio7";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i3c_pins: qupv3_se9_i3c_pins {
|
|
qupv3_se9_i3c_sda_active: qupv3_se9_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i3c_scl_active: qupv3_se9_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio5";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i3c_sda_sleep: qupv3_se9_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio4";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i3c_scl_sleep: qupv3_se9_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio5";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio5";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i3c_disable: qupv3_se9_i3c_disable {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
|
|
qupv3_se10_i2c_sda_active: qupv3_se10_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "qup2_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_scl_active: qupv3_se10_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "qup2_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
|
|
mux {
|
|
pins = "gpio8", "gpio9";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_pins: qupv3_se10_spi_pins {
|
|
qupv3_se10_spi_miso_active: qupv3_se10_spi_miso_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "qup2_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_mosi_active: qupv3_se10_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "qup2_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_clk_active: qupv3_se10_spi_clk_active {
|
|
mux {
|
|
pins = "gpio10";
|
|
function = "qup2_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio10";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_cs_active: qupv3_se10_spi_cs_active {
|
|
mux {
|
|
pins = "gpio11";
|
|
function = "qup2_se2_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio11";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
|
|
mux {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio10", "gpio11";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9",
|
|
"gpio10", "gpio11";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i3c_pins: qupv3_se10_i3c_pins {
|
|
qupv3_se10_i3c_sda_active: qupv3_se10_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i3c_scl_active: qupv3_se10_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i3c_sda_sleep: qupv3_se10_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio8";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i3c_scl_sleep: qupv3_se10_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio9";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio9";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i3c_disable: qupv3_se10_i3c_disable {
|
|
mux {
|
|
pins = "gpio8", "gpio9";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio8", "gpio9";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
|
qupv3_se11_i2c_sda_active: qupv3_se11_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "qup2_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_scl_active: qupv3_se11_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "qup2_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
|
mux {
|
|
pins = "gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
|
qupv3_se11_spi_miso_active: qupv3_se11_spi_miso_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "qup2_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_mosi_active: qupv3_se11_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "qup2_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_clk_active: qupv3_se11_spi_clk_active {
|
|
mux {
|
|
pins = "gpio14";
|
|
function = "qup2_se2_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_cs_active: qupv3_se11_spi_cs_active {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "qup2_se3_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
|
mux {
|
|
pins = "gpio12", "gpio13",
|
|
"gpio14", "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13",
|
|
"gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i3c_pins: qupv3_se11_i3c_pins {
|
|
qupv3_se11_i3c_sda_active: qupv3_se11_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i3c_scl_active: qupv3_se11_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i3c_sda_sleep: qupv3_se11_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio12";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i3c_scl_sleep: qupv3_se11_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio13";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio13";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i3c_disable: qupv3_se11_i3c_disable {
|
|
mux {
|
|
pins = "gpio12", "gpio13";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio12", "gpio13";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
|
qupv3_se12_i2c_sda_active: qupv3_se12_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "qup2_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_scl_active: qupv3_se12_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "qup2_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
|
mux {
|
|
pins = "gpio16", "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16", "gpio17";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
|
qupv3_se12_spi_miso_active: qupv3_se12_spi_miso_active {
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "qup2_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_mosi_active: qupv3_se12_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "qup2_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_clk_active: qupv3_se12_spi_clk_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "qup2_se4_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_cs_active: qupv3_se12_spi_cs_active {
|
|
mux {
|
|
pins = "gpio19";
|
|
function = "qup2_se4_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio19";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
|
mux {
|
|
pins = "gpio16", "gpio17",
|
|
"gpio18", "gpio19";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16", "gpio17",
|
|
"gpio18", "gpio19";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
|
qupv3_se13_i2c_sda_active: qupv3_se13_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "qup2_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_scl_active: qupv3_se13_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup2_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
|
mux {
|
|
pins = "gpio20", "gpio21";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_pins: qupv3_se13_spi_pins {
|
|
qupv3_se13_spi_miso_active: qupv3_se13_spi_miso_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "qup2_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_mosi_active: qupv3_se13_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup2_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_clk_active: qupv3_se13_spi_clk_active {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "qup2_se5_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_cs_active: qupv3_se13_spi_cs_active {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "qup2_se5_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
|
|
mux {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20", "gpio21",
|
|
"gpio22", "gpio23";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_q2spi_pins: qupv3_se13_q2spi_pins {
|
|
qupv3_se13_q2spi_miso_active: qupv3_se13_q2spi_miso_active {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "qup2_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_q2spi_mosi_active: qupv3_se13_q2spi_mosi_active {
|
|
mux {
|
|
pins = "gpio21";
|
|
function = "qup2_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_q2spi_clk_active: qupv3_se13_q2spi_clk_active {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "qup2_se5_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_q2spi_doorbell_active: qupv3_se13_q2spi_cs_active {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "qup2_se5_l6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <6>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_q2spi_sleep: qupv3_se13_q2spi_sleep {
|
|
mux {
|
|
pins = "gpio21", "gpio22",
|
|
"gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio21", "gpio22",
|
|
"gpio23";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_q2spi_miso_sleep: qupv3_se13_q2spi_miso_sleep {
|
|
mux {
|
|
pins = "gpio20";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio20";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_pins: qupv3_se15_i2c_pins {
|
|
qupv3_se15_i2c_sda_active: qupv3_se15_i2c_sda_active {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "qup2_se7_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_scl_active: qupv3_se15_i2c_scl_active {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "qup2_se7_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep {
|
|
mux {
|
|
pins = "gpio28", "gpio29";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28", "gpio29";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_pins: qupv3_se15_spi_pins {
|
|
qupv3_se15_spi_miso_active: qupv3_se15_spi_miso_active {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "qup2_se7_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_mosi_active: qupv3_se15_spi_mosi_active {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "qup2_se7_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_clk_active: qupv3_se15_spi_clk_active {
|
|
mux {
|
|
pins = "gpio30";
|
|
function = "qup2_se7_l2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_cs_active: qupv3_se15_spi_cs_active {
|
|
mux {
|
|
pins = "gpio31";
|
|
function = "qup2_se7_l3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio31";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_spi_sleep: qupv3_se15_spi_sleep {
|
|
mux {
|
|
pins = "gpio28", "gpio29",
|
|
"gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28", "gpio29",
|
|
"gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i3c_pins: qupv3_se15_i3c_pins {
|
|
qupv3_se15_i3c_sda_active: qupv3_se15_i3c_sda_active {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i3c_scl_active: qupv3_se15_i3c_scl_active {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i3c_sda_sleep: qupv3_se15_i3c_sda_sleep {
|
|
mux {
|
|
pins = "gpio28";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i3c_scl_sleep: qupv3_se15_i3c_scl_sleep {
|
|
mux {
|
|
pins = "gpio29";
|
|
function = "ibi_i3c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio29";
|
|
drive-strength = <16>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se15_i3c_disable: qupv3_se15_i3c_disable {
|
|
mux {
|
|
pins = "gpio28", "gpio29";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio28", "gpio29";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c0_pins: qupv3_hub_i2c0_pins {
|
|
qupv3_hub_i2c0_sda_active: qupv3_hub_i2c0_sda_active {
|
|
mux {
|
|
pins = "gpio64";
|
|
function = "i2chub0_se0_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c0_scl_active: qupv3_hub_i2c0_scl_active {
|
|
mux {
|
|
pins = "gpio65";
|
|
function = "i2chub0_se0_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio65";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c0_sleep: qupv3_hub_i2c0_sleep {
|
|
mux {
|
|
pins = "gpio64", "gpio65";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64", "gpio65";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c1_pins: qupv3_hub_i2c1_pins {
|
|
qupv3_hub_i2c1_sda_active: qupv3_hub_i2c1_sda_active {
|
|
mux {
|
|
pins = "gpio66";
|
|
function = "i2chub0_se1_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio66";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c1_scl_active: qupv3_hub_i2c1_scl_active {
|
|
mux {
|
|
pins = "gpio67";
|
|
function = "i2chub0_se1_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio67";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c1_sleep: qupv3_hub_i2c1_sleep {
|
|
mux {
|
|
pins = "gpio66", "gpio67";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio66", "gpio67";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c2_pins: qupv3_hub_i2c2_pins {
|
|
qupv3_hub_i2c2_sda_active: qupv3_hub_i2c2_sda_active {
|
|
mux {
|
|
pins = "gpio68";
|
|
function = "i2chub0_se2_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio68";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c2_scl_active: qupv3_hub_i2c2_scl_active {
|
|
mux {
|
|
pins = "gpio69";
|
|
function = "i2chub0_se2_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio69";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c2_sleep: qupv3_hub_i2c2_sleep {
|
|
mux {
|
|
pins = "gpio68", "gpio69";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio68", "gpio69";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c3_pins: qupv3_hub_i2c3_pins {
|
|
qupv3_hub_i2c3_sda_active: qupv3_hub_i2c3_sda_active {
|
|
mux {
|
|
pins = "gpio70";
|
|
function = "i2chub0_se3_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio70";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c3_scl_active: qupv3_hub_i2c3_scl_active {
|
|
mux {
|
|
pins = "gpio71";
|
|
function = "i2chub0_se3_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio71";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c3_sleep: qupv3_hub_i2c3_sleep {
|
|
mux {
|
|
pins = "gpio70", "gpio71";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio70", "gpio71";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c4_pins: qupv3_hub_i2c4_pins {
|
|
qupv3_hub_i2c4_sda_active: qupv3_hub_i2c4_sda_active {
|
|
mux {
|
|
pins = "gpio72";
|
|
function = "i2chub0_se4_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio72";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c4_scl_active: qupv3_hub_i2c4_scl_active {
|
|
mux {
|
|
pins = "gpio73";
|
|
function = "i2chub0_se4_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio73";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c4_sleep: qupv3_hub_i2c4_sleep {
|
|
mux {
|
|
pins = "gpio72", "gpio73";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio72", "gpio73";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c5_pins: qupv3_hub_i2c5_pins {
|
|
qupv3_hub_i2c5_sda_active: qupv3_hub_i2c5_sda_active {
|
|
mux {
|
|
pins = "gpio74";
|
|
function = "i2chub0_se5_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio74";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c5_scl_active: qupv3_hub_i2c5_scl_active {
|
|
mux {
|
|
pins = "gpio75";
|
|
function = "i2chub0_se5_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio75";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c5_sleep: qupv3_hub_i2c5_sleep {
|
|
mux {
|
|
pins = "gpio74", "gpio75";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio74", "gpio75";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c6_pins: qupv3_hub_i2c6_pins {
|
|
qupv3_hub_i2c6_sda_active: qupv3_hub_i2c6_sda_active {
|
|
mux {
|
|
pins = "gpio76";
|
|
function = "i2chub0_se6_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio76";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c6_scl_active: qupv3_hub_i2c6_scl_active {
|
|
mux {
|
|
pins = "gpio77";
|
|
function = "i2chub0_se6_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio77";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c6_sleep: qupv3_hub_i2c6_sleep {
|
|
mux {
|
|
pins = "gpio76", "gpio77";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio76", "gpio77";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c7_pins: qupv3_hub_i2c7_pins {
|
|
qupv3_hub_i2c7_sda_active: qupv3_hub_i2c7_sda_active {
|
|
mux {
|
|
pins = "gpio82";
|
|
function = "i2chub0_se7_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio82";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c7_scl_active: qupv3_hub_i2c7_scl_active {
|
|
mux {
|
|
pins = "gpio83";
|
|
function = "i2chub0_se7_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio83";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c7_sleep: qupv3_hub_i2c7_sleep {
|
|
mux {
|
|
pins = "gpio82", "gpio83";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio82", "gpio83";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c8_pins: qupv3_hub_i2c8_pins {
|
|
qupv3_hub_i2c8_sda_active: qupv3_hub_i2c8_sda_active {
|
|
mux {
|
|
pins = "gpio206";
|
|
function = "i2chub0_se8_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio206";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c8_scl_active: qupv3_hub_i2c8_scl_active {
|
|
mux {
|
|
pins = "gpio207";
|
|
function = "i2chub0_se8_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio207";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c8_sleep: qupv3_hub_i2c8_sleep {
|
|
mux {
|
|
pins = "gpio206", "gpio207";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio206", "gpio207";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c9_pins: qupv3_hub_i2c9_pins {
|
|
qupv3_hub_i2c9_sda_active: qupv3_hub_i2c9_sda_active {
|
|
mux {
|
|
pins = "gpio80";
|
|
function = "i2chub0_se9_l0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c9_scl_active: qupv3_hub_i2c9_scl_active {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "i2chub0_se9_l1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
qcom,i2c_pull;
|
|
};
|
|
};
|
|
|
|
qupv3_hub_i2c9_sleep: qupv3_hub_i2c9_sleep {
|
|
mux {
|
|
pins = "gpio80", "gpio81";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio80", "gpio81";
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
usb_phy_ps: usb_phy_ps {
|
|
usb3phy_portselect_default: usb3phy_portselect_default {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "usb_phy";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
bias-pull-down;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
usb3phy_portselect_gpio: usb3phy_portselect_gpio {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* touchscreen pins */
|
|
pmx_ts_active {
|
|
ts_active: ts_active {
|
|
mux {
|
|
pins = "gpio161", "gpio162";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio161", "gpio162";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio161";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio161";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio162";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio162";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio161", "gpio162";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio161", "gpio162";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
};
|