EUD node was set to bypass the pdc since the pdc node was unavailable.
Now that it's available, set the interrupt parent to the pdc and adjust
the EUD node accordingly.
Change-Id: I2516315753a3452d66b9cad3e6bdc089bb8dcd6c
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Add DT support for RCM platform on Sun SoC.
Change-Id: I1dc5b3b432b2126b0a380437a2a19854aa1db5f1
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Correct the SID ranges for the cam_hf qtb and the mdp_hf
qtbs.
Change-Id: I0d6127248bbfac122d14ca2c600dd81d3a7d5550
Signed-off-by: Oreoluwa Babatunde <quic_obabatun@quicinc.com>
Add devicetree soccp node for Sun SoC. In addition to existing smp2p INT's
SOCCP H/W needs 2 more INT for controlling the power state of the H/W.
sleep bit and wakeup bit on master kernel corresponds to these INT.
Change-Id: I00d2f6a3fb76f306fa070df87f22bb2d07cb4c3b
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Add DT support for ATP variant on Sun SoC.
Change-Id: Icb07c87ca0ed07c81e0d3bf42e5c69147d6f1807
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add compatible string for ATP variant on Sun SoC.
Change-Id: Ibaa26b372af475afe291c78c57a1e32d4a76ea93
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Use 0x17 pmu event as miss-ev in llcc memlat for sun.
Change-Id: Ifbd710d9fcb24f7442f2b6d6d8e94f858e48c326
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Enable low power modes for sun through kernel command
line parameters.
Change-Id: Ifd4b8fcce8d6b2c0b4f6a4c2dcb088ae8c8fa661
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Common DT format for sd card changes across targets.
Change-Id: I6d3fc5141ed8e73882dcf0f95706501b8208164b
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
Add qrtr node to enable qrtr communication with the primary
vm from the trusted vm.
Change-Id: I05d3a75efebfbefc1e782f7ff7c7b01abe7e0245
Signed-off-by: Kishore Kumar Ravi <quic_kiskum@quicinc.com>
This reverts commit b57a26b88e.
There is an issue with MCQ mode. We need some time to fix
the issue, so revert to legacy UFS mode for now.
Change-Id: Iaf9a3332ba23fe3bd2be4900c79698ed32903efc
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
With commit (851140def4: Allow memory from lower 4G for adsp/cdsp/modem)
We were limiting addresses to below 4GB for ADSP/CDSP metadata passed to
TZ. The issue with S1/S2 mapping is caused by a flag in the hyp config
file, removing the restriction for ADSP/CDSP metadata memory.
Change-Id: Id42350a8ab2ddff3c74104f610d83a70681c23c6
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
Corrected/rectified dma nodes for qup2 i3c instances,
and also added ibi-controller id changes.
Change-Id: I2bbc7391fce38c231c57327547573e0de0d774c0
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
In pinctrl file there is extra space in function name for
qup1_se0_l1, which is leading to ios lines not in good state.
To solve the removed extra space.
Change-Id: I79b34f15bcf3eb52ac950876b3339c77d036983d
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Add the bindings to describe a device node for the qmsgq gunyah
transport. This device enables communication between VMs through
gunyah message queues.
Change-Id: I4ee9b8b7d7069580a3f43eb9452b17ee13b74805
Signed-off-by: Kishore Kumar Ravi <quic_kiskum@quicinc.com>
Set the proper EUD UTMI switch delay for when EUD moves between modes.
This allows for the delay to be decreased, which addresses USB core soft
reset timeouts.
Change-Id: Id3f02ad4f14b68977baa3393c692360a762b0ee2
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Sun boards that utilize the V8 power grid have a PM8550VE PMIC in
place of a PM8550VS one for the "F" PMIC at SPMI SID=5. Several
FTSMPS regulators are ganged together differently and some supplies
are shuffled around. These are the impacts for RPMh managed
regulator resources:
V6 Power Grid V8 Power Grid
S4J WCN_CX XX
S5F XX WCN_CX
S6F VDD_MXA XX
S8F N/A VDD_MXA
Update the device tree configurations for V8-specific overlays so
that the correct set of PMIC resources is present.
Change-Id: I035b8dfc87703b7681110a757952005bbdbf8a63
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add a PMIC PM8550VE_F device along with its peripheral device
subnodes. This PMIC is found on Sun boards that use the V8
power grid instead of PMIC PM8550VS_F.
Change-Id: Idf4de30a6ceb891f563341bad0e0da21dca38b69
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
