Commit Graph

26 Commits

Author SHA1 Message Date
QCTECMDR Service
70ff8be250 Merge "ARM: dts: msm: Add scm nodes to sdxkova SoC" 2024-09-10 23:35:07 -07:00
QCTECMDR Service
9d20226774 Merge "ARM: dts: msm: Move APSS RSC clients under APSS RSC node for sdxkova" 2024-09-10 20:01:35 -07:00
Khaja Hussain Shaik Khaji
9c810cff96 ARM: dts: msm: Add scm nodes to sdxkova SoC
Add scm driver nodes for sdxkova SoC.

Change-Id: I7bdf4d7e6a7c81fab3055d543877e7380ea50585
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-09-10 22:02:37 +05:30
Sarthak Garg
5b16785b02 ARM: dts: msm: Add eMMC & SD card support for sdxkova
Add eMMC & SD card support for sdxkova.

Change-Id: I0ff97235e8dc6e8fcbe80a5ae811b3832130a75c
Signed-off-by: Sarthak Garg <quic_sartgarg@quicinc.com>
2024-09-10 14:50:56 +05:30
Raghavendra Kakarla
39e309e42b ARM: dts: msm: Move APSS RSC clients under APSS RSC node for sdxkova
This change moves the APSS RSC clients under APSS RSC node
as child nodes. Earlier those were wrongly added under SOC.

Change-Id: I7e04b78a138eae18384a4ee976ff2bc0018ea30d
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2024-09-10 12:36:43 +05:30
QCTECMDR Service
88be481e76 Merge "ARM: dts: msm: Update interconnect params for QUP and UART dt node" 2024-09-09 18:28:22 -07:00
Vishnu Santhosh
c46bf07941 ARM: dts: qcom: Add aoss, aop and tme nodes for sdxkova
Add devicetree nodes to enable qmp communication with aop and tme.

Change-Id: I62d0020ca600820dd8ce256ee4cbe1ce0dc17b15
Signed-off-by: Vishnu Santhosh <quic_vishsant@quicinc.com>
2024-09-06 00:00:56 -07:00
Vishnu Santhosh
2ceed54f38 ARM: dts: msm: Add smp2p nodes for sdxkova
Add the smp2p device nodes to enable smp2p communication with remote
processors. This adds the configuration for Modem on sdxkova.

Change-Id: Ibd86fcf2a589bfb9f16a645797113f0f0345c81a
Signed-off-by: Vishnu Santhosh <quic_vishsant@quicinc.com>
2024-09-06 00:00:32 -07:00
Vishnu Santhosh
04904d20a8 ARM: dts: msm: Add smem nodes for sdxkova
Add smem nodes for sdxkova SoC.

Change-Id: I489aa0d9341cc48350a37c244135909d1686b0b5
Signed-off-by: Vishnu Santhosh <quic_vishsant@quicinc.com>
2024-09-06 12:10:36 +05:30
Sayan Dey
160a80d44a ARM: dts: msm: Add LLCC node for sdxkova SoC
Add LLCC node for sdxkova to enable last level cache controller.

Change-Id: Ief1651c1bb72a4c8f170b2fc40e9879ab4781b3d
Signed-off-by: Sayan Dey <quic_sayand@quicinc.com>
2024-09-05 11:28:18 +05:30
QCTECMDR Service
c03efb9a8d Merge "ARM: dts: qcom: Include IPCC test node for sdxkova" 2024-09-04 00:28:10 -07:00
Krishna Chaithanya Reddy G
f5fe3ae960 ARM: dts: msm: Update interconnect params for QUP and UART dt node
Currently the interconnect provider framework is expecting
the tag QCOM_ICC_TAG_ALWAYS as part of dtsi node of QUP.

In commit 481c435dd1 ("ARM: dts: qcom: sdxkova: update
interconnect providers with bcm-voter-names") interconnect
framework is not expecting the tag QCOM_ICC_TAG_ALWAYS, and
instead it is enabled by default or expects clients to override.

So, updated the QUPv3 and UART interconnects to remove the
additional interconnect tag.

Change-Id: If3780ec7156487f07cc8892a43341d1d9cb88b96
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
2024-09-03 07:00:15 -07:00
QCTECMDR Service
03e09aa933 Merge "ARM: dts: qcom: sdxkova: update interconnect providers with bcm-voter-names" 2024-09-02 11:04:36 -07:00
Keval Kulkarni
c26f69e0e0 ARM: dts: qcom: Include IPCC test node for sdxkova
Include IPCC test node for sdxkova, so IPCC kernel-tests can
run on sdxkova.

Change-Id: I96e4f925d62eec54455b8f03f46217fc402e43a5
Signed-off-by: Keval Kulkarni <quic_kevalbha@quicinc.com>
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-09-02 15:20:15 +05:30
Keval Kulkarni
2e93118b13 ARM: dts: msm: Add ipcc node for sdxkova
Add ipcc node for sdxkova to enable inter processor
communication controller.

Adjust reg format for tz-log node.

Change-Id: I5519f5b8bfc02b2c85c1654a2f39c4ec61fdee9f
Signed-off-by: Keval Kulkarni <quic_kevalbha@quicinc.com>
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-09-02 15:18:12 +05:30
Raviteja Laggyshetty
481c435dd1 ARM: dts: qcom: sdxkova: update interconnect providers with bcm-voter-names
Update interconnect provider device nodes with bcm-voter-names to route
the bandwidth requests through appropriate DRV.
Add necessary clock handles to access the QoS registers.

Change-Id: I5c271682e0b3f094d85fa759e19f8a89ae8f0eff
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
2024-09-01 21:42:05 -07:00
Prashanth K
a42a681f5d ARM: dts: msm: Add USB DT nodes for sdxkova
Add DWC3 USB controller device-tree nodes for sdxkova.

Change-Id: I9a44ad5d49dfb8bdadca04696c8580e283b5f2ec
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
2024-08-29 22:08:14 -07:00
Imran Shaik
c87edbce6a ARM: dts: qcom: Add clock controller nodes support for sdxkova
Add support for GCC, DEBUGCC, GDSC and CPUFREQ-HW-DEBUG nodes
for sdxkova platform. While at it, update the cpufreq default
governor to performance.

Change-Id: Icba0ba93cf82e576e7b645c247d2d0e7f0f6da3f
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
2024-08-30 08:01:02 +05:30
Kamal Wadhwa
a352445062 ARM: dts: msm: Add regulator support for sdxkova
Add regulator support for sdxkova.

Change-Id: I0d81c87c1d05144f8c9fe72ee3bf822541f36e61
Signed-off-by: Kamal Wadhwa <quic_kamalw@quicinc.com>
2024-08-30 07:58:55 +05:30
Raghavendra Kakarla
d1656ed916 ARM: dts: msm: Add rsc device node for sdxkova
This change adds the apps rsc device node.

Change-Id: Ia2fb73f6fce7088884d88f71fee5486b997d63dd
Signed-off-by: Raghavendra Kakarla <quic_rkakarla@quicinc.com>
2024-08-28 14:31:23 +05:30
Krishna Chaithanya Reddy G
03df3b304b ARM: dts: msm: UART dt node enablement
Enabled console UART DT nodes for sdxkova.

Change-Id: Ifbf7688758d31ed8096aaa09b2a14e077b84df7c
Signed-off-by: Krishna Chaithanya Reddy G <quic_kgangapu@quicinc.com>
2024-08-26 12:07:41 +05:30
Khaja Hussain Shaik Khaji
e78d9052db ARM: dts: qcom: Add tlmm gpio reserved ranges for sdxkova
Add the TLMM GPIO reserved ranges for the sdxkova platform.
The reserved range is set to <110 6> to ensure proper
allocation and avoid conflicts with other GPIOs.

Change-Id: I6b01f9c6a21f918df078dcbe078be602dd889898
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-08-22 12:01:50 +05:30
Yogesh Lal
98ebac6b5f ARM: dts: msm: Add aliases and tlmm node for sdxkova
Initial change to add aliases and tlmm.

Change-Id: I3c3b7c5474761b6cadcc1d7781be0f1cb9199108
Signed-off-by: Yogesh Lal <quic_ylal@quicinc.com>
2024-08-21 15:31:22 +05:30
Bibek Kumar Patro
aede871268 ARM: dts: msm: Add initial SMMU configuration for sdxkova
Add initial apps SMMU configuration for sdxkova.

Change-Id: I2084cdd5a84b94d1f3eb98bca2ef31fdf792769d
Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
2024-07-18 00:04:38 -07:00
Bibek Kumar Patro
8bc7268ce0 ARM: dts: msm: add initial memory configuration for sdxkova
Add initial memory configuration and reserved memory map
for sdxkova, inline with v1.

Change-Id: I3748f7264d39b579c6cabfb5ae0ec7dbf9da3ef0
Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
2024-07-17 23:58:07 -07:00
Khaja Hussain Shaik Khaji
97878aa1ab ARM: dts: msm: Add initial device trees for sdxkova SoC
Add initial device trees to support sdxkova SoC.

Change-Id: I6423d06ff47ad79b2601a24d65a41cb40b3a4a9a
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
2024-07-16 00:04:04 -07:00