Commit Graph

19 Commits

Author SHA1 Message Date
qctecmdr
cab3e15e48 Merge "ARM: dts: msm: Update pinctrl changes for ganges SPI instance for SUN" 2024-05-14 00:05:32 -07:00
Visweswara Tanuku
d1b871dd54 ARM: dts: msm: Ignore dependencies on children by PM framework
Change https://lore.kernel.org/all/20230525113034.46880-1-tony@atomide.com
registers serial core controller as a child of msm uart device.

Since child should suspend first, due to the child's auto suspend
delay (SERIAL_PORT_AUTOSUSPEND_DELAY_MS), additional 500msecs
delay is added during msm_geni_serial_runtime_suspend.

Added new dtsi flag 'qcom,suspend-ignore-children', to ignore
dependencies on children by runtime PM framework, this helps to
exit quickly from msm_geni_serial_runtime_suspend and save power.

Change-Id: Icac2f02ad96f45359cf1516284b7a64d2de61a79
Signed-off-by: Visweswara Tanuku <quic_vtanuku@quicinc.com>
2024-05-10 07:51:56 -07:00
qctecmdr
1bbd4c6667 Merge "ARM: dts: msm: Use upstream smmu addr space prop for qup" 2024-04-15 12:33:36 -07:00
qctecmdr
ae46773118 Merge "ARM: dts: msm: Correct the ibi interrupt number" 2024-04-12 00:45:24 -07:00
Anil Veshala Veshala
c75e149845 ARM: dts: msm: Use upstream smmu addr space prop for qup
FR92369: Memory team has noticed that buses drivers are using the
legacy "qcom,iommu-dma-addr-pool" DT property and suggested to use
Upstream compatible "iommu-addresses" DT property by this change
there is no impact in functionality.

Change-Id: Ib8b25b2b58ffd12d30672bce3afc75276637c4e1
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2024-04-12 11:38:57 +05:30
Anil Veshala Veshala
e33ee8a6cb ARM: dts: msm: Update pinctrl changes for ganges SPI instance for SUN
Updated SPI CS config for active, sleep pinctrl configurations for sun.

Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Change-Id: I5c72efcc8bca2f19f7066671109bc73b7f024cdb
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2024-04-05 21:59:12 +05:30
Chandana Kishori Chiluveru
bb30aef395 ARM: dts: msm: Add default and shutdown pinctrl configurations
This change is to add default and shutdown
pinctrl states for Q2SPI SE.

Change-Id: Ie221501a9a850cc6cb1cf8be2fb84d17579c076d
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-03-15 22:36:46 -07:00
Chandana Kishori Chiluveru
2b7c57daa4 ARM: dts: msm: Change q2spi mosi and clock sleep configuration
Change q2spi mosi and clock sleep configuration
as per client recommendation.

Change-Id: I151c86e8b4ea356aa1ff3939c1fcdc3f6d5499fa
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-03-14 03:18:30 -07:00
Chandana Kishori Chiluveru
394baea6db ARM: dts: msm: Increase default Q2SPI clock to 32MHz
Set default Q2SPI clock to 32MHz by using
dt property "q2spi-max-frequency".

Change-Id: I174876a08da50851f538a4cf5fd337e7c21ce76e
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2024-03-14 03:17:51 -07:00
Anil Veshala Veshala
af6a958824 ARM: dts: msm: Correct the ibi interrupt number
Currently ibi gpii irq configured wrongly, due to this
ibi controller doesn't generates irq. To solve this
rectified the gpii irq number.

Change-Id: I05c7f41463c19ffbf095c2ec6d217210f8d2aa8f
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2024-03-05 22:23:07 -08:00
Jyothi Kumar Seerapu
671acbec76 ARM: dts: msm: Add support of mosi, clk gpios and doorbell interrupt
Add mosi, clock gpios and doorbell interrupt for Q2SPI wakeup support
for Sun.

Change-Id: I199a1cd41b8e69799f3fc8cc1caebd67406e8744
Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
2024-02-14 16:46:51 +05:30
Anil Veshala Veshala
23738ec11d ARM: dts: msm: add spi, i2c, gpi nodes for SVM SUN
Adding spi, i2c, gsi nodes for SUN SVM.

Change-Id: If3d1336379de8441e3ca2bae8da9449f2b410d53
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2024-01-16 23:14:31 -08:00
Anil Veshala Veshala
48ee3a2d4c ARM: dts: msm: Correct the dma nodes for i3c instances
Corrected/rectified dma nodes for qup2 i3c instances,
and also added ibi-controller id changes.

Change-Id: I2bbc7391fce38c231c57327547573e0de0d774c0
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-11-28 05:34:43 -08:00
Anil Veshala Veshala
5f120fa1f8 ARM: dts: msm: Correct the IBI controller base address
corrected/rectified IBI controller base address.

Change-Id: Ib8b8c107be80a27c0e046528133ff3078c216ca6
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-11-20 20:40:52 -08:00
qctecmdr
9c1e67a367 Merge "ARM: dts: msm: add changes for tre size" 2023-11-09 07:43:34 -08:00
Anil Veshala Veshala
886152e70f ARM: dts: msm: add changes for tre size
Increased tre size to 1024 for i2c camera instance.

Change-Id: I60a7cd5bff7689a72fb6c82b224fb8ddb189205c
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
2023-11-07 22:19:55 -08:00
Chandana Kishori Chiluveru
96fb2799a5 ARM: dts: msm: Add Qupv3 Q2SPI instance for SUN
This change adds Q2SPI support on Qupv3_2 SE5 Instance.

Change-Id: I3af596d38e9997b6744f28e484f93325bbc613be
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2023-11-06 00:22:01 -08:00
Chandana Kishori Chiluveru
73c1325edd ARM: dts: msm: Add QUPv3 and GPI DT nodes on SUN
Add QUPv3(I2C, SPI, UART and I3C) and GPI DT nodes on SUN.

Change-Id: I2520da18d152eb0a30a9f735d879422e876d2d6a
Signed-off-by: Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
2023-10-17 03:36:45 -07:00
Prasanna S
cef56baa85 ARM: dts: msm: Add QUPv3 UART console node for sun
Enable console support on sun.

Change-Id: If6c1b2a81e2e18bbfee793c9188afb82dcf6f596
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
2023-05-26 00:17:23 -07:00