Rectify the interrupt numbers for display and pcie crm.
Change-Id: Idc4339263eae94266bd51964dbb2bd9dd7c31dfd
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Add test nodes for Tuna Trusted VM and OEMVM.
Change-Id: I9b7fe8d547f764e5917e48ef36f9727018a8fb79
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
GLINK PKT provides a userspace interface to RPMSG GLINK through
character device node. Add the nodes and corresponding channel
devices to enable GLINK communication from userspace.
Change-Id: Ie880b3806843fcf57fbb2f77a2d77e24ee7359b6
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Add the nodes for enable qrtr communication between primary vm and
oemvm on tuna.
This adds platform devices and vdevice descriptions to start the
qrtr gunyah transport on both primary vm and oemvm device trees. This
also adds the device tree node to configure qrtr as node id 21 on oem
vm.
Change-Id: I8697478e2e1b8269aa3b93f940a8c98f03b7c9b2
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
Add support for camera, cambistmclk and display clock controller nodes
on Kera platform. While at it, move camcc and dispcc gdsc's to real
alongwith required interconnect voting for camcc_titan_top gdsc and
updated dispcc crm property name for tuna platform.
Change-Id: I844a35d688eb4050212e11e81eae1aaa55a4a24f
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Remove invalid GPIOs and replace them with corresponding pins for Tuna
SoC.
Change-Id: I9db60c4edde97c63296380fd4df7557cf2b5d2e9
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Commit 95fd342 (pinctrl: qcom: Add missing pins for Tuna SoC and
update egpio) updates the UFS_RESET pin from 187 to 191. This commit
updates tuna UFS 'reset-gpios' to 191 to ensure proper functioning of
UFS.
Change-Id: I3e7720449ca439b8ea2c0364137408d8d91a5701
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add Camera, Display, PCIe CESTA nodes for tuna. Also disable
them in RUMI till validations are completed.
Also rename the syscon device to avoid naming conflicts.
Change-Id: Ia8238c95b18a9992efe34e34d062e3835b501dcf
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Move core_reset for SDC2 from platform-specific files to the tuna SoC.
This change ensures that the reset properties are managed centrally in
the SoC file, reducing redundancy and improving maintainability.
Change-Id: If8e6bcdac9b05275d20f1d205dfc7e6461d39b72
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes. Update gxclkctl
node to add support for gx_clkctl_gx_gdsc power domain.
While at it, keep the gdsc regulator nodes as it is on rumi platform.
Change-Id: If205c2116841ff3a11ebce4e06ca3067c4a8721b
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Mark videocc clock node as GenPD provider and disable the
video GDSC regulator nodes for tuna platform.
While at it, keep the gdsc regulator nodes as it is on rumi platform.
Change-Id: I8e8fc066ea54f16ccbc73b9b8705881b27d4d112
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
