Disable sys-therm-11 node for kera as it is not required in kera
platforms.
Change-Id: Iadc6ef3fdddfc32789540e829f96d938f3fa2cd8
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
The device tree for dma heaps on vm was incorrectly included.
so, remove it.
Fixes: 92398e011c ("ARM: dts: msm: Enable securemsm related nodes for kera")
Change-Id: Ib812725bedfd0510d6a998ecc83fe5df8619391c
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
(cherry picked from commit 0e53b492e5)
Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes.
While at it, keep the gdsc's as it is on rumi platform.
Change-Id: I91b4915723e26685e950de3ae575540ac3940036
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for cpufreq_hw and cpufreq_hw_debug nodes on kera platform.
While at it, set the default governor to performance on kera platform.
Change-Id: Id6fd146d3c80f686780591e5efa594bd76155bcd
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Mark the pcie_1 clocks as protected and remove the pcie_1 gdsc
nodes.
Change-Id: I3102a52895a6531fb82a411bdb760073fc3c28f3
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Enable QoS programming for kera and add necessary AXI and
AHB clock handles for programming QoS for USB, IPA and PCIE masters.
Change-Id: I51bcc6a841005b6daf8ab3f22a79e6704dc3b3ed
Signed-off-by: Swetha Chintavatla <quic_chintava@quicinc.com>
Currently, the node for eusb2_phy0 is defined but not used by controller
which makes the associated resources to be consumed. Therefore if phy
probes doesn't happen the controller goes into core soft reset failure.
Fix this by utilizing the node in the controller. This will call the
phy's probe and hence clocks & regulators will be initialized.
Change-Id: Ica46af01154d5e583e011e4f2d84a80fb0589ac8
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
Mark dispcc clock node as GenPD provider and disable the display GDSC
regulator nodes for kera platform.
While at it, keep the gdsc's as it is on kera-rumi platform and update
the compatible to align with freq plan.
Change-Id: If01f876b3d160cf5c1cfe6be13e3e4b42f62cfa6
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Mark videocc clock node as GenPD provider and disable the video GDSC
regulator nodes for kera platform.
While at it, keep the gdsc's as it is on kera-rumi platform.
Change-Id: I4a41aacbaa7d144f72db48b9af3a336a92ef95aa
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for rpmh and debug clock controller nodes on Kera platform.
While at it, keep rpmhcc node as dummy for KERA rumi platform.
Change-Id: Ic11513d45bbc9b3f172a411f854a2348af4bfb94
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Add support for GPU clock controller and move corresponding
gdsc's from dummy to real on Kera platform.
While at it, add the clocks property to camera and display gdscs.
Change-Id: If3061a7603035e799e7548f0e2a93b7ded0e3005
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Replace regulators with per-device genpd power domain and
add interconnect for kgsl-smmu on kera.
Change-Id: Ifcb5f866a49383b502ca9c39148fc20de46ac588
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add USB AXI clock handle for accessing USB QoS register to program QoS.
Change-Id: I4e0a0057e55283578ab6333f0da1b46c36e01fe5
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Provide separate file for SLT so that ABL can pick
it properly. Currently, ABL doesn't check if multiple
board-id is added.
Change-Id: I9140ca7b19f6b0b368798950145abbe28e32e778
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
Add support for cpufreq_hw and cpufreq_hw_debug nodes on kera platform.
While at it, set the default governor to performance on kera platform.
Change-Id: Id6fd146d3c80f686780591e5efa594bd76155bcd
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Mark the pcie_1 clocks as protected and remove the pcie_1 gdsc
nodes.
Change-Id: I3102a52895a6531fb82a411bdb760073fc3c28f3
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes.
While at it, keep the gdsc's as it is on rumi platform.
Change-Id: I91b4915723e26685e950de3ae575540ac3940036
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Currently, the node for eusb2_phy0 is defined but not used by controller
which makes the associated resources to be consumed. Therefore if phy
probes doesn't happen the controller goes into core soft reset failure.
Fix this by utilizing the node in the controller. This will call the
phy's probe and hence clocks & regulators will be initialized.
Change-Id: Ica46af01154d5e583e011e4f2d84a80fb0589ac8
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
The device tree for dma heaps on vm was incorrectly included.
so, remove it.
Fixes: 92398e011c ("ARM: dts: msm: Enable securemsm related nodes for kera")
Change-Id: Ib812725bedfd0510d6a998ecc83fe5df8619391c
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Mark dispcc clock node as GenPD provider and disable the display GDSC
regulator nodes for kera platform.
While at it, keep the gdsc's as it is on kera-rumi platform and update
the compatible to align with freq plan.
Change-Id: If01f876b3d160cf5c1cfe6be13e3e4b42f62cfa6
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
