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Author SHA1 Message Date
QCTECMDR Service
20aade8dba Merge "dt-bindings: clock: qcom: Add GCC clocks for SDX75" 2024-07-13 04:19:21 -07:00
QCTECMDR Service
eb14fbd8d3 Merge "arm64: dts: qcom: Add SDX75 platform and IDP board support" 2024-07-13 04:19:21 -07:00
QCTECMDR Service
c536af632b Merge "dt-bindings: interrupt-controller: Add SDX75 PDC compatible" 2024-07-12 04:26:17 -07:00
QCTECMDR Service
5208ad7724 Merge "ARM: dts: msm: Remove qcom,msm_fastrpc from ravelin.dtsi" 2024-07-12 04:26:17 -07:00
QCTECMDR Service
e034936786 Merge "dt-bindings: arm: qcom: Document sdxkova platform and boards" 2024-07-12 04:26:17 -07:00
QCTECMDR Service
f58e42aa02 Merge "ARM: dts: msm: Update ravelin glink node" 2024-07-12 04:26:17 -07:00
QCTECMDR Service
cd5d297206 Merge "ARM: dts: msm: gunyah: Add large dmabuf test nodes for sun" 2024-07-12 04:26:17 -07:00
QCTECMDR Service
3ded231481 Merge "ARM: dts: msm: Add ddr registers to DCC on sun" 2024-07-12 04:26:17 -07:00
QCTECMDR Service
59f476fc20 Merge "dt-bindings: clock: qcom: Add RPMHCC for SDX75" 2024-07-12 00:54:40 -07:00
QCTECMDR Service
511f0ea94f Merge "ARM: dts: msm: Disable clock gating for sun" 2024-07-12 00:54:40 -07:00
QCTECMDR Service
06fb48f5ee Merge "dt-bindings: cpufreq: cpufreq-qcom-hw: Add SDX75 compatible" 2024-07-12 00:54:40 -07:00
QCTECMDR Service
4ffba8ac66 Merge "dt-bindings: firmware: scm: Add compatible for SDX75" 2024-07-12 00:54:40 -07:00
QCTECMDR Service
3cb76104bc Merge "dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings" 2024-07-12 00:54:40 -07:00
QCTECMDR Service
d5db47e65a Merge "ARM: dts: msm: Add UFS ESI CPU mask for pineapple" 2024-07-11 11:35:23 -07:00
QCTECMDR Service
d33595e750 Merge "ARM: dts: msm: Update iova-width for gfx tbu nodes for ravelin" 2024-07-11 11:35:23 -07:00
QCTECMDR Service
330c81ed95 Merge "ARM: dts: qcom: Add fan thermal mitigation rules for SunP HDK" 2024-07-11 11:35:23 -07:00
Yuanfang Zhang
8e5cf0739a ARM: dts: msm: Add ddr registers to DCC on sun 
Add ddr registers to DCC list on sun.

Change-Id: Ie6b5485ca698760a27df47834b79f7bfd5c996e3
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
 2024-07-11 08:01:45 -07:00
QCTECMDR Service
fa4db02983 Merge "ARM: dts: msm: Enable fsa4480 in parrot dtsi" 2024-07-11 03:09:51 -07:00
Georgi Djakov
eefeac1056 ARM: dts: msm: gunyah: Add large dmabuf test nodes for sun 
Add test node to sun.dtsi, sun-vm.dtsi and sun-oemvm.dtsi
to validate large dmabuf transfer functionality.

Change-Id: I17cd06d12e18f26a6afe7c2da13fcca23a375b04
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
 2024-07-10 16:18:43 -07:00
Georgi Djakov
21e4e3bb9a dt-bindings: qcom: Add gh-large-dmabuf-test binding 
Add gh-large-dmabuf-test binding description and requirements
which include compatible, label and optional properties.

Change-Id: Ief22a3b609539ea307f289fb62e7c90b3a1284f6
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
 2024-07-10 05:53:10 -07:00
Imran Shaik
dd7144ddab dt-bindings: clock: qcom: Add GCC clocks for SDX75 
Add support for qcom global clock controller bindings for SDX75 platform.

Change-Id: I99f1a44dfe7f444c027d4b7098484ec57f8ef0d8
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-3-quic_tdas@quicinc.com
Git-Commit: 1c305ea86bc32b3f38413ef3dbb1f3c288da024e
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-10 13:51:52 +05:30
Akhil Manikoth Kallankandy
aef94e1a18 ARM: dts: msm: Update ravelin glink node 
Fix for pmic glink node for ravelin without this change glink
channel registration fails for the ADSP communication.

Change-Id: I02d1ea7b11db6e5e5dfd0f85e384797b1b6b96b9
Signed-off-by: Akhil Manikoth Kallankandy <quic_c_akhika@quicinc.com>
 2024-07-09 21:21:08 -07:00
Akhil Manikoth Kallankandy
7754de5de4 ARM: dts: msm: Remove qcom,msm_fastrpc from ravelin.dtsi 
Remove the qcom,msm_fastrpc nodes as these
are moved to dsp-devicetree.

Change-Id: I2ae6d3d27b27895859c4f1e241012d288f5f7a72
Signed-off-by: Akhil Manikoth Kallankandy <quic_c_akhika@quicinc.com>
 2024-07-09 21:18:31 -07:00
QCTECMDR Service
169dcdc551 Merge "ARM: dts: msm: Use "iommu-addresses" property for ravelin qup" 2024-07-09 16:58:32 -07:00
QCTECMDR Service
fa82bbacb8 Merge "ARM: dts: msm: Add qcom,force-low-pwm-size prop for ravelin pm6450" 2024-07-09 16:58:32 -07:00
QCTECMDR Service
11c46b34ca Merge "ARM: dts: msm: Use "iommu-addresses" property for ravelin dwc3" 2024-07-09 16:58:32 -07:00
QCTECMDR Service
4a433fcfd2 Merge "ARM: dts: msm: Add initial SMMU configuration for tuna" 2024-07-09 16:58:32 -07:00
QCTECMDR Service
4dd684956d Merge "ARM: dts: qcom: update gpu mitigation for bcl for sun" 2024-07-09 13:25:46 -07:00
QCTECMDR Service
0ce0b2ec09 Merge "ARM: dts: msm: Remove fastrpc nodes for monaco" 2024-07-09 13:25:45 -07:00
QCTECMDR Service
22f2df78be Merge "ARM: dts: qcom: Add scm, syscon,shmbridge support in Kera" 2024-07-09 13:25:45 -07:00
QCTECMDR Service
3a53bb2e2c Merge "ARM: dts: msm: Remove ipa nodes for monaco target" 2024-07-09 13:25:45 -07:00
QCTECMDR Service
72b5e3c533 Merge "dt-bindings: bridge: lt9611uxc: Add bindings" 2024-07-09 13:25:45 -07:00
Dmitry Baryshkov
183bc36233 dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings 
Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is
expected that all future platforms will use the generic qcom,smmu-500
compat string in addition to SoC-specific and the generic arm,mmu-500
ones. Older bindings are now described as deprecated.

Note: I have split the sdx55 and sdx65 from the legacy bindings. They
are not supported by the qcom SMMU implementation. I can suppose that
they are using the generic implementation rather than the
Qualcomm-speicific one.
[Add dt-bindings for qcom,smmu-500 for Qcom SoCs].

Change-Id: Id2520441f556590403ac712f68aa7487ca4f205e
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-5-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
Git-Commit: 6c84bbd103d85696af9cc0f746c01f9b2847637e
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-10 00:05:02 +05:30
Rohit Agarwal
2fcde9c1b5 dt-bindings: arm-smmu: Add SDX75 SMMU compatible 
Add devicetree binding for Qualcomm SDX75 SMMU.

Change-Id: I393b6ac159f71fdd24cfaa665ccda0271b7531b5
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/1684487350-30476-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
Git-Commit: 48989c0b25ca6ed75f3ea81053936ff0b64d02e7
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-09 23:51:28 +05:30
QCTECMDR Service
d205719b87 Merge "ARM: dts: msm: Enable parade touch driver node" 2024-07-09 10:15:17 -07:00
QCTECMDR Service
a0de938f9e Merge "ARM: dts: msm: Add smp2p for tuna" 2024-07-09 10:15:17 -07:00
Rohit Agarwal
7497d82540 arm64: dts: qcom: Add SDX75 platform and IDP board support 
Add basic devicetree support for SDX75 platform and IDP board from
Qualcomm. The SDX75 platform features an ARM Cortex A55 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, UART, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..
[Since we are not using sdx75-idp, do not include its DTS.]

Change-Id: I1562002758e7b077662c69d5d9bbef247aef157d
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-6-git-send-email-quic_rohiagar@quicinc.com
Git-Commit: 9181bb939984f1ad4f958c2be3ea10fd67344165
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-09 05:59:40 -07:00
Imran Shaik
e99a0b90c7 dt-bindings: clock: qcom: Add RPMHCC for SDX75 
Add compatible string for qcom RPMHCC for SDX75 platform.

Change-Id: Id69e2e9dc2961f70624a63053002f8e16dcfce9e
Signed-off-by: Imran Shaik <quic_imrashai@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230512122347.1219-4-quic_tdas@quicinc.com
Git-Commit: 379d72721bc4308fbc038e9858b7d2e9191725b5
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-09 14:18:27 +05:30
Khaja Hussain Shaik Khaji
10aadf0941 dt-bindings: arm: qcom: Document sdxkova platform and boards 
Document the sdxkova platform binding and also the boards using it.

Change-Id: Ifc488cf86c0113ce4df6140770b328851a786235
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-09 12:17:55 +05:30
Rohit Agarwal
60bbc15bb5 dt-bindings: arm: qcom: Document SDX75 platform and boards 
Document the SDX75 platform binding and also the boards using it.

Change-Id: I821ae00b6c461ded39383bd8a3c131bb73c5914b
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-2-git-send-email-quic_rohiagar@quicinc.com
Git-commit: f9a97656ace80c617df2d6003c815877c026a9e3
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-09 12:07:57 +05:30
Minghao Zhang
3d7db74033 ARM: dts: qcom: Add fan thermal mitigation rules for SunP HDK 
Add cpu0-0-0 zone's trip to make fan run at level 50.

Change-Id: Id3f38d165e513ec633f3a289cfddfc60284f8f7c
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
 2024-07-09 14:24:39 +08:00
Rohit Agarwal
35d997d976 dt-bindings: cpufreq: cpufreq-qcom-hw: Add SDX75 compatible 
Add compatible for EPSS CPUFREQ-HW on SDX75.

Change-Id: I7ebb70c2b05fa2c0abf70aff03302b3fc41f9419
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Git-Commit: dce13a235a356363faf9385ba34681d9fc689f1a
Git-Repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-08 10:19:45 -07:00
Rohit Agarwal
66293a0212 dt-bindings: firmware: scm: Add compatible for SDX75 
Add devicetree compatible for SCM present in SDX75 platform.

Change-Id: Ic1e101321cea49f2baf096bf57dcecc6b1c7ff17
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-3-git-send-email-quic_rohiagar@quicinc.com
Git-commit: 677b9e85e8691c0bddc35eebf6d01836e109e5f4
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-08 06:28:13 -07:00
Rohit Agarwal
0f1c118601 dt-bindings: interrupt-controller: Add SDX75 PDC compatible 
Add device tree bindings for PDC on SDX75 SOC.

Change-Id: I261abde0a5905e8934727b4b251c068203b13612
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231117082829.609882-1-quic_rohiagar@quicinc.com
Signed-off-by: Rob Herring <robh@kernel.org>
Git-commit: ca41ae8f445e0bb88fa84584b451bfbf39b2e7f1
Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
Signed-off-by: Khaja Hussain Shaik Khaji <quic_kshaikkh@quicinc.com>
 2024-07-08 06:27:25 -07:00
Manaf Meethalavalappu Pallikunhi
ce671354ea ARM: dts: qcom: update gpu mitigation for bcl for sun 
Update gpu mitigation for bcl for sun based on latest
recommendation.

Change-Id: Ieb25a08cc260252a6a71da954cb2b0e0879c35b1
Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
 2024-07-06 01:38:11 +05:30
Saranya R
f12b2d8069 ARM: dts: msm: Use "iommu-addresses" property for ravelin dwc3 
Use upstream compatible DT property "iommu-addresses" instead
of "qcom,iommu-dma-addr-pool" for dwc3 which describes the
addresses that dwc3 cannot use.
Extend the address and size cells to ensure that IOMMU returns
a 32 bit address, in order to define a region that will block
0xf0000000--0xffffffffffffffff.

Change-Id: I211ba1b8bd1f7717f639d91dddb8adb86f17b42e
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
 2024-07-04 21:40:20 -07:00
Prasad Arepalli
49adf9d13c ARM: dts: msm: Remove ipa nodes for monaco target 
Disable ipa, gsi, rmnet and smp2p nodes for monaco target.
All the nodes are added in data specific dt files.

Change-Id: I8d0ead8276702aa3a03688b4b6b99630facac926
Signed-off-by: Prasad Arepalli <quic_parepall@quicinc.com>
 2024-07-04 18:12:40 +05:30
Abhinav Parihar
9896d8515d ARM: dts: msm: Remove fastrpc nodes for monaco 
Currently fastrpc dt nodes are present in main dt file.
With fastrpc driver migrating to upstream driver,rpc
properties will be overlayed out of kernel.

Change-Id: I91d915ae9ce7d55b5e81ff10d20eb7c370740172
Signed-off-by: Abhinav Parihar <quic_parihar@quicinc.com>
 2024-07-04 03:57:30 -07:00
Lei Chen
f153d3a9d9 dt-bindings: bridge: lt9611uxc: Add bindings 
Add bindings for lt9611uxc.
Display lt9611uxc bindings snapshot from msm-5.15 branch.
commit 0a979012e870("dt-bindings: bridge: lt9611uxc: Add bindings").

Change-Id: I43999e93004393cc7b14cc9735c15388c90b33ba
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
 2024-07-04 15:37:04 +08:00
Mukesh Ojha
9aeef947f4 ARM: dts: qcom: Add scm, syscon,shmbridge support in Kera 
Add a node for scm device and sysmon, shmbridge for Kera SoC.

Change-Id: Ied886250dba41209cac68cbe52498061bd6daf51
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
 2024-07-04 12:54:33 +05:30