Switch to enable SMMU for the USB controller on sun.
Change-Id: I9b43a167beb2ab971ce48bbc5f03bf62512addc2
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
Add the psci node and change the cpu enable method to psci
on the sun SoC.
Change-Id: I86f747a87169172ac215885c6de0e19be921f99f
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Change the sun rumi dt file to compile as an overlay.
Change-Id: I56dcc5349eac12c660981da0fc75f0173b27197a
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Adjust arch timer and memtimer frequencies on the sun RUMI to stop
IRQ storms during boot.
Change-Id: Ic34a125763701ec115db82cd5ed5259fb3bd9a28
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Add tz-log node for Sun which gets updated by Resource Manager.
With out this node, device tree overlay fails.
Change-Id: I9d54da4cf32272176e12d3cd49bc21f20e688f30
Signed-off-by: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com>
Add stdout to chosen node for sun SoC and set maxcpus to 1.
Change-Id: I2633e4f96f3f9cbc047334200fc42921a5f5d6f7
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Add interconnect device bindings for Pineapple SoC. These devices
can be used to describe any RPMH and NoC based interconnect devices.
Change-Id: I5475ae5c1d6457a71b670cd17ddc53ad71566ae8
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Add documentation for qcom,ufs-phy-qrbtc-sdm845 rumi phy driver.
Change-Id: I3366aea0afbe5fec71ddc953f86ce125e42d93f8
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Enable USB related properties for USB functionality on sun.
Change-Id: Ibb522859494c0e939b46a6b790448fc2e62bd37e
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
The UCSI Glink device handles the communication between OPM on
the Application processor and PPM which is charger firmware
running on the remote subsystem (e.g. DSP) over PMIC Glink.
This is a snapshot taken as of qcom-6.1
commit de2a781818d7 ("bindings: add support for qcom,ucsi-glink")
which was then converted to yaml.
Change-Id: I1ff3756302c40c88954109b6dccaf87e59e66919
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add DT bindings for QTI battery charger which gets and sets
power supply properties by communicating with charger firmware
running on the remote subsystem (e.g. DSP) over PMIC Glink.
This is a snapshot taken as of qcom-6.1
commit 7b5e13f9043d ("dt-bindings: power: supply:
qcom,battery-charger: Add display panel property")
which was then converted to yaml.
Change-Id: I8e3aedfb70c627807388db3c449c283f35ecfd59
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
The altmode mode device provides an interface for Type-C alternate mode
clients to receive data such as Pin Assignment Notifications from the
Type-C stack running on a remote subsystem (e.g. DSP) via the PMIC GLINK
interface.
This is a snapshot taken as of qcom-6.1
commit 956e9008b1cf ("bindings: Add altmode-glink")
which was then converted to yaml.
Change-Id: Iec1cf5e64ed9b4eb93fbfa6aacc998d4f4f730e7
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
The PMIC Glink device provides the interface for clients to
communicate over GLink for sending/receiving data to/from
charger firmware that runs on a remote subsystem (e.g. ADSP)
which supports charging and gauging. Add the bindings for it.
This is a snapshot taken as of qcom-6.1
commit 2927dc2d179b ("bindings: add support for
qcom,pmic-glink") which was then converted to yaml.
Rename qcom,pmic-glink.yaml to qcom,qti-pmic-glink.yaml to
avoid a conflict with the independent upstream implementation
of this file.
Change-Id: Ia4f5ff346ebfa773bc0fe3d0410626ea67e1da31
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Add rpmh-regulator device bindings for PMIC regulator management
via the RPMh hardware block on Qualcomm Technologies, Inc. SoCs.
Change-Id: Ic31ca6eae36c51a4bff9fa740913e425e64d08b1
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Add USB PHY bindings used on MSM platforms.
Change-Id: Ifaf30337abc9b48ccad01f9b4d9aedfb877820f4
Signed-off-by: Ronak Vijay Raheja <quic_rraheja@quicinc.com>
Describe the registers of the QTB devices, and also add
devices for test purposes.
Change-Id: Ieee39df8ac89d62479a10b92c8a8c4421fcf88fc
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add ipcc and ipcc-self-ping nodes for sun SoC.
Change-Id: Ib5df260528abb33a5b25dbb1b2e22013cdcd2ee1
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Unstub the camcc device so that it starts controlling HW.
Change-Id: I41c88ef6692d7f24b2bf759ac16b6af880f09cf2
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
Enable global clock controller on Sun. Enable GCC GDSCs
and update PCIE, UFS, USB30 gdsc in respective device entries.
Change-Id: I48f8fdd536657104f5e2e238aed3383e58f29fd3
Signed-off-by: Xubin Bai <quic_xubibai@quicinc.com>
