Commit Graph

491 Commits

Author SHA1 Message Date
qctecmdr
6f231e832d Merge "ARM: dts: msm: Add cpufreq_thermal device for Sun" 2024-02-23 19:06:20 -08:00
qctecmdr
ec26fa8460 Merge "ARM: dts: msm: Remove ufs bus voting entries" 2024-02-23 02:50:34 -08:00
qctecmdr
9d4a54d341 Merge "ARM: dts: qcom: use property “iommu-addresses” for UFSHC" 2024-02-22 13:42:34 -08:00
qctecmdr
f32579f132 Merge "ARM: dts: msm: Enable ftrace in minidump for Sun/Pineapple" 2024-02-22 13:42:34 -08:00
Bao D. Nguyen
aacd5dfda2 ARM: dts: msm: Remove ufs bus voting entries
Adopt the  upstream ufs bus voting implementation using
commit <03ce80a1bb8>
("scsi: ufs: qcom: Add support for scaling interconnects").
With this implementation, the Qualcomm's bus voting parameters
are moved to the driver source code. As a result, remove the bus
voting DT entries here.

Change-Id: I6366fe76fba4022cbd97bb757eaac2183274bcd2
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
2024-02-21 22:40:26 -08:00
Kuldeep Singh
dc3fd7726c ARM: dts: msm: Add tmecom node for sun
Add DT support for tmecom driver.

Change-Id: I91efa6fd0461144a84c14ba2a6393a8b866459ff
Signed-off-by: Kuldeep Singh <quic_kuldsing@quicinc.com>
2024-02-22 12:09:58 +05:30
Ziqi Chen
82e81bc907 ARM: dts: qcom: use property “iommu-addresses” for SDC2
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
The upstream linux community has added a devicetree property
"iommu-addresses", which describes to the DMA api what IOVA
addresses a device can/cannot use. So we replace “qcom,iommu-
dma-addr-pool” by “iommu-addresses” since kernel 6.5 to follow
upstream.

Change-Id: If18f14d6cb13aa2ed67c1417295fc30723b0c932
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
2024-02-22 13:46:04 +08:00
Ziqi Chen
10d8b6507b ARM: dts: qcom: use property “iommu-addresses” for UFSHC
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
has added a devicetree property "iommu-addresses", which
describes to the DMA api what IOVA addresses a device
can/cannot use. So we replace “qcom,iommu-dma-addr-pool”
by “iommu-addresses” since kernel 6.5 to follow upstream.

Change-Id: I9c99fc931fa9a59a472f371bfb59f615f83539f4
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
2024-02-22 13:45:46 +08:00
Mike Tipton
baa9d42f02 ARM: dts: msm: Add cpufreq_thermal device for Sun
This device is necessary to notify the scheduler about CPU thermal
pressure.

Change-Id: Ibf1e636dfee32ab8b7c3b9202264603d638c577a
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
2024-02-21 10:25:09 -08:00
Mukesh Ojha
561adf361b ARM: dts: msm: Enable ftrace in minidump for Sun/Pineapple
Add ftrace_dump_on_oops in kernel cmdline to enable capture
of ftrace in minidump for pineapple/sun SoCs.

Change-Id: I1d07d01dbd5f4240f12eba53a252ec8941262623
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-02-21 03:21:01 -08:00
qctecmdr
399e6c75bf Merge "ARM: dts: msm: Update to newest memory map for sun" 2024-02-15 17:27:56 -08:00
qctecmdr
b77648da9e Merge "ARM: dts: msm: Increase secure display heap size" 2024-02-15 17:27:55 -08:00
qctecmdr
cc774f04b5 Merge "ARM: dts: qcom: Enable UFS MCQ on Sun platforms" 2024-02-15 15:07:00 -08:00
qctecmdr
542e66c4b8 Merge "ARM: dts: msm: Define tmecrashdump offset for tz-log node for sun" 2024-02-15 15:07:00 -08:00
qctecmdr
9158112b17 Merge "ARM: dts: msm: Update SW DRV IDs for sun" 2024-02-15 15:06:59 -08:00
Mike Tipton
ce647911fd ARM: dts: msm: Add display CRM SW client for Sun
Required to vote BW through the display SW client.

Change-Id: I7b49a3e1f9f47dd7634d390b46a5ebd135958bee
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
2024-02-15 12:48:45 -08:00
qctecmdr
471bd58409 Merge "ARM: dts: qcom: Add TRNG node for Sun" 2024-02-15 12:45:40 -08:00
Maulik Shah
c14c1cd136 ARM: dts: msm: Update SW DRV IDs for sun
There are 6 SW DRV IDs supported for display. Update same.

Change-Id: I5a58e7e81884e5201ef218f4418204aeed47e5ac
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2024-02-08 10:04:56 +05:30
Yeshwanth Sriram Guntuka
095057ba6f ARM: dts: msm: sun: Add common iommu group for WCNSS and ADSP
Add common iommu group for WCNSS and ADSP for direct
link use case.

Change-Id: I031283713b4f89176d574580f5b11d44f870a0ca
Signed-off-by: Yeshwanth Sriram Guntuka <quic_ysriramg@quicinc.com>
2024-02-07 17:31:29 +05:30
Patrick Daly
491d8caf96 ARM: dts: msm: Increase secure display heap size
According to the camera team, this is required due to camera hw
architecture changes on sun.

Change-Id: Iaba200c194f9758cd506cd871bd4c4853542c028
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-02-05 15:06:42 -08:00
qctecmdr
f6135c12c7 Merge "ARM: dts: msm: add reg-names to cpucp device for sun" 2024-02-04 08:59:18 -08:00
Amir Vajid
2c297e668b ARM: dts: msm: add reg-names to cpucp device for sun
Update cpucp device to include reg-names property.

Change-Id: I78d9d386971952511f66f455857adcc8ea9edf58
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2024-02-02 15:22:07 -08:00
qctecmdr
35bdcb680c Merge "ARM: dts: qcom: Add SPU related register to sun dtsi" 2024-01-31 19:30:06 -08:00
Magesh M
70cc7ae5e7 ARM: dts: qcom: Add SPU related register to sun dtsi
Added SP PBL Patch Version Register to read the SP-PBL
patch version to handle SPSS attach timed out scenario.

Change-Id: Id7ee4df5d09d9c09410bc24fc475ee2a36fca246
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
2024-01-31 14:10:58 -08:00
Ping Li
24c9075c78 ARM: dts: msm: add entry for ssip fuse configuration
Add dtsi entry for ssip fuse configuration on Sun platform.

Change-Id: I1f6dbc9608db1e29aef1d9699820eb1e1d3c9299
Signed-off-by: Ping Li <quic_pingli@quicinc.com>
2024-01-29 22:38:36 -08:00
qctecmdr
eb86f9ab3b Merge "ARM: dts: msm: PCIe SM related power control override" 2024-01-29 17:54:03 -08:00
Anirudh Raghavendra
ae18704842 ARM: dts: msm: Add CMA node for secure DSP
Add CMA memory node for secure fastrpc usecases.

Change-Id: I3c8cf93a91025ebbcb570db6d7b0b82a1554bbb7
Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com>
2024-01-26 10:01:58 -08:00
qctecmdr
112bc2fad5 Merge "ARM: dts: msm: Unstub interconnect skip-qos for Sun" 2024-01-24 14:14:10 -08:00
Prudhvi Yarlagadda
af53bd39cf ARM: dts: msm: PCIe SM related power control override
We need to override the PCIe SM PWR_CTRL and PWR_CTRL_MASK
registers so that CXPC can happen when pcie driver is not probed.

Without this change, CXPC will be blocked when the pcie driver is
not probed as there will be no notification from PCIe SM entity to
allow CXPC. Once we these registers are written 0x1, no one will
wait for PCIe SM to allow CXPC.

Change-Id: I8d1542deb4fcc10849c848aa73718a47af556719
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
2024-01-24 11:51:03 -08:00
Tyler Wear
4046985c3c ARM: dts: msm: Add SMEM Mailbox SMP2P nodes for Sun
Make changes to enable SMEM Mailbox SMP2P nodes for sun to
communicate with modem.

Change-Id: Iea261c8f42768c05eec7caf62adcd1dcc93cd950
Signed-off-by: Tyler Wear <quic_twear@quicinc.com>
2024-01-22 17:31:39 -08:00
Patrick Daly
71531cf0fe ARM: dts: msm: Update to newest memory map for sun
Update to memory map v4.

Additionally, sort hwfence-shmem and tz_merged_region in ascending order.

Change-Id: Ia45a28a1f0f0025cad0c947d19f2c27dcf94516a
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-01-22 15:00:58 -08:00
qctecmdr
a0603b5200 Merge "ARM: dts: msm: Add CRMV regs disp, camera and pcie on sun" 2024-01-21 04:41:06 -08:00
qctecmdr
84035df1fc Merge "ARM: dts: qcom: Add keep-running flag to trustedvm loader node for sun" 2024-01-19 17:41:13 -08:00
Minghao Zhang
f3bd05ce44 ARM: dts: msm: Add CRMV regs disp, camera and pcie on sun
CRMV regs have status captured for various commands/voltage levels.
Map CRMV registers in device so that driver can dump them when required.

Change-Id: I05911a0646b2317f90fd425e172d0458ce669ab0
Signed-off-by: Minghao Zhang <quic_minghao@quicinc.com>
2024-01-18 21:46:52 -08:00
qctecmdr
5a7340943e Merge "ARM: dts: qcom: Use non-coherent on QCE CB" 2024-01-18 15:29:25 -08:00
Kuldeep Singh
a72c9ea161 ARM: dts: msm: Define tmecrashdump offset for tz-log node for sun
Tmecrashdump ddr offset is per target defined value and is needed as an
input to tz-log driver to display tme logs in userpace.
Add support for sun.

Change-Id: I58584a0660f489299522c658b984370d800a8143
Signed-off-by: Kuldeep Singh <quic_kuldsing@quicinc.com>
2024-01-18 10:07:06 -08:00
Vivek Aknurwar
f97f852e1c ARM: dts: msm: Unstub interconnect skip-qos for Sun
Unstub skip-qos for mmnoc, gem_noc and aggre noc so that
required noc-qos settings are set.

Change-Id: I198b68f81691f7281593195c52d172fd8917186e
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
2024-01-18 09:37:50 -08:00
qctecmdr
2ba71f4b64 Merge "ARM: dts: msm: Disable glink edge for soccp" 2024-01-17 19:42:44 -08:00
qctecmdr
7c36f7f008 Merge "ARM: dts: msm: enable memory object extension for si-core" 2024-01-17 19:42:44 -08:00
Cong Zhang
385c4e3558 ARM: dts: qcom: Add keep-running flag to trustedvm loader node for
sun

Add keep-running flag to trustedvm loader node for sun.

Change-Id: I908030b52c409d25ccaaf5623eb384cda13cc922
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
2024-01-18 11:23:12 +08:00
Gokul krishna Krishnakumar
46d616adf3 ARM: dts: msm: Disable glink edge for soccp
GLink interrupt is being sent to SOCCP and is waking SOCCP which is
causing SOCCP not to go into D3 (suspend) state when SOCCP is taken
out of reset as there is no handshake between remoteproc & GLink.
Disable GLink edge until proper fix is identified.

Change-Id: I0282f09085bea2e2e3f93cc17841b2a2720e7b1a
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-01-17 16:32:44 -08:00
qctecmdr
5d39ee9ed8 Merge "ARM: dts: msm: Add System Health Monitor DT node for Sun" 2024-01-17 10:28:17 -08:00
qctecmdr
d15d5b36a0 Merge "ARM: dts: msm: Remove fastrpc glink node" 2024-01-16 01:36:23 -08:00
qctecmdr
f44f619528 Merge "dt-bindings: Add QDSS clock node for LLCC Perfmon" 2024-01-14 20:48:04 -08:00
Daniel Perez-Zoghbi
e495a11e0a ARM: dts: qcom: Use non-coherent on QCE CB
Switch to using dma-noncoherent context bank on qce. Dma-coherent was
causing stale data to be read. SS confirmed that this was fixed by using
dma-noncoherent. Using explicit dma-noncoherent because the parent node,
qcedev, is dma-coherent, and the context bank would inherit it.

Change-Id: Ic6f45b15a9eb29bc7317fd824318cb219a29e0c2
Signed-off-by: Daniel Perez-Zoghbi <quic_dperezzo@quicinc.com>
2024-01-12 16:33:37 -08:00
Unnathi Chalicheemala
f612c33c32 ARM: dts: msm: Add System Health Monitor DT node for Sun
Add System Health Monitor node with MPSS subsystem support for
Sun SoC.

Change-Id: Ie6fd1cf0e765bd6ef55c230d68066bf8a3115f75
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
2024-01-11 17:29:10 -08:00
quic_anane
a454481d80 ARM: dts: msm: Remove fastrpc glink node
FastRPC node is added under glink node to provide intent
information. With fastrpc driver migrating to upstream
driver, this property will be overlayed from out of
kernel. Also update glink label for adsp and cdsp.

Change-Id: Ia7463d32369e02637abe4bfab5c18cf2bc8d5b03
Signed-off-by: quic_anane <quic_anane@quicinc.com>
2024-01-11 17:47:42 +05:30
Udit Tiwari
06ad45f10b ARM: dts: qcom: Add TRNG node for Sun
The Sun SoC has a True Random Number Generator, add the node with
the correct compatible set.

Change-Id: I67837f8e674be6445e35b4b1512b890f43861e4f
Signed-off-by: Udit Tiwari <quic_utiwari@quicinc.com>
2024-01-11 14:25:20 +05:30
Amirreza Zarrabi
b45da59563 ARM: dts: msm: enable memory object extension for si-core
Add DT entry to enable the memory onject support for
smcinvoke.

Change-Id: I87b62b048e94e2aad2a8329b275bbd8d75ae6cc7
Signed-off-by: Amirreza Zarrabi <quic_azarrabi@quicinc.com>
2024-01-10 17:42:57 -08:00
Satya Durga Srinivasu Prabhala
a238a42a5f ARM: dts: msm: increase dmesg buffer size to 512K from 256K
As soon as device boots up, there are few test cases like boot KPIs
which rely on dmesg, but by the time these tests are run on Sun,
buffer is getting overwritten and test cases were failing.
To unblock the tests, increase buffer size to 512K from 256K.

Change-Id: Ie6a810297553d1a104d00f87dae3bff51dac7b95
Signed-off-by: Satya Durga Srinivasu Prabhala <quic_satyap@quicinc.com>
2024-01-10 13:54:22 -08:00