To access gpios from apps and adsp, we have added apps and
remote flag in dtsi. To identify apps is busy or not, added
qcom-apps flag during active state and added qcom-remote flag
during suspend state, so other SS can use gpios during apps
in suspend state. with this flags in pinctrl file for respective
GPIOs will help eGPIO to work for AON camera usecase.
Change-Id: I621ae6be653fe89034245d80b650afd8893c7e41
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Add the PCIe CRM bcm-voters, which are required to support voting BW on
behalf of the PCIe CRM HW clients.
Change-Id: Ic02fe99d26f80c9f156268aed452073cafd768ee
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Add the device_type property in the pci device tree as a mandatory
property so that the ranges property will be read correctly by
the of framework (of.c) file when pci framework is parsing the
pci device tree nodes.
Also add the qcom,cesta-l1sub-timeout-ext-int property as an
optional property for the platforms that have cesta clkreq routing
bit disabled and legacy l1ss timeout enabled by default.
The presence of this property on a cesta enabled platform will
enable routing of the L1ss timeout interrupt to cesta HW block
instead of routing it to APPS subsystem.
Change-Id: I96db05d6cd38f507c7ddba968ee65808b8263076
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Change the pcie devicetree node names to be in line with the
pci-bus.yaml format.
Change-Id: I46b56b7aee492c746554ac2a3575cd11c2108efb
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Change the pcie devicetree node names to be in line with the
pci-bus.yaml format.
Change-Id: Ic7d5158f988163e6053df27aa8084a1a1f5b8f0d
Signed-off-by: Prudhvi Yarlagadda <quic_pyarlaga@quicinc.com>
Rename node name for modem-diag node and add memory-region
for modem-etr1 on sun.
Change-Id: I8430a422d3b2bbb2ea7ecd489b675bd946ef29c1
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
Increased tre size to 1024 for i2c camera instance.
Change-Id: I60a7cd5bff7689a72fb6c82b224fb8ddb189205c
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
on KP4.0
On KP4.0 Pineapple changes for qupv3 doesn't have latest changes
when compared to KP3.0, updated all missing changes for i2c/i3c.
Change-Id: Iada78f857dde1f02565111fa92e5ad64ccd6b553
Signed-off-by: Anil Veshala Veshala <quic_aveshala@quicinc.com>
Add device tree support for v8 Power Grid on MTP, CDP, QRD
platforms for Sun SoC.
Change-Id: Iceac9ff05e97fb384f1bb0e641ad6ec568d75076
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add NFC support for MTP, CDP platforms on Sun SoC.
Change-Id: I93755e3861d5d075f020ea5856caed56d57db922
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add v1 and v2 DT support for APQ variant on MTP, CDP
and QRD platforms.
Change-Id: Ifb447f14db06038d537951bd9b37f279c4757c0b
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add compatible strings for APQ variant of Sun SoC on MTP, CDP and
QRD platforms.
Change-Id: I8dd8e0ec70d2c1fd6fe931cc312a114a7c1076cd
Signed-off-by: Unnathi Chalicheemala <quic_uchalich@quicinc.com>
Add VADC channels provided by pmk8550 that are used by thermal clients
on Sun. Also, add the corresponding thermal zone devices.
Change-Id: Ia3113ff6f5c76cd7f4582808b1672d3ddecadab7
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Currently, PM8550VS and PM8550VE ADC channels are using old macros for
register address. Update device nodes so that they use the new
PM8550VX_ADC5_GEN3_<channel>(sid) macros.
Change-Id: I151d965a3eb03ad318deb21dea47170e5806f37a
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Some firmware images support the processing of SMC calls via the
waitqueue mechanism. Add compatible string to support this feature.
Change-Id: I2ccc760a886d1fb9bd0f2a1581933ac93aa0e276
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add tlmm VM test driver device tree support for Sun.
Change-Id: I131fcdaec94b6551d99753108276cfc8126187db
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
Add CPU hotplug and pause cooling device to hotplug or pause any
CPU under thermal conditions on sun. Added the respective pause and
hotplug cooling maps to the CPUs and added cooling-cells property for
each CPU.
Change-Id: I6753ee0d77511d58ba313707381f2e0b9114eeed
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
