samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0

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CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3702303           Id3ba8542 ARM: dts: msm: update BW limits for sun target
3699043           I2d403a15 ARM: dts: msm: Add pack type for SPR on sun target
3696785           I548cef05 ARM: dts: msm: update ucsc version
3696785           I57a0a07f ARM: dts: msm: Update LTM version to 1.3
3696785           I1f570147 ARM: dts: msm: Update IGC versions for high-precision mode
3691260           I0a2eb94d ARM: dts: msm: replace smmu address property for sun target
3696785           Iad137c4f ARM: dts: msm: update DSPP GC/PCC version

CRs-Included: 3696785,3702303,3691260,3699043

Change-Id: Idcfe6a377383b30086eb2e72f117188949dbbc4c
Signed-off-by: Linux Display <lnxdisplay@localhost>
This commit is contained in:
Linux Display
2024-01-11 00:06:11 +05:30
parent 7d37495c68 94f9a0714a
commit c5041f1b62
6 changed files with 36 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
display/dsi-panel-nt37801-dsc-wqhd-plus-cmd-cphy.dtsi
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@@ -32,6 +32,7 @@
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
qcom,panel-cphy-mode;
qcom,spr-pack-type = "pentile";
qcom,mdss-dsi-display-timings {
timing@0 {

1
display/dsi-panel-nt37801-dsc-wqhd-plus-cmd.dtsi
View File

@@ -34,6 +34,7 @@
qcom,mdss-dsi-te-dcs-command = <1>;
qcom,mdss-dsi-te-check-enable;
qcom,mdss-dsi-te-using-te-pin;
qcom,spr-pack-type = "pentile";
qcom,mdss-dsi-display-timings {
timing@0 {
cell-index = <0>;

1
display/dsi-panel-nt37801-dsc-wqhd-plus-video-cphy.dtsi
View File

@@ -22,6 +22,7 @@
qcom,mdss-dsi-tx-eot-append;
qcom,adjust-timer-wakeup-ms = <1>;
qcom,panel-cphy-mode;
qcom,spr-pack-type = "pentile";
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;

1
display/dsi-panel-nt37801-dsc-wqhd-plus-video.dtsi
View File

@@ -27,6 +27,7 @@
qcom,mdss-dsi-wr-mem-start = <0x2c>;
qcom,mdss-dsi-wr-mem-continue = <0x3c>;
qcom,spr-pack-type = "pentile";
qcom,mdss-dsi-display-timings {
timing@0 {
cell-index = <0>;

44
display/sun-sde-common.dtsi
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@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -177,8 +177,8 @@
qcom,sde-has-dest-scaler;
qcom,sde-max-trusted-vm-displays = <1>;
qcom,sde-max-bw-low-kbps = <17000000>;
qcom,sde-max-bw-high-kbps = <27000000>;
qcom,sde-max-bw-low-kbps = <18900000>;
qcom,sde-max-bw-high-kbps = <28500000>;
qcom,sde-min-core-ib-kbps = <2500000>;
qcom,sde-min-llcc-ib-kbps = <0>;
qcom,sde-min-dram-ib-kbps = <800000>;
@@ -285,10 +285,10 @@
qcom,sde-fp16-unmult = <0x200 0x00010000>;
qcom,sde-fp16-gc = <0x200 0x00010000>;
qcom,sde-fp16-csc = <0x200 0x00010000>;
qcom,sde-ucsc-igc = <0x700 0x00010000>;
qcom,sde-ucsc-unmult = <0x700 0x00010000>;
qcom,sde-ucsc-gc = <0x700 0x00010000>;
qcom,sde-ucsc-csc = <0x700 0x00010000>;
qcom,sde-ucsc-igc = <0x700 0x00010001>;
qcom,sde-ucsc-unmult = <0x700 0x00010001>;
qcom,sde-ucsc-gc = <0x700 0x00010001>;
qcom,sde-ucsc-csc = <0x700 0x00010001>;
qcom,sde-ucsc-alpha-dither = <0x700 0x00010000>;
};
@@ -298,10 +298,10 @@
qcom,sde-fp16-unmult = <0x280 0x00010000>;
qcom,sde-fp16-gc = <0x280 0x00010000>;
qcom,sde-fp16-csc = <0x280 0x00010000>;
qcom,sde-ucsc-igc = <0x1700 0x00010000>;
qcom,sde-ucsc-unmult = <0x1700 0x00010000>;
qcom,sde-ucsc-gc = <0x1700 0x00010000>;
qcom,sde-ucsc-csc = <0x1700 0x00010000>;
qcom,sde-ucsc-igc = <0x1700 0x00010001>;
qcom,sde-ucsc-unmult = <0x1700 0x00010001>;
qcom,sde-ucsc-gc = <0x1700 0x00010001>;
qcom,sde-ucsc-csc = <0x1700 0x00010001>;
qcom,sde-ucsc-alpha-dither = <0x1700 0x00010000>;
};
};
@@ -314,10 +314,10 @@
qcom,sde-fp16-unmult = <0x200 0x00010000>;
qcom,sde-fp16-gc = <0x200 0x00010000>;
qcom,sde-fp16-csc = <0x200 0x00010000>;
qcom,sde-ucsc-igc = <0x700 0x00010000>;
qcom,sde-ucsc-unmult = <0x700 0x00010000>;
qcom,sde-ucsc-gc = <0x700 0x00010000>;
qcom,sde-ucsc-csc = <0x700 0x00010000>;
qcom,sde-ucsc-igc = <0x700 0x00010001>;
qcom,sde-ucsc-unmult = <0x700 0x00010001>;
qcom,sde-ucsc-gc = <0x700 0x00010001>;
qcom,sde-ucsc-csc = <0x700 0x00010001>;
qcom,sde-ucsc-alpha-dither = <0x700 0x00010000>;
};
@@ -327,24 +327,24 @@
qcom,sde-fp16-unmult = <0x200 0x00010000>;
qcom,sde-fp16-gc = <0x200 0x00010000>;
qcom,sde-fp16-csc = <0x200 0x00010000>;
qcom,sde-ucsc-igc = <0x1700 0x00010000>;
qcom,sde-ucsc-unmult = <0x1700 0x00010000>;
qcom,sde-ucsc-gc = <0x1700 0x00010000>;
qcom,sde-ucsc-csc = <0x1700 0x00010000>;
qcom,sde-ucsc-igc = <0x1700 0x00010001>;
qcom,sde-ucsc-unmult = <0x1700 0x00010001>;
qcom,sde-ucsc-gc = <0x1700 0x00010001>;
qcom,sde-ucsc-csc = <0x1700 0x00010001>;
qcom,sde-ucsc-alpha-dither = <0x1700 0x00010000>;
};
};
qcom,sde-dspp-blocks {
qcom,sde-dspp-igc = <0x1260 0x00040000>;
qcom,sde-dspp-igc = <0x1260 0x00050000>;
qcom,sde-dspp-hsic = <0x800 0x00010007>;
qcom,sde-dspp-memcolor = <0x880 0x00010007>;
qcom,sde-dspp-hist = <0x800 0x00010007>;
qcom,sde-dspp-sixzone = <0x900 0x00020000>;
qcom,sde-dspp-vlut = <0xa00 0x00010008>;
qcom,sde-dspp-gamut = <0x1000 0x00040003>;
qcom,sde-dspp-pcc = <0x1700 0x00040000>;
qcom,sde-dspp-gc = <0x17c0 0x00010008>;
qcom,sde-dspp-pcc = <0x1700 0x00060000>;
qcom,sde-dspp-gc = <0x17c0 0x00020000>;
qcom,sde-dspp-dither = <0x82c 0x00010007>;
};
};

14
display/sun-sde.dtsi
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
@@ -181,10 +181,16 @@
};
};
smmu_sde_iommu_region_partition: smmu_sde_iommu_region_partition {
iommu-addresses = <&smmu_sde_unsec 0x0 0x00060000>,
<&smmu_sde_unsec 0xd5500000 0x02b00000>,
<&smmu_sde_sec 0x0 0x00020000>;
};
smmu_sde_unsec: qcom,smmu_sde_unsec_cb {
compatible = "qcom,smmu_sde_unsec";
iommus = <&apps_smmu 0x800 0x2>;
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
memory-region = <&smmu_sde_iommu_region_partition>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-earlymap; /* for cont-splash */
dma-coherent;
@@ -193,7 +199,7 @@
smmu_sde_sec: qcom,smmu_sde_sec_cb {
compatible = "qcom,smmu_sde_sec";
iommus = <&apps_smmu 0x801 0x0>;
qcom,iommu-dma-addr-pool = <0x00020000 0xfffe0000>;
memory-region = <&smmu_sde_iommu_region_partition>;
qcom,iommu-faults = "non-fatal";
qcom,iommu-vmid = <0xa>;
};
@@ -231,7 +237,7 @@
qcom,sde-has-idle-pc;
qcom,sde-ib-bw-vote = <2500000 0 800000>;
qcom,sde-dspp-ltm-version = <0x00010002>;
qcom,sde-dspp-ltm-version = <0x00010003>;
/* offsets are based off dspp 0, 1, 2, and 3 */
qcom,sde-dspp-ltm-off = <0x15300 0x14300 0x13300 0x12300>;