Merge 2e80498372 on remote branch
Change-Id: Ia218ab5c48b721d2ff8a6c471237b29470377e12
This commit is contained in:
Linux Build Service Account
@@ -6,6 +6,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
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title: Qualcomm Technologies, Inc. Low Power Management Cluster Device
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||||
|
||||
maintainers:
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- Maulik Shah <quic_mkshah@quicinc.com>
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||||
|
||||
description: |
|
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The application processor can do a variety of cluster level low power modes.
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It does so by predicting the low power mode based on latency and residency
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@@ -21,6 +24,21 @@ properties:
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power-domains:
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maxItems: 1
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qcom,pred-prem-cnt:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Number of premature exits cluster device considers for prediction.
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qcom,sample-invalid-time:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Time after which past samples are invalidated.
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qcom,use-cluster-bias-timer:
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type: boolean
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description:
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Used to determine if bias timer to be setup for cluster
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required:
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- compatible
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- power-domains
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@@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/qcom,evacc-sun.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. Eva Clock Controller Binding for SUN
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title: Qualcomm Technologies, Inc. Eva Clock Controller for SUN
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maintainers:
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- Xubin Bai <quic_xubibai@quicinc.com>
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@@ -14,10 +14,13 @@ description: |
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See also:
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- dt-bindings/clock/qcom,evacc-sun.h
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- dt-bindings/clock/qcom,evacc-tuna.h
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properties:
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compatible:
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const: qcom,sun-evacc
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enum:
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- qcom,sun-evacc
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- qcom,tuna-evacc
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clocks:
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items:
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@@ -22,6 +22,7 @@ description: |
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dt-bindings/clock/qcom,videocc-pineapple.h
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dt-bindings/clock/qcom,videocc-sun.h
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dt-bindings/clock/qcom,videocc-parrot.h
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dt-bindings/clock/qcom,videocc-tuna.h
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properties:
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compatible:
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@@ -36,6 +37,7 @@ properties:
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- qcom,sun-videocc
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- qcom,sun-videocc-v2
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- qcom,parrot-videocc
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- qcom,tuna-videocc
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clocks:
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items:
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@@ -155,6 +155,12 @@ properties:
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for HAP525_HV haptics module.
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type: boolean
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qcom,sw-cmd-freq-detect:
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description: |
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Boolean flag indicating that software command based frequency detection
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method is used for LRA resonant frequency detection.
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type: boolean
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patternProperties:
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".*hap-swr-slave-reg$":
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description: |
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@@ -37,6 +37,7 @@ properties:
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- qcom,parrot-pdc
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- qcom,ravelin-pdc
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- qcom,tuna-pdc
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- qcom,kera-pdc
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- const: qcom,pdc
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reg:
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125
bindings/power/supply/qcom/qcom-qbg.yaml
Normal file
125
bindings/power/supply/qcom/qcom-qbg.yaml
Normal file
@@ -0,0 +1,125 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/power/supply/qcom/qcom-qbg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. Battery Gauge (QBG)
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maintainers:
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- Kamal Wadhwa <quic_kamalw@quicinc.com>
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description: |
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Qualcomm Technologies, Inc. Battery Gauge (QBG) uses the periodic samples of
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battery voltage and current to determine the battery state-of-charge (SOC)
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and supports other battery management features.
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properties:
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compatible:
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const: qcom,qbg
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reg:
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description: Base address of QBG MAIN peripheral.
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maxItems: 1
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interrupts:
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description: Specifies the interrupts for nvmem devices used by QBG.
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maxItems: 1
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interrupt-names:
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description: Specifies the interrupt names for nvmem devices used by QBG.
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items:
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- const: qbg-sdam
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$ref: /schemas/types.yaml#/definitions/string-array
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qcom,num-data-sdams:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Number of SDAMs used for storing QBG FIFO data.
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qcom,sdam-base:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Base address of QBG SDAM peripheral.
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qcom,vbat-cutoff-mv:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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The battery voltage threshold (in mV) at which the battery
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power cuts off. The SOC is forced to 0 when battery voltage reaches
|
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this value.
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default: 3100
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qcom,ibat-cutoff-ma:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: The battery current threshold (in mA) at which the battery
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power cuts off. The SOC is forced to 0 when battery current reaches
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this value.
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default: 150
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qcom,vph-min-mv:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Minimum sustainable system power (in mV).
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default: 2700
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qcom,iterm-ma:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: The battery current (in mA) at which the QBG algorithm
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converges the SOC to 100% during charging and can be used to terminate
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charging.
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default: 100
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qcom,rconn-mohm:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Resistance of the battery connector in mOhms.
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default: 0
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qcom,vbatt-empty-threshold-mv:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Vbatt empty threshold in mv at which QBG generates low Vbatt
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||||
interrupt.
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||||
default: 0
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||||
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||||
nvmem-cell-names:
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items:
|
||||
- const: qbg_debug_mask_low
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- const: qbg_debug_mask_high
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- const: skip_esr_state
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nvmem-cells:
|
||||
description: |
|
||||
Use nvmem cell device to indicate SDAM register.
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qbg_debug_mask_low/qbg_debug_mask_high used to store the qbg debug mask
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||||
qbg_debug_mask_low/qbg_debug_mask_high not used then will not write or
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read qbg debug mask.
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||||
skip_esr_state used to get GPS de-modulating status.
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||||
skip_esr_state not used will not get GPS de-modulating status and
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||||
will not enter esr state.
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||||
|
||||
maxItems: 3
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||||
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||||
required:
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||||
- compatible
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||||
- reg
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||||
- interrupt-names
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||||
- interrupts
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||||
- qcom,num-data-sdams
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||||
- qcom,sdam-base
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||||
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||||
additionalProperties: False
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||||
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||||
examples:
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||||
- |
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||||
#include <dt-bindings/interrupt-controller/irq.h>
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||||
qcom,pm5100@0 {
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||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
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||||
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||||
qbg@4f00 {
|
||||
compatible = "qcom,qbg";
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reg = <0x4f00>;
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||||
interrupt-names = "qbg-sdam";
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interrupts = <0x0 0x76 0x1 IRQ_TYPE_EDGE_RISING>;
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||||
qcom,num-data-sdams = <6>;
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||||
qcom,sdam-base = <0x7600>;
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||||
};
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||||
};
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...
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696
bindings/power/supply/qcom/qpnp-smb5.yaml
Normal file
696
bindings/power/supply/qcom/qpnp-smb5.yaml
Normal file
@@ -0,0 +1,696 @@
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||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
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||||
---
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||||
$id: http://devicetree.org/schemas/power/supply/qcom/qpnp-smb5.yaml#
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||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
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||||
|
||||
title: Qualcomm Technologies, Inc. QPNP-SMB5 Charger
|
||||
|
||||
maintainers:
|
||||
- Kamal Wadhwa <quic_kamalw@quicinc.com>
|
||||
|
||||
description: |
|
||||
SMB5 Charger is an efficient programmable battery charger capable of charging a
|
||||
high-capacity lithium-ion battery over micro-USB or USB Type-C ultrafast with
|
||||
Quick Charge 2.0, Quick Charge 3.0, and USB Power Delivery support. Wireless
|
||||
charging features full A4WP Rezence 1.2, WPC 1.2, and PMA support.
|
||||
|
||||
Required Node Structure:
|
||||
SMB5 Charger must be described in two levels of devices nodes.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,pm8150-smb5
|
||||
- qcom,pm7250b-smb5
|
||||
- qcom,pm6150-smb5
|
||||
- qcom,pmi632-smb5
|
||||
- qcom,qpnp-smb5
|
||||
|
||||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
qcom,sec-charger-config:
|
||||
description: |
|
||||
Specify how the secondary chargers are configured.
|
||||
0 - No secondary charger.
|
||||
1 - Charge Pump SMB1390.
|
||||
2 - SMB1355 parallel charger.
|
||||
3 - Both Charge Pump and SMB1355.
|
||||
If the value is not present, 0 is used as default
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
io-channels:
|
||||
description: From common IIO bindings. Used to specify the ADC channel to get the required data.
|
||||
|
||||
io-channel-names:
|
||||
description: |
|
||||
From common IIO binding. Use to specify the name of IIO channel to be obtained.
|
||||
|
||||
qcom,batteryless-platform:
|
||||
description: |
|
||||
Boolean flag which indicates that the platform does not have a
|
||||
battery, and therefore charging should be disabled. In
|
||||
addition battery properties will be faked such that the device
|
||||
assumes normal operation.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,charger-temp-max:
|
||||
description: |
|
||||
Specifies the charger temp REG_H_THRESHOLD for PM8150B in deciDegC.
|
||||
If the value is not present, use the setting read from the device.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,smb-temp-max:
|
||||
description: |
|
||||
Specifies the charger temp REG_H_THRESHOLD for SMB1355 in deciDegC.
|
||||
If the value is not present, use the setting read from the device.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,fcc-max-ua:
|
||||
description: |
|
||||
Specifies the maximum fast charge current in micro-amps.
|
||||
If the value is not present, 1Amp is used as default.
|
||||
default: 1000000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,fv-max-uv:
|
||||
description: |
|
||||
Specifies the maximum float voltage in micro-volts.
|
||||
If the value is not present, 4.35V is used as default.
|
||||
default: 4350000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,usb-icl-ua:
|
||||
description: |
|
||||
Specifies the USB input current limit in micro-amps.
|
||||
If the value is not present, 1.5Amps is used as default.
|
||||
default: 1500000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,usb-ocl-ua:
|
||||
description: |
|
||||
Specifies the OTG output current limit in micro-amps.
|
||||
If the value is not present, 1.5Amps is used as default
|
||||
default: 1500000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,dc-icl-ua:
|
||||
description: |
|
||||
Specifies the DC input current limit in micro-amps.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,boost-threshold-ua:
|
||||
description: |
|
||||
Specifies the boost current threshold in micro-amps.
|
||||
If the value is not present, 100mA is used as default.
|
||||
default: 100000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,thermal-mitigation:
|
||||
description: |
|
||||
Array of fast charge current limit values for
|
||||
different system thermal mitigation levels.
|
||||
This should be a flat array that denotes the
|
||||
maximum charge current in mA for each thermal
|
||||
level.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
qcom,float-option:
|
||||
description: |
|
||||
Configures how the charger behaves when a float charger is
|
||||
detected by APSD.
|
||||
1 - Treat as a DCP.
|
||||
2 - Treat as a SDP.
|
||||
3 - Disable charging.
|
||||
4 - Suspend USB input.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,hvdcp-disable:
|
||||
description: |
|
||||
Specifies if hvdcp charging is to be enabled or not.
|
||||
If this property is not specified hvdcp will be enabled.
|
||||
If this property is specified, hvdcp 2.0 detection will still
|
||||
happen but the adapter won't be asked to switch to a higher
|
||||
voltage point.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,chg-inhibit-threshold-mv:
|
||||
description: |
|
||||
Charge inhibit threshold in milli-volts. Charging will be
|
||||
inhibited when the battery voltage is within this threshold
|
||||
from Vfloat at charger insertion. If this is not specified
|
||||
then charge inhibit will be disabled by default.
|
||||
Allowed values are: 50, 100, 200, 300.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,chg-term-src:
|
||||
description: |
|
||||
Specify either the ADC or analog comparators to be used in order
|
||||
to set threshold values for charge termination current.
|
||||
0 - Unspecified
|
||||
1 - Select ADC comparator
|
||||
2 - Select ANALOG comparator
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,chg-term-current-ma:
|
||||
description: |
|
||||
When ADC comparator is selected as qcom,chg-term-src, this
|
||||
parameter should be set to the desired upper threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,chg-term-base-current-ma:
|
||||
description: |
|
||||
When ADC comparator is selected as qcom,chg-term-src, this
|
||||
parameter should be set to the desired lower threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,auto-recharge-soc:
|
||||
description: |
|
||||
Specifies the SOC threshold at which the charger will
|
||||
restart charging after termination. The value specified
|
||||
ranges from 0 - 100. The feature is enabled if this
|
||||
property is specified with a valid SOC value.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,auto-recharge-vbat-mv:
|
||||
description: |
|
||||
Specifies the battery voltage threshold at which the charger
|
||||
will restart charging after termination. The value specified
|
||||
is in milli-volts.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,suspend-input-on-debug-batt:
|
||||
description: |
|
||||
Boolean flag which when present enables input suspend for
|
||||
debug battery.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,fake-chg-status-on-debug-batt:
|
||||
description: |
|
||||
Boolean flag which when present shows charging status as
|
||||
unknown for debug battery. This needs to be specified only if
|
||||
the device needs to be kept powered on always with
|
||||
"svc power stayon true".
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,min-freq-khz:
|
||||
description: |
|
||||
Specifies the minimum charger buck/boost switching frequency
|
||||
in KHz. It overrides the min frequency defined for the charger
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,max-freq-khz:
|
||||
description: |
|
||||
Specifies the maximum charger buck/boost switching frequency in
|
||||
KHz. It overrides the max frequency defined for the charger.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,otg-deglitch-time-ms:
|
||||
description: |
|
||||
Specifies the deglitch interval for OTG detection.
|
||||
If the value is not present, 50 msec is used as default.
|
||||
default: 50
|
||||
|
||||
qcom,step-charging-enable:
|
||||
description: |
|
||||
Boolean flag which when present enables step-charging.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,typec-legacy-rp-icl:
|
||||
description: |
|
||||
Boolean property to enable setting ICL based on Rp for
|
||||
Type-C non-compliant legacy cables.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,wd-bark-time-secs:
|
||||
description: |
|
||||
WD bark-timeout in seconds. The possible values are
|
||||
16, 32, 64, 128. If not defined it defaults to 64.
|
||||
default: 64
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,sw-jeita-enable:
|
||||
description: |
|
||||
Boolean flag which when present enables sw compensation for
|
||||
jeita.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,flash-derating-soc:
|
||||
description: |
|
||||
SOC threshold in percentage below which hardware will start
|
||||
derating flash. This is only applicable to certain PMICs like
|
||||
PMI632 which has SCHGM_FLASH peripheral.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,flash-disable-soc:
|
||||
description: |
|
||||
SOC threshold in percentage below which hardware will disable
|
||||
flash. This is only applicable to certain PMICs like PMI632
|
||||
which has SCHGM_FLASH peripheral.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,headroom-mode:
|
||||
description: |
|
||||
Specifies flash hardware headroom management policy. The
|
||||
possible values are:
|
||||
<0>: Fixed mode, constant 5V at flash input.
|
||||
<1>: Adaptive mode allows charger output voltage to be
|
||||
dynamically controlled by the flash module based on the
|
||||
required flash headroom.
|
||||
This is only applicable to certain PMICs like PMI632 which
|
||||
has SCHGM_FLASH peripheral.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,fcc-stepping-enable:
|
||||
description: |
|
||||
Boolean flag which when present enables stepwise change in FCC.
|
||||
The default stepping rate is 100mA/sec.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,disable-suspend-on-collapse:
|
||||
description: |
|
||||
Boolean flag which when present disables suspend on collapse
|
||||
feature of charger hardware.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,uusb-moisture-protection-enable:
|
||||
description: |
|
||||
Boolean flag which when present enables mositure protection
|
||||
feature for uUSB connector type.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,hvdcp-autonomous-enable:
|
||||
description: |
|
||||
Boolean flag which when present enables hardware-controlled
|
||||
operation of HVDCP.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,usb-pd-disable:
|
||||
description: |
|
||||
Boolean flag which when present disables USB-PD operation.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,lpd-disable:
|
||||
description: |
|
||||
Boolean flag which when present disables liquid presence
|
||||
detection.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,hw-die-temp-mitigation:
|
||||
description: |
|
||||
Boolean flag which when present enables h/w based thermal
|
||||
mitigation.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,hw-connector-mitigation:
|
||||
description: |
|
||||
Boolean flag which when present enables h/w based
|
||||
connector temperature mitigation.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,hw-skin-temp-mitigation:
|
||||
description: |
|
||||
Boolean flag which when present enables h/w based skin
|
||||
temperature mitigation.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,en-skin-therm-mitigation:
|
||||
description: |
|
||||
Boolean flag which when present enables skin
|
||||
thermal mitigation.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,connector-internal-pull-kohm:
|
||||
description: |
|
||||
Specifies internal pull-up configuration to be applied to
|
||||
connector THERM. The only valid values are (0/30/100/400).
|
||||
If not specified 100K is used as default pull-up.
|
||||
default: 100
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,smb-internal-pull-kohm:
|
||||
description: |
|
||||
Specifies internal pull-up configuration to be applied to
|
||||
connector THERM, only valid values are (0/30/100/400).
|
||||
If not specified 100K is used as default pull-up.
|
||||
default: 100
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,wd-snarl-time-config:
|
||||
description: |
|
||||
WDOG snarl timeout configuration value. The possible values are
|
||||
0 to 7, where 0 = 62.5ms, 1 = 125ms, 2 = 250ms, 3 = 500ms,
|
||||
4 = 1s, 5 = 2s, 6 = 4s and 7 = 8s. If not defined, wdog-snarl
|
||||
irq is disabled by default.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,adc-based-aicl:
|
||||
description: |
|
||||
Boolean flag which when present enables ADC based AICL.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,wls-current-max-ua:
|
||||
description: |
|
||||
Upper limit of charging current supplied by the wireless charger.
|
||||
If left unspecified, the HW min value of 1.5 A is applied by
|
||||
default.
|
||||
default: 1500000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,fcc-step-delay-ms:
|
||||
description: |
|
||||
Specifies the delay between each step of FCC stepper algorithm.
|
||||
If left unspecified, the default value is 1 Sec.
|
||||
default: 1000
|
||||
|
||||
qcom,fcc-step-size-ua:
|
||||
description: |
|
||||
Specifies the step size of each step of FCC stepper algorithm.
|
||||
If left unspecified, the default value is 100mA.
|
||||
default: 100000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,hvdcp2-max-icl-ua:
|
||||
description: |
|
||||
Specifies the maximum input current limit that can be configured
|
||||
for HVDCP2 adapter.
|
||||
If left unspecified, the default value is 3000mA.
|
||||
default: 3000000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,hvdcp3-max-icl-ua:
|
||||
description: |
|
||||
Specifies the maximum input current limit that can be configured
|
||||
for HVDCP3 adapter.
|
||||
If left unspecified, the default value is 3000mA.
|
||||
default: 3000000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,hvdcp3-standalone-config:
|
||||
description: |
|
||||
Boolean flag which when present indicates that the charging is
|
||||
only done by the main charger (standalone, no CP) with a QC 3.0
|
||||
adapter.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,disable-fcc-restriction:
|
||||
description: |
|
||||
Boolean flag which when present disables FCC restriction.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
patternProperties:
|
||||
"^qcom,chgr@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,otg@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,bat-if@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,usb-chgpth@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,dc-chgpth@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,chgr-misc@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,schgm-flash@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
pmic {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pm8150b_charger {
|
||||
compatible = "qcom,qpnp-smb5";
|
||||
#io-channel-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
qcom,chgr@1000 {
|
||||
reg = <0x1000>;
|
||||
interrupts = <0x2 0x10 0x0 0>,
|
||||
<0x2 0x10 0x1 0>,
|
||||
<0x2 0x10 0x2 0>,
|
||||
<0x2 0x10 0x3 0>,
|
||||
<0x2 0x10 0x4 0>;
|
||||
|
||||
interrupt-names = "chg-error",
|
||||
"chg-state-change",
|
||||
"step-chg-state-change",
|
||||
"step-chg-soc-update-fail",
|
||||
"step-chg-soc-update-request";
|
||||
};
|
||||
|
||||
qcom,otg@1100 {
|
||||
reg = <0x1100>;
|
||||
interrupts = <0x2 0x11 0x0 0>,
|
||||
<0x2 0x11 0x1 0>,
|
||||
<0x2 0x11 0x2 0>,
|
||||
<0x2 0x11 0x3 0>;
|
||||
|
||||
interrupt-names = "otg-fail",
|
||||
"otg-overcurrent",
|
||||
"otg-oc-dis-sw-sts",
|
||||
"testmode-change-detect";
|
||||
};
|
||||
|
||||
qcom,bat-if@1200 {
|
||||
reg = <0x1200>;
|
||||
interrupts = <0x2 0x12 0x0 0>,
|
||||
<0x2 0x12 0x1 0>,
|
||||
<0x2 0x12 0x2 0>,
|
||||
<0x2 0x12 0x3 0>,
|
||||
<0x2 0x12 0x4 0>,
|
||||
<0x2 0x12 0x5 0>;
|
||||
|
||||
interrupt-names = "bat-temp",
|
||||
"bat-ocp",
|
||||
"bat-ov",
|
||||
"bat-low",
|
||||
"bat-therm-or-id-missing",
|
||||
"bat-terminal-missing";
|
||||
};
|
||||
|
||||
qcom,usb-chgpth@1300 {
|
||||
reg = <0x1300>;
|
||||
interrupts = <0x2 0x13 0x0 0>,
|
||||
<0x2 0x13 0x1 0>,
|
||||
<0x2 0x13 0x2 0>,
|
||||
<0x2 0x13 0x3 0>,
|
||||
<0x2 0x13 0x4 0>,
|
||||
<0x2 0x13 0x5 0>,
|
||||
<0x2 0x13 0x6 0>,
|
||||
<0x2 0x13 0x7 0>;
|
||||
|
||||
interrupt-names = "usbin-collapse",
|
||||
"usbin-lt-3p6v",
|
||||
"usbin-uv",
|
||||
"usbin-ov",
|
||||
"usbin-plugin",
|
||||
"usbin-src-change",
|
||||
"usbin-icl-change",
|
||||
"type-c-change";
|
||||
};
|
||||
|
||||
qcom,dc-chgpth@1400 {
|
||||
reg = <0x1400>;
|
||||
interrupts = <0x2 0x14 0x0 0>,
|
||||
<0x2 0x14 0x1 0>,
|
||||
<0x2 0x14 0x2 0>,
|
||||
<0x2 0x14 0x3 0>,
|
||||
<0x2 0x14 0x4 0>,
|
||||
<0x2 0x14 0x5 0>,
|
||||
<0x2 0x14 0x6 0>;
|
||||
|
||||
interrupt-names = "dcin-collapse",
|
||||
"dcin-lt-3p6v",
|
||||
"dcin-uv",
|
||||
"dcin-ov",
|
||||
"dcin-plugin",
|
||||
"div2-en-dg",
|
||||
"dcin-icl-change";
|
||||
};
|
||||
|
||||
qcom,chgr-misc@1600 {
|
||||
reg = <0x1600 0x100>;
|
||||
interrupts = <0x2 0x16 0x0 0>,
|
||||
<0x2 0x16 0x1 0>,
|
||||
<0x2 0x16 0x2 0>,
|
||||
<0x2 0x16 0x3 0>,
|
||||
<0x2 0x16 0x4 0>,
|
||||
<0x2 0x16 0x5 0>,
|
||||
<0x2 0x16 0x6 0>,
|
||||
<0x2 0x16 0x7 0>;
|
||||
|
||||
interrupt-names = "wdog-snarl",
|
||||
"wdog-bark",
|
||||
"aicl-fail",
|
||||
"aicl-done",
|
||||
"high-duty-cycle",
|
||||
"input-current-limiting",
|
||||
"temperature-change",
|
||||
"switcher-power-ok";
|
||||
};
|
||||
|
||||
qcom,schgm-flash@a600 {
|
||||
reg = <0xa600>;
|
||||
interrupts = <0x2 0xa6 0x0 0>,
|
||||
<0x2 0xa6 0x1 0>,
|
||||
<0x2 0xa6 0x2 0>,
|
||||
<0x2 0xa6 0x3 0>,
|
||||
<0x2 0xa6 0x4 0>,
|
||||
<0x2 0xa6 0x5 0>,
|
||||
<0x2 0xa6 0x6 0>,
|
||||
<0x2 0xa6 0x7 0>;
|
||||
|
||||
interrupt-names = "flash-en",
|
||||
"torch-req",
|
||||
"flash-state-change",
|
||||
"vout-up",
|
||||
"vout-down",
|
||||
"ilim1-s1",
|
||||
"ilim2-s2",
|
||||
"vreg-ok";
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
506
bindings/power/supply/qcom/qpnp-smblite.yaml
Normal file
506
bindings/power/supply/qcom/qpnp-smblite.yaml
Normal file
@@ -0,0 +1,506 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/power/supply/qcom/qpnp-smblite.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies, Inc. SMBLITE Charger.
|
||||
|
||||
maintainers:
|
||||
- Kamal Wadhwa <quic_kamalw@quicinc.com>
|
||||
|
||||
description: |
|
||||
SMBLITE Charger is an efficient programmable battery charger capable of charging a
|
||||
lithium-ion battery over micro-USB or USB Type-C.
|
||||
|
||||
Required Node Structure:
|
||||
SMBLITE Charger must be described in two levels of devices nodes.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,qpnp-smblite
|
||||
- qcom,qpnp-pm5100-smblite
|
||||
|
||||
qcom,pmic-revid:
|
||||
description: |
|
||||
Should specify the phandle of PMI's revid module. This is used to
|
||||
identify the PMI subtype.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
"#io-channel-cells":
|
||||
const: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
io-channels:
|
||||
description: Phandle of IIO channels required.
|
||||
|
||||
io-channel-names:
|
||||
description: |
|
||||
For details about IIO bindings see:
|
||||
Documentation/devicetree/bindings/iio/iio-bindings.txt
|
||||
|
||||
qcom,batteryless-platform:
|
||||
description: |
|
||||
Boolean flag which indicates that the platform does not have a
|
||||
battery, and therefore charging should be disabled. In
|
||||
addition battery properties will be faked such that the device
|
||||
assumes normal operation.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,fcc-max-ua:
|
||||
description: |
|
||||
Specifies the maximum fast charge current in micro-amps in
|
||||
battery profile.If the value is not present, 1Amp is used as default.
|
||||
default: 1000000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,fv-max-uv:
|
||||
description: |
|
||||
Specifies the maximum float voltage in micro-volts in
|
||||
battery profile.If the value is not present, 4.35V is used as default.
|
||||
default: 4350000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,usb-icl-ua:
|
||||
description: |
|
||||
Specifies the USB input current limit in micro-amps.
|
||||
If the value is not present, 1.5Amps is used as default.
|
||||
default: 1500000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,thermal-mitigation:
|
||||
description: |
|
||||
Array of fast charge current limit values for
|
||||
different system thermal mitigation levels.
|
||||
This should be a flat array that denotes the
|
||||
maximum charge current in mA for each thermal
|
||||
level.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
|
||||
qcom,chg-inhibit-threshold-mv:
|
||||
description: |
|
||||
Charge inhibit threshold in milli-volts. Charging will be
|
||||
inhibited when the battery voltage is within this threshold
|
||||
from Vfloat at charger insertion. If this is not specified
|
||||
then charge inhibit will be disabled by default.
|
||||
Allowed values are: 50, 100, 200, 300.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,chg-term-src:
|
||||
description: |
|
||||
Specify either the ADC or analog comparators to be used in order
|
||||
to set threshold values for charge termination current.
|
||||
0 - Unspecified
|
||||
1 - Select ADC comparator
|
||||
2 - Select ANALOG comparator
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,chg-term-current-ma:
|
||||
description: |
|
||||
When ADC comparator is selected as qcom,chg-term-src, this
|
||||
parameter should be set to the desired upper threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,chg-term-base-current-ma:
|
||||
description: |
|
||||
When ADC comparator is selected as qcom,chg-term-src, this
|
||||
parameter should be set to the desired lower threshold.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,auto-recharge-soc:
|
||||
description: |
|
||||
Specifies the SOC threshold at which the charger will
|
||||
restart charging after termination. The value specified
|
||||
ranges from 0 - 100. The feature is enabled if this
|
||||
property is specified with a valid SOC value.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,auto-recharge-vbat-mv:
|
||||
description: |
|
||||
Specifies the battery voltage threshold at which the charger
|
||||
will restart charging after termination. The value specified
|
||||
is in milli-volts.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,suspend-input-on-debug-batt:
|
||||
description: |
|
||||
Boolean flag which when present enables input suspend for
|
||||
debug battery.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,fake-chg-status-on-debug-batt:
|
||||
description: |
|
||||
Boolean flag which when present shows charging status as
|
||||
unknown for debug battery. This needs to be specified only if
|
||||
the device needs to be kept powered on always with
|
||||
"svc power stayon true".
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,typec-legacy-rp-icl:
|
||||
description: |
|
||||
Boolean property to enable setting ICL based on Rp for
|
||||
Type-C non-compliant legacy cables.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,wd-bark-time-secs:
|
||||
description: |
|
||||
WD bark-timeout in seconds. The possible values are
|
||||
16, 32, 64, 128. If not defined it defaults to 64.
|
||||
default: 64
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,battery-data:
|
||||
description: |
|
||||
Specifies the phandle of the node which contains the battery
|
||||
profiles supported on the device.
|
||||
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
qcom,flash-derating-soc:
|
||||
description: |
|
||||
SOC threshold in percentage below which hardware will start
|
||||
derating flash. This is only applicable to certain PMICs like
|
||||
PMI632 which has SCHGM_FLASH peripheral.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,flash-disable-soc:
|
||||
description: |
|
||||
SOC threshold in percentage below which hardware will disable
|
||||
flash. This is only applicable to certain PMICs like PMI632
|
||||
which has SCHGM_FLASH peripheral.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,headroom-mode:
|
||||
description: |
|
||||
Specifies flash hardware headroom management policy.
|
||||
The possible values are:
|
||||
<0>: Fixed mode, constant 5V at flash input.
|
||||
<1>: Adaptive mode allows charger output voltage to be
|
||||
dynamically controlled by the flash module based on the
|
||||
required flash headroom.
|
||||
This is only applicable to certain PMICs like PMI632 which
|
||||
has SCHGM_FLASH peripheral.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
nvmem-cell-names:
|
||||
description: |
|
||||
The nvmem cell device name of the SDAM register used to store
|
||||
the charger debug mask. It must be "charger_debug_mask".
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
nvmem-cells:
|
||||
description: |
|
||||
Phandle of the nvmem cell device used to store the charger debug
|
||||
mask. Please refer to nvmem bindings as described in
|
||||
bindings/nvmem/nvmem.txt.
|
||||
|
||||
qcom,fcc-stepping-enable:
|
||||
description: |
|
||||
Boolean flag which when present enables stepwise change in FCC.
|
||||
The default stepping rate is 100mA/sec.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,disable-suspend-on-collapse:
|
||||
description: |
|
||||
Boolean flag which when present disables suspend on collapse
|
||||
feature of charger hardware.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,fcc-step-delay-ms:
|
||||
description: |
|
||||
Specifies the delay between each step of FCC stepper algorithm.
|
||||
If left unspecified, the default value is 1 Sec.
|
||||
default: 1000
|
||||
|
||||
qcom,fcc-step-size-ua:
|
||||
description: |
|
||||
Specifies the step size of each step of FCC stepper algorithm.
|
||||
If left unspecified, the default value is 100mA.
|
||||
default: 100000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,fc-step-start-ua:
|
||||
description: |
|
||||
Specifies the initial current of FCC stepper algorithm.
|
||||
If left unspecified, the default value is 500mA.
|
||||
default: 500000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,concurrency-mode-enable:
|
||||
description: |
|
||||
Boolean flag to control charger concurrency mode. Its supported
|
||||
only on PM5100, By default this feature is disabled.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,remote-fg:
|
||||
description: |
|
||||
Boolean flag to determine if FG is running on different processor.
|
||||
Its supported only on PM5100, By default this feature is disabled.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
qcom,float-option:
|
||||
description: |
|
||||
Configures how the charger behaves when a float charger is
|
||||
detected by APSD.
|
||||
1 - Treat as a DCP.
|
||||
2 - Treat as a SDP.
|
||||
3 - Disable charging.
|
||||
4 - Suspend USB input.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
qcom,uusb-ss-mode-extcon-enable:
|
||||
description: |
|
||||
Boolean flag to support board designs with Micro-AB 3.0 USB port.
|
||||
If this is enabled, on USB plugin event SS mode extcon notification
|
||||
is sent (instead of an HS mode). This DT property should be defined
|
||||
only if the board is not expected to support Micro-B type USB cable
|
||||
on the Micro-AB 3.0 port, as the Micro-B cable cannot support SS mode.
|
||||
By default this feature is disabled.
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
patternProperties:
|
||||
"^qcom,chgr@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,dcdc@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,batif@[0-9a-f].*$":
|
||||
type: object
|
||||
description: regulator client voting interface node(s).
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,usb@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,typec@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
"^qcom,misc@[0-9a-f].*$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Address and size of the peripheral's register block.
|
||||
|
||||
interrupts:
|
||||
description: Peripheral interrupt specifier.
|
||||
|
||||
interrupt-names:
|
||||
description: |
|
||||
Interrupt names. This list must match up 1-to-1 with the
|
||||
interrupts specified in the 'interrupts' property.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
pm2250_charger: qcom,qpnp-smblite {
|
||||
compatible = "qcom,qpnp-smblite";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qcom,chgr@1000 {
|
||||
reg = <0x1000>;
|
||||
interrupts =
|
||||
<0x0 0x10 0x1 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x10 0x0 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x10 0x4 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x10 0x7 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-names = "chgr-error",
|
||||
"chg-state-change",
|
||||
"buck-oc",
|
||||
"vph-ov";
|
||||
};
|
||||
|
||||
qcom,dcdc@1100 {
|
||||
reg = <0x1100>;
|
||||
interrupts =
|
||||
<0x0 0x11 0x0 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x11 0x1 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x11 0x2 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x11 0x6 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x11 0x7 IRQ_TYPE_EDGE_BOTH>;
|
||||
|
||||
interrupt-names = "otg-fail",
|
||||
"otg-fault",
|
||||
"skip-mode",
|
||||
"input-current-limiting",
|
||||
"switcher-power-ok";
|
||||
};
|
||||
|
||||
qcom,batif@1200 {
|
||||
reg = <0x1200>;
|
||||
interrupts =
|
||||
<0x0 0x12 0x0 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x12 0x1 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x12 0x2 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x12 0x3 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x12 0x4 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-names = "bat-temp",
|
||||
"bat-therm-or-id-missing",
|
||||
"bat-low",
|
||||
"bat-ov",
|
||||
"bsm-active";
|
||||
};
|
||||
|
||||
qcom,usb@1300 {
|
||||
reg = <0x1300>;
|
||||
interrupts =
|
||||
<0x0 0x13 0x0 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x13 0x1 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x13 0x2 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x13 0x3 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x13 0x4 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x13 0x6 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-names = "usbin-plugin",
|
||||
"usbin-collapse",
|
||||
"usbin-uv",
|
||||
"usbin-ov",
|
||||
"usbin-gtvt",
|
||||
"usbin-icl-change";
|
||||
};
|
||||
|
||||
qcom,typec@1500 {
|
||||
reg = <0x1500>;
|
||||
interrupts =
|
||||
<0x0 0x15 0x0 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x15 0x1 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x15 0x2 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x15 0x4 IRQ_TYPE_EDGE_BOTH>,
|
||||
<0x0 0x15 0x5 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x15 0x6 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x15 0x7 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
interrupt-names = "typec-or-rid-detect-change",
|
||||
"typec-vpd-detect",
|
||||
"typec-cc-state-change",
|
||||
"typec-vbus-change",
|
||||
"typec-attach-detach",
|
||||
"typec-legacy-cable-detect",
|
||||
"typec-try-snk-src-detect";
|
||||
};
|
||||
|
||||
qcom,misc@1600 {
|
||||
reg = <0x1600>;
|
||||
interrupts =
|
||||
<0x0 0x16 0x0 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x16 0x1 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x16 0x2 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x16 0x3 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x16 0x4 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x16 0x5 IRQ_TYPE_EDGE_RISING>,
|
||||
<0x0 0x16 0x6 IRQ_TYPE_EDGE_BOTH>;
|
||||
|
||||
interrupt-names = "wdog-snarl",
|
||||
"wdog-bark",
|
||||
"aicl-fail",
|
||||
"aicl-done",
|
||||
"imp-trigger",
|
||||
"all-chnl-cond-done",
|
||||
"temp-change";
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -88,6 +88,14 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 64
|
||||
|
||||
qcom,force-low-pwm-size:
|
||||
description: |
|
||||
The flag to indicate the forced use of legacy low PWM sizes
|
||||
(6 or 9 bits) instead of full 8-15 bit PWM sizes, when the
|
||||
PWM size is calculated based on the requested PWM period by
|
||||
the client driver.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
45
bindings/remoteproc/qcom,slate.yaml
Normal file
45
bindings/remoteproc/qcom,slate.yaml
Normal file
@@ -0,0 +1,45 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/remoteproc/qcom,slate.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies, Inc. SLATE Peripheral Image Loader
|
||||
|
||||
maintainers:
|
||||
- Pradnya Dahiwale <quic_pdahiwal@quicinc.com>
|
||||
|
||||
description:
|
||||
This document defines the binding for a component that loads and boots
|
||||
firmware on the Qualcomm Technologies, Inc. SLATE core.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,rproc-slate
|
||||
|
||||
qcom,firmware-name:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: Firmware name for the AoN core
|
||||
|
||||
qcom,slate2ap-status-gpio:
|
||||
description: IRQ used by SLATE to inturrupt MSM.
|
||||
|
||||
qcom,ap2slate-status-gpio:
|
||||
description: IRQ used by MSM to interrupt SLATE.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
aon_pas:qcom,rproc-slate {
|
||||
compatible = "qcom,rproc-slate";
|
||||
qcom,firmware-name = "slatefw.mdt";
|
||||
/* GPIO inputs from blackghost */
|
||||
qcom,slate2ap-status-gpio = <&tlmm 98 0>;
|
||||
/* GPIO output to blackghost */
|
||||
qcom,ap2slate-status-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
38
bindings/soc/qcom/qcom,fsa4480-i2c.yaml
Normal file
38
bindings/soc/qcom/qcom,fsa4480-i2c.yaml
Normal file
@@ -0,0 +1,38 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/qcom/qcom,fsa4480-i2c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Fairchild FSA4480 Device
|
||||
|
||||
maintainers:
|
||||
- Soumya Managoli<quic_c_smanag@quicinc.com>
|
||||
|
||||
description: |
|
||||
This device is used for switching orientation of USB-C analog
|
||||
and for display. It uses I2C communication to set the registers
|
||||
to configure the switches inside the FSA4480 chip to change
|
||||
orientation and also to set SBU1/SBU2 connections of USB-C.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,fsa4480-i2c
|
||||
|
||||
reg:
|
||||
description: |
|
||||
I2C device address of the device
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
fsa4480: fsa4480@43 {
|
||||
compatible = "qcom,fsa4480-i2c";
|
||||
reg = <0x43>;
|
||||
};
|
||||
...
|
||||
39
bindings/soc/qcom/qcom,glink-slatecom-xprt.yaml
Normal file
39
bindings/soc/qcom/qcom,glink-slatecom-xprt.yaml
Normal file
@@ -0,0 +1,39 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/qcom/qcom,glink-slatecom-xprt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: GLINK SLATECOM transport
|
||||
|
||||
maintainers:
|
||||
- Sudeepgoud Patil <quic_sudeepgo@quicinc.com>
|
||||
|
||||
description: |
|
||||
This binding describes the Qualcomm Technologies, Inc glink slatecom transport driver,
|
||||
a slatecom-spi based communication channel for sending data between the various
|
||||
subsystems in Qualcomm Technologies, Inc platforms.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,glink-slatecom-xprt
|
||||
description: must be "qcom,glink-slatecom-xprt"
|
||||
label:
|
||||
const: slate
|
||||
description: must be "slate"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- label
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
qcom,glink-slatecom-xprt-slate {
|
||||
compatible = "qcom,glink-slatecom-xprt";
|
||||
label = "slate";
|
||||
};
|
||||
|
||||
|
||||
|
||||
31
bindings/soc/qcom/qcom,slate_touch_rpmsg.yaml
Normal file
31
bindings/soc/qcom/qcom,slate_touch_rpmsg.yaml
Normal file
@@ -0,0 +1,31 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/qcom/qcom,slate_touch_rpmsg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: slatetouch-rpmsg GLINK communication
|
||||
|
||||
maintainers:
|
||||
- Akshay Gola <quic_agola@quicinc.com>
|
||||
|
||||
description: |
|
||||
slatetouch-rpmsg is used to communicate with Slate over Glink
|
||||
to configure the touch events slatetouch-rpmsg send commands over glink to
|
||||
send configure, enable/disable touch to Slate
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: "qcom,slatetouch-rpmsg"
|
||||
description: must be "qcom,slatetouch-rpmsg"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
qcom,slatetouch-rpmsg {
|
||||
compatible = "qcom,slatetouch-rpmsg";
|
||||
};
|
||||
@@ -107,7 +107,12 @@ PARROT_BOARDS += \
|
||||
parrot-qrd-overlay.dtbo \
|
||||
parrot-qrd-wcn6750-overlay.dtbo \
|
||||
parrot-qrd-nopmi-overlay.dtbo \
|
||||
parrot-qrd-pm8350b-overlay.dtbo
|
||||
parrot-qrd-pm8350b-overlay.dtbo \
|
||||
parrot-idp-wcn6755-overlay.dtbo \
|
||||
parrot-idp-wcn6755-amoled-rcm-overlay.dtbo \
|
||||
parrot-qrd-wcn6755-overlay.dtbo \
|
||||
parrot-idp-wcn6755-pm8350b-overlay.dtbo \
|
||||
parrot-idp-wcn6755-nopmi-overlay.dtbo
|
||||
|
||||
PARROT_4GB_BOARDS += \
|
||||
parrot-idp-4gb-overlay.dtbo \
|
||||
|
||||
@@ -10,3 +10,35 @@
|
||||
&memtimer {
|
||||
clock-frequency = <500000>;
|
||||
};
|
||||
|
||||
&disp_rsc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&soc {
|
||||
usb_nop_phy: usb_nop_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
};
|
||||
|
||||
usb_emuphy: phy@a784000 {
|
||||
compatible = "qcom,usb-emu-phy";
|
||||
reg = <0x0a784000 0x9500>;
|
||||
|
||||
qcom,emu-init-seq = <0xfffff 0x4
|
||||
0xffff0 0x4
|
||||
0x100000 0x20
|
||||
0x0 0x20
|
||||
0x000101F0 0x20
|
||||
0x00100000 0x3c
|
||||
0x0 0x3c
|
||||
0x0 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dwc3@a600000 {
|
||||
usb-phy = <&usb_emuphy>, <&usb_nop_phy>;
|
||||
dr_mode = "peripheral";
|
||||
maximum-speed = "high-speed";
|
||||
};
|
||||
};
|
||||
|
||||
55
qcom/kera-usb.dtsi
Normal file
55
qcom/kera-usb.dtsi
Normal file
@@ -0,0 +1,55 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&soc {
|
||||
usb0: ssusb@a600000 {
|
||||
compatible = "qcom,dwc-usb3-msm";
|
||||
reg = <0xa600000 0x100000>;
|
||||
reg-names = "core_base";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
USB3_GDSC-supply = <&gcc_usb30_prim_gdsc>;
|
||||
clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
|
||||
<&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
|
||||
<&gcc GCC_USB30_PRIM_SLEEP_CLK>;
|
||||
clock-names = "core_clk", "iface_clk", "bus_aggr_clk",
|
||||
"utmi_clk", "sleep_clk";
|
||||
|
||||
resets = <&gcc GCC_USB30_PRIM_BCR>;
|
||||
reset-names = "core_reset";
|
||||
|
||||
interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "pwr_event_irq";
|
||||
|
||||
qcom,core-clk-rate = <200000000>;
|
||||
qcom,core-clk-rate-hs = <66666667>;
|
||||
qcom,core-clk-rate-disconnected = <133333333>;
|
||||
|
||||
dwc3@a600000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0xa600000 0xd93c>;
|
||||
|
||||
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
|
||||
snps,disable-clk-gating;
|
||||
snps,has-lpm-erratum;
|
||||
snps,hird-threshold = /bits/ 8 <0x0>;
|
||||
snps,is-utmi-l1-suspend;
|
||||
snps,dis-u1-entry-quirk;
|
||||
snps,dis-u2-entry-quirk;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,ssp-u3-u0-quirk;
|
||||
tx-fifo-resize;
|
||||
dr_mode = "otg";
|
||||
maximum-speed = "high-speed";
|
||||
usb-role-switch;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -13,6 +13,7 @@
|
||||
#include <dt-bindings/clock/qcom,videocc-tuna.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/soc/qcom,ipcc.h>
|
||||
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Kera";
|
||||
@@ -283,6 +284,81 @@
|
||||
};
|
||||
};
|
||||
|
||||
apps_rsc: rsc@17a00000 {
|
||||
label = "apps_rsc";
|
||||
compatible = "qcom,rpmh-rsc";
|
||||
reg = <0x17a00000 0x10000>,
|
||||
<0x17a10000 0x10000>,
|
||||
<0x17a20000 0x10000>;
|
||||
reg-names = "drv-0", "drv-1", "drv-2";
|
||||
qcom,drv-count = <3>;
|
||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
apps_rsc_drv2: drv@2 {
|
||||
qcom,drv-id = <2>;
|
||||
qcom,tcs-offset = <0xd00>;
|
||||
qcom,tcs-distance = <0x2a0>;
|
||||
channel@0 {
|
||||
qcom,tcs-config = <ACTIVE_TCS 3>,
|
||||
<SLEEP_TCS 2>,
|
||||
<WAKE_TCS 2>,
|
||||
<CONTROL_TCS 0>,
|
||||
<FAST_PATH_TCS 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
disp_rsc: rsc@af20000 {
|
||||
label = "disp_rsc";
|
||||
compatible = "qcom,rpmh-rsc";
|
||||
reg = <0xaf20000 0x1000>;
|
||||
reg-names = "drv-0";
|
||||
qcom,drv-count = <1>;
|
||||
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
disp_rsc_drv0: drv@0 {
|
||||
qcom,drv-id = <0>;
|
||||
qcom,tcs-offset = <0x520>;
|
||||
qcom,tcs-distance = <0x150>;
|
||||
channel@0 {
|
||||
qcom,tcs-config = <ACTIVE_TCS 0>,
|
||||
<SLEEP_TCS 1>,
|
||||
<WAKE_TCS 1>,
|
||||
<CONTROL_TCS 0>,
|
||||
<FAST_PATH_TCS 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pdc: interrupt-controller@b220000 {
|
||||
compatible = "qcom,kera-pdc", "qcom,pdc";
|
||||
reg = <0xb220000 0x10000>, <0x17c000f0 0x60>;
|
||||
qcom,pdc-ranges = <0 480 8>, <8 719 1>, <9 718 1>,
|
||||
<10 230 1>, <11 724 1>, <12 716 1>,
|
||||
<13 727 1>, <14 720 1>, <15 726 1>,
|
||||
<16 721 1>, <17 262 1>, <18 70 1>,
|
||||
<19 723 1>, <20 234 1>, <22 725 1>,
|
||||
<23 231 1>, <24 504 5>, <30 510 8>,
|
||||
<40 520 6>, <51 531 4>, <58 538 2>,
|
||||
<61 541 5>, <66 92 1>, <67 547 13>,
|
||||
<80 240 1>, <81 235 1>, <82 310 2>,
|
||||
<84 248 1>, <85 241 1>, <86 238 2>,
|
||||
<88 254 1>, <89 509 1>, <90 563 1>,
|
||||
<91 259 2>, <93 201 1>, <94 246 1>,
|
||||
<95 93 1>, <96 611 29>, <125 63 1>,
|
||||
<126 366 2>, <128 374 1>, <129 377 1>,
|
||||
<130 428 1>, <131 434 2>, <133 437 1>,
|
||||
<134 452 2>, <136 458 2>, <138 464 11>,
|
||||
<149 671 1>, <150 688 1>, <151 714 2>,
|
||||
<153 722 1>, <154 255 1>, <155 269 2>,
|
||||
<157 276 1>, <158 287 1>, <159 306 4>;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
tlmm: pinctrl@f000000 {
|
||||
compatible = "qcom,kera-tlmm";
|
||||
reg = <0xf000000 0x1000000>;
|
||||
@@ -291,6 +367,7 @@
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
wakeup-parent = <&pdc>;
|
||||
};
|
||||
|
||||
ipcc_mproc: qcom,ipcc@406000 {
|
||||
@@ -524,4 +601,17 @@
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
aop_cmd_db_mem: aop_cmd_db_region@81c60000 {
|
||||
compatible = "qcom,cmd-db";
|
||||
no-map;
|
||||
reg = <0x0 0x81c60000 0x0 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "kera-pinctrl.dtsi"
|
||||
#include "kera-usb.dtsi"
|
||||
|
||||
@@ -4,15 +4,6 @@
|
||||
*/
|
||||
|
||||
&soc {
|
||||
hwevent {
|
||||
/* compatible = "qcom,coresight-hwevent"; */
|
||||
|
||||
coresight-name = "coresight-hwevent";
|
||||
coresight-csr = <&csr>;
|
||||
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
apss_tgu: tgu@9900000 {
|
||||
compatible = "arm,primecell";
|
||||
arm,primecell-periphid = <0x0003b999>;
|
||||
@@ -69,6 +60,7 @@
|
||||
reg-names = "stm-base", "stm-stimulus-base";
|
||||
|
||||
coresight-name = "coresight-stm";
|
||||
atid = <16>;
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
||||
clock-names = "apb_pclk";
|
||||
@@ -124,9 +116,10 @@
|
||||
};
|
||||
|
||||
modem_rfxe: modem_rfxe {
|
||||
/* compatible = "qcom,coresight-dummy"; */
|
||||
compatible = "arm,coresight-dummy-source";
|
||||
|
||||
coresight-name = "coresight-modem-rfxe";
|
||||
qcom,dummy-source;
|
||||
atid = <50>;
|
||||
out-ports {
|
||||
port {
|
||||
modem_rxfe_out_funnel_in1: endpoint {
|
||||
@@ -141,22 +134,48 @@
|
||||
compatible = "qcom,coresight-remote-etm";
|
||||
coresight-name = "coresight-audio-etm0";
|
||||
|
||||
qcom,inst-id = <5>;
|
||||
atid = <40>;
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
audio_etm0_out_funnel_lpass: endpoint {
|
||||
remote-endpoint =
|
||||
<&funnel_lpass_in_audio_etm0>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
audio_etm0_out_qmi: endpoint {
|
||||
remote-endpoint =
|
||||
<&qmi_in_audio_etm0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
audio-qmi {
|
||||
compatible = "qcom,coresight-qmi";
|
||||
|
||||
coresight-name = "coresight-qmi-auido";
|
||||
qcom,inst-id = <5>;
|
||||
|
||||
in-ports {
|
||||
port {
|
||||
qmi_in_audio_etm0: endpoint {
|
||||
remote-endpoint =
|
||||
<&audio_etm0_out_qmi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
snoc: snoc {
|
||||
/* compatible = "qcom,coresight-dummy"; */
|
||||
compatible = "arm,coresight-dummy-source";
|
||||
coresight-name = "coresight-snoc";
|
||||
|
||||
qcom,dummy-source;
|
||||
atid = <125>;
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -169,10 +188,10 @@
|
||||
};
|
||||
|
||||
tpdm_lpass: tpdm@8a26000 {
|
||||
/* compatible = "qcom,coresight-dummy"; */
|
||||
compatible = "arm,coresight-dummy-source";
|
||||
|
||||
coresight-name = "coresight-tpdm-lpass";
|
||||
qcom,dummy-source;
|
||||
atid = <26>;
|
||||
out-ports {
|
||||
port {
|
||||
tpdm_lpass_out_funnel_lpass: endpoint {
|
||||
@@ -447,9 +466,9 @@
|
||||
};
|
||||
|
||||
tpdm_wcss: tpdm@899c000 {
|
||||
/* compatible = "qcom,coresight-dummy"; */
|
||||
compatible = "arm,coresight-dummy-source";
|
||||
coresight-name = "coresight-tpdm-wcss";
|
||||
qcom,dummy-source;
|
||||
atid = <67>;
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -491,15 +510,40 @@
|
||||
compatible = "qcom,coresight-remote-etm";
|
||||
coresight-name = "coresight-modem-etm0";
|
||||
|
||||
qcom,inst-id = <2>;
|
||||
atid = <36>;
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
modem_etm0_out_funnel_in1: endpoint {
|
||||
remote-endpoint =
|
||||
<&funnel_in1_in_modem_etm0>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
modem_etm0_out_qmi: endpoint {
|
||||
remote-endpoint =
|
||||
<&qmi_in_modem_etm0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
modem-qmi {
|
||||
compatible = "qcom,coresight-qmi";
|
||||
|
||||
coresight-name = "coresight-qmi-modem";
|
||||
qcom,inst-id = <2>;
|
||||
|
||||
in-ports {
|
||||
port {
|
||||
qmi_in_modem_etm0: endpoint {
|
||||
remote-endpoint =
|
||||
<&modem_etm0_out_qmi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -913,13 +957,13 @@
|
||||
};
|
||||
};
|
||||
|
||||
tpda: tpda@8004000 {
|
||||
tpda_dl: tpda@8004000 {
|
||||
compatible = "arm,primecell";
|
||||
arm,primecell-periphid = <0x000bb969>;
|
||||
reg = <0x8004000 0x1000>;
|
||||
reg-names = "tpda-base";
|
||||
|
||||
coresight-name = "coresight-tpda";
|
||||
coresight-name = "coresight-tpda-dl";
|
||||
|
||||
qcom,tpda-atid = <65>;
|
||||
qcom,dsb-elem-size = <0 32>,
|
||||
|
||||
@@ -24,6 +24,34 @@
|
||||
qcom,vdd-io-current-level = <0 250000>;
|
||||
};
|
||||
|
||||
&sdhc_3 {
|
||||
/* device core power supply for sd card*/
|
||||
vdd-supply = <&L26A>;
|
||||
qcom,vdd-voltage-level = <3304000 3304000>;
|
||||
qcom,vdd-current-level = <200 570000>;
|
||||
|
||||
/* device communication power supply for msm_io*/
|
||||
vdd-io-supply = <&L16A>;
|
||||
qcom,vdd-io-voltage-level = <1800000 1800000>;
|
||||
qcom,vdd-io-always-on;
|
||||
qcom,vdd-io-current-level = <200 22000>;
|
||||
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
qcom,core_3_0v_support;
|
||||
qcom,restore-after-cx-collapse;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sdc3_clk_on &sdc3_cmd_on &sdc3_data_on>;
|
||||
pinctrl-1 = <&sdc3_clk_off &sdc3_cmd_off &sdc3_data_off>;
|
||||
|
||||
/* forbid SDR104/SDR50/DDR50 for hi3881 */
|
||||
sdhci-caps-mask = <0x7 0x0>;
|
||||
qcom,devfreq,freq-table = <400000 20000000 25000000 50000000>;
|
||||
max-frequency = <50000000>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pm5100_sdam_2 {
|
||||
hap_cl_brake: cl_brake@7c {
|
||||
reg = <0x7c 0x1>;
|
||||
|
||||
@@ -7,6 +7,7 @@
|
||||
#include <dt-bindings/iio/qcom,spmi-adc5-gen3-pm5100.h>
|
||||
#include <dt-bindings/iio/qti_power_supply_iio.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include "slate.dtsi"
|
||||
|
||||
&pm5100_charger {
|
||||
qcom,remote-fg;
|
||||
|
||||
@@ -1478,6 +1478,90 @@
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc3_clk {
|
||||
sdc3_clk_on: sdc3_clk_on {
|
||||
mux {
|
||||
pins = "gpio79";
|
||||
function = "sdc3_clk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio79";
|
||||
drive-strength = <8>; /* 8 MA */
|
||||
bias-disable; /* NO pull */
|
||||
};
|
||||
};
|
||||
|
||||
sdc3_clk_off: sdc3_clk_off {
|
||||
mux {
|
||||
pins = "gpio79";
|
||||
function = "sdc3_clk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio79";
|
||||
bias-disable; /* NO pull */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc3_cmd {
|
||||
sdc3_cmd_on: sdc3_cmd_on {
|
||||
mux {
|
||||
pins = "gpio78";
|
||||
function = "sdc3_cmd";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio78";
|
||||
bias-pull-up; /* pull up */
|
||||
drive-strength = <8>; /* 8 MA */
|
||||
};
|
||||
};
|
||||
|
||||
sdc3_cmd_off: sdc3_cmd_off {
|
||||
mux {
|
||||
pins = "gpio78";
|
||||
function = "sdc3_cmd";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio78";
|
||||
bias-pull-up; /* pull up */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_sdc3_data {
|
||||
sdc3_data_on: sdc3_data_on {
|
||||
mux {
|
||||
pins = "gpio74","gpio75","gpio76","gpio77";
|
||||
function = "sdc3_data";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio74","gpio75","gpio76","gpio77";
|
||||
bias-pull-up; /* pull up */
|
||||
drive-strength = <8>; /* 8 MA */
|
||||
};
|
||||
};
|
||||
|
||||
sdc3_data_off: sdc3_data_off {
|
||||
mux {
|
||||
pins = "gpio74","gpio75","gpio76","gpio77";
|
||||
function = "sdc3_data";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio74","gpio75","gpio76","gpio77";
|
||||
bias-pull-up; /* pull up */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmx_ts_int_active {
|
||||
ts_int_active: ts_int_active {
|
||||
mux {
|
||||
|
||||
161
qcom/monaco.dtsi
161
qcom/monaco.dtsi
@@ -26,6 +26,7 @@
|
||||
|
||||
aliases {
|
||||
mmc0 = &sdhc_1; /*SDC1 eMMC slot*/
|
||||
sdhc2 = &sdhc_3; /*SDC3 SDIO slot*/
|
||||
serial0 = &qupv3_se6_2uart;
|
||||
hsuart0 = &qupv3_se5_4uart;
|
||||
i2c1 = &qupv3_se1_i2c;
|
||||
@@ -54,17 +55,17 @@
|
||||
qcom,lmh-dcvs = <&lmh_dcvs0>;
|
||||
#cooling-cells = <2>;
|
||||
L2_0: l2-cache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
cache-size = <0x80000>;
|
||||
cache-level = <2>;
|
||||
compatible = "cache";
|
||||
cache-size = <0x80000>;
|
||||
cache-level = <2>;
|
||||
};
|
||||
|
||||
L1_I_0: l1-icache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
|
||||
L1_D_0: l1-dcache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -85,11 +86,11 @@
|
||||
qcom,lmh-dcvs = <&lmh_dcvs0>;
|
||||
|
||||
L1_I_1: l1-icache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
|
||||
L1_D_1: l1-dcache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -110,11 +111,11 @@
|
||||
qcom,lmh-dcvs = <&lmh_dcvs0>;
|
||||
|
||||
L1_I_2: l1-icache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
|
||||
L1_D_2: l1-dcache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -135,11 +136,11 @@
|
||||
qcom,lmh-dcvs = <&lmh_dcvs0>;
|
||||
|
||||
L1_I_3: l1-icache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
|
||||
L1_D_3: l1-dcache {
|
||||
/* compatible = "arm,arch-cache"; */
|
||||
compatible = "cache";
|
||||
};
|
||||
|
||||
};
|
||||
@@ -576,7 +577,7 @@
|
||||
};
|
||||
|
||||
qcom_qseecom: qseecom@61800000 {
|
||||
/* compatible = "qcom,qseecom"; */
|
||||
compatible = "qcom,qseecom";
|
||||
reg = <0x61800000 0x2100000>;
|
||||
reg-names = "secapp-region";
|
||||
memory-region = <&qseecom_mem>;
|
||||
@@ -621,6 +622,16 @@
|
||||
hyplog-size-offset = <0x414>;
|
||||
};
|
||||
|
||||
qcom_rng: qrng@4453000 {
|
||||
compatible = "qcom,msm-rng";
|
||||
reg = <0x4453000 0x1000>;
|
||||
qcom,no-qrng-config;
|
||||
interconnect-names = "data_path";
|
||||
interconnects = <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_HWKM>;
|
||||
clock-names = "km_clk_src";
|
||||
clocks = <&rpmcc RPM_SMD_HWKM_CLK>;
|
||||
};
|
||||
|
||||
qcom_cedev: qcedev@1b20000 {
|
||||
compatible = "qcom,qcedev";
|
||||
reg = <0x1b20000 0x20000>,
|
||||
@@ -1065,13 +1076,13 @@
|
||||
};
|
||||
|
||||
rpmcc: qcom,rpmcc {
|
||||
/* compatible = "qcom,rpmcc-monaco"; */
|
||||
compatible = "qcom,rpmcc-monaco";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
gcc: clock-controller@1410000 {
|
||||
/* compatible = "qcom,monaco-gcc", "syscon"; */
|
||||
compatible = "qcom,monaco-gcc", "syscon";
|
||||
reg = <0x1400000 0x1e0000>;
|
||||
reg-names = "cc_base";
|
||||
vdd_cx-supply = <&VDD_CX_LEVEL>;
|
||||
@@ -1085,7 +1096,7 @@
|
||||
};
|
||||
|
||||
dispcc: clock-controller@5f00000 {
|
||||
/* compatible = "qcom,monaco-dispcc", "syscon"; */
|
||||
compatible = "qcom,monaco-dispcc", "syscon";
|
||||
reg = <0x05f00000 0x20000>;
|
||||
reg-names = "cc_base";
|
||||
clock-names = "bi_tcxo", "bi_tcxo_ao", "gpll0_out_main",
|
||||
@@ -1098,7 +1109,7 @@
|
||||
};
|
||||
|
||||
gpucc: clock-controller@5990000 {
|
||||
/* compatible = "qcom,monaco-gpucc", "syscon"; */
|
||||
compatible = "qcom,monaco-gpucc", "syscon";
|
||||
reg = <0x5990000 0x9000>;
|
||||
reg-names = "cc_base";
|
||||
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
|
||||
@@ -1122,7 +1133,7 @@
|
||||
};
|
||||
|
||||
debugcc: clock-controller@0 {
|
||||
/* compatible = "qcom,monaco-debugcc"; */
|
||||
compatible = "qcom,monaco-debugcc";
|
||||
qcom,gcc = <&gcc>;
|
||||
qcom,dispcc = <&dispcc>;
|
||||
qcom,gpucc = <&gpucc>;
|
||||
@@ -1560,6 +1571,13 @@
|
||||
qcom,glinkpkt-ch-name = "slate-dfu";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_slate_dfu";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-custom-data {
|
||||
qcom,glinkpkt-edge = "slate";
|
||||
qcom,glinkpkt-ch-name = "slate_custom_data";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_slate_custom_data";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-ss-bt-ctrl {
|
||||
qcom,glinkpkt-edge = "slate";
|
||||
qcom,glinkpkt-ch-name = "ss_bt_ctrl";
|
||||
@@ -1591,50 +1609,6 @@
|
||||
|
||||
};
|
||||
|
||||
jtag_mm0: jtagmm@9040000 {
|
||||
/* compatible = "qcom,jtagv8-mm"; */
|
||||
reg = <0x9040000 0x1000>;
|
||||
reg-names = "etm-base";
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
||||
clock-names = "core_clk";
|
||||
|
||||
qcom,coresight-jtagmm-cpu = <&CPU0>;
|
||||
};
|
||||
|
||||
jtag_mm1: jtagmm@9140000 {
|
||||
/* compatible = "qcom,jtagv8-mm"; */
|
||||
reg = <0x9140000 0x1000>;
|
||||
reg-names = "etm-base";
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
||||
clock-names = "core_clk";
|
||||
|
||||
qcom,coresight-jtagmm-cpu = <&CPU1>;
|
||||
};
|
||||
|
||||
jtag_mm2: jtagmm@9240000 {
|
||||
/* compatible = "qcom,jtagv8-mm"; */
|
||||
reg = <0x9240000 0x1000>;
|
||||
reg-names = "etm-base";
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
||||
clock-names = "core_clk";
|
||||
|
||||
qcom,coresight-jtagmm-cpu = <&CPU2>;
|
||||
};
|
||||
|
||||
jtag_mm3: jtagmm@9340000 {
|
||||
/* compatible = "qcom,jtagv8-mm"; */
|
||||
reg = <0x9340000 0x1000>;
|
||||
reg-names = "etm-base";
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_QDSS_CLK>;
|
||||
clock-names = "core_clk";
|
||||
|
||||
qcom,coresight-jtagmm-cpu = <&CPU3>;
|
||||
};
|
||||
|
||||
dcc: dcc_v2@16FF000 {
|
||||
compatible = "qcom,dcc-v2";
|
||||
reg = <0x16FF000 0x1000>,
|
||||
@@ -1654,7 +1628,7 @@
|
||||
};
|
||||
|
||||
clk_virt: interconnect {
|
||||
/* compatible = "qcom,monaco-clk_virt"; */
|
||||
compatible = "qcom,monaco-clk_virt";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_QUP_CLK>,
|
||||
@@ -1662,7 +1636,7 @@
|
||||
};
|
||||
|
||||
mmnrt_virt: interconnect@0 {
|
||||
/* compatible = "qcom,monaco-mmnrt_virt"; */
|
||||
compatible = "qcom,monaco-mmnrt_virt";
|
||||
#interconnect-cells = <1>;
|
||||
qcom,util-factor = <142>;
|
||||
qcom,keepalive;
|
||||
@@ -1672,7 +1646,7 @@
|
||||
};
|
||||
|
||||
mmrt_virt: interconnect@1 {
|
||||
/* compatible = "qcom,monaco-mmrt_virt"; */
|
||||
compatible = "qcom,monaco-mmrt_virt";
|
||||
#interconnect-cells = <1>;
|
||||
qcom,util-factor = <142>;
|
||||
qcom,keepalive;
|
||||
@@ -1683,7 +1657,7 @@
|
||||
|
||||
system_noc: interconnect@1880000 {
|
||||
reg = <0x01880000 0x5e200>;
|
||||
/* compatible = "qcom,monaco-system_noc"; */
|
||||
compatible = "qcom,monaco-system_noc";
|
||||
#interconnect-cells = <1>;
|
||||
qcom,keepalive;
|
||||
clock-names = "bus", "bus_a";
|
||||
@@ -1696,7 +1670,7 @@
|
||||
|
||||
config_noc: interconnect@1900000 {
|
||||
reg = <0x01900000 0x1000>;
|
||||
/* compatible = "qcom,monaco-config_noc"; */
|
||||
compatible = "qcom,monaco-config_noc";
|
||||
#interconnect-cells = <1>;
|
||||
qcom,keepalive;
|
||||
clock-names = "bus", "bus_a";
|
||||
@@ -1706,7 +1680,7 @@
|
||||
|
||||
bimc: interconnect@4480000 {
|
||||
reg = <0x04480000 0x80000>;
|
||||
/* compatible = "qcom,monaco-bimc"; */
|
||||
compatible = "qcom,monaco-bimc";
|
||||
#interconnect-cells = <1>;
|
||||
qcom,util-factor = <151>;
|
||||
qcom,keepalive;
|
||||
@@ -1716,7 +1690,7 @@
|
||||
};
|
||||
|
||||
rpm_bus: qcom,rpm-smd {
|
||||
/* compatible = "qcom,rpm-smd"; */
|
||||
compatible = "qcom,rpm-smd";
|
||||
rpm-channel-name = "rpm_requests";
|
||||
interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
|
||||
rpm-channel-type = <15>; /* SMD_APPS_RPM */
|
||||
@@ -1824,8 +1798,57 @@
|
||||
};
|
||||
};
|
||||
|
||||
sdhc_3: sdhci@4784000 {
|
||||
compatible = "qcom,sdhci-msm-v5";
|
||||
reg = <0x04784000 0x1000>;
|
||||
reg-names = "hc_mem";
|
||||
|
||||
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "hc_irq", "pwr_irq";
|
||||
|
||||
clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
|
||||
interconnects = <&system_noc MASTER_SDCC_2 &bimc SLAVE_EBI_CH0>,
|
||||
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_SDCC_2>;
|
||||
interconnect-names = "sdhc-ddr","cpu-sdhc";
|
||||
qcom,msm-bus,name = "sdhc3";
|
||||
qcom,msm-bus,num-cases = <8>;
|
||||
qcom,msm-bus,num-paths = <2>;
|
||||
qcom,msm-bus,vectors-KBps =
|
||||
/* No Vote */
|
||||
<0 0>, <0 0>,
|
||||
/* 400 KB/s*/
|
||||
<1046 3200>, <1600 1600>,
|
||||
/* 25 MB/s */
|
||||
<65360 250000>, <100000 133320>,
|
||||
/* 50 MB/s */
|
||||
<130718 250000>, <133320 133320>,
|
||||
/* 100 MB/s */
|
||||
<261438 250000>, <150000 133320>,
|
||||
/* 200 MB/s */
|
||||
<261438 800000>, <300000 300000>,
|
||||
/* Max. bandwidth */
|
||||
<1338562 4096000>, <1338562 4096000>;
|
||||
qcom,bus-bw-vectors-bps = <0 400000 25000000 50000000
|
||||
100000000 200000000 4294967295>;
|
||||
|
||||
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
|
||||
qcom,dll-hsr-list = <0x0007642c 0x0 0x0 0x00010800 0x80040868>;
|
||||
|
||||
bus-width = <4>;
|
||||
|
||||
iommus = <&apps_smmu 0xA0 0x0>;
|
||||
qcom,iommu-dma = "bypass";
|
||||
|
||||
qcom,devfreq,freq-table = <400000 20000000 25000000 50000000>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mpm: interrupt-controller@45f01b8 {
|
||||
/* compatible = "qcom,mpm-monaco", "qcom,mpm"; */
|
||||
compatible = "qcom,mpm-monaco", "qcom,mpm";
|
||||
interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
|
||||
reg = <0x45f01b8 0x1000>,
|
||||
<0xf111008 0x4>,
|
||||
|
||||
19
qcom/parrot-idp-wcn6755-amoled-rcm-overlay.dts
Normal file
19
qcom/parrot-idp-wcn6755-amoled-rcm-overlay.dts
Normal file
@@ -0,0 +1,19 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "parrot-idp-wcn6750-amoled-rcm.dtsi"
|
||||
#include "parrot-idp-pm7250b.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Parrot WCN6755 IDP + AMOLED + RCM";
|
||||
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
|
||||
qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
|
||||
<633 0x10000>, <634 0x10000>, <638 0x10000>,
|
||||
<663 0x10000>;
|
||||
qcom,board-id = <34 6>;
|
||||
};
|
||||
20
qcom/parrot-idp-wcn6755-nopmi-overlay.dts
Normal file
20
qcom/parrot-idp-wcn6755-nopmi-overlay.dts
Normal file
@@ -0,0 +1,20 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "parrot-idp.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Parrot IDP + WCN6755";
|
||||
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
|
||||
qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
|
||||
<633 0x10000>, <634 0x10000>, <638 0x10000>,
|
||||
<663 0x10000>;
|
||||
qcom,board-id = <34 5>;
|
||||
qcom,pmic-id-size = <9>;
|
||||
qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
|
||||
};
|
||||
19
qcom/parrot-idp-wcn6755-overlay.dts
Normal file
19
qcom/parrot-idp-wcn6755-overlay.dts
Normal file
@@ -0,0 +1,19 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "parrot-idp.dtsi"
|
||||
#include "parrot-idp-pm7250b.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Parrot WCN6755 IDP";
|
||||
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
|
||||
qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
|
||||
<633 0x10000>, <634 0x10000>, <638 0x10000>,
|
||||
<663 0x10000>;
|
||||
qcom,board-id = <34 5>;
|
||||
};
|
||||
19
qcom/parrot-idp-wcn6755-pm8350b-overlay.dts
Normal file
19
qcom/parrot-idp-wcn6755-pm8350b-overlay.dts
Normal file
@@ -0,0 +1,19 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "parrot-idp.dtsi"
|
||||
#include "parrot-idp-pm8350b.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Parrot IDP + WCN6755";
|
||||
compatible = "qcom,parrot-idp", "qcom,parrot", "qcom,idp";
|
||||
qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
|
||||
<633 0x10000>, <634 0x10000>, <638 0x10000>,
|
||||
<663 0x10000>;
|
||||
qcom,board-id = <34 5>;
|
||||
};
|
||||
@@ -31,6 +31,7 @@
|
||||
|
||||
&pm6450_pwm_1 {
|
||||
status = "ok";
|
||||
qcom,force-low-pwm-size;
|
||||
};
|
||||
|
||||
&qupv3_se9_i2c {
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
};
|
||||
|
||||
qcom,pmic_glink_log {
|
||||
compatible = "qcom,pmic-glink";
|
||||
compatible = "qcom,qti-pmic-glink";
|
||||
qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS";
|
||||
|
||||
qcom,battery_debug {
|
||||
|
||||
@@ -22,7 +22,7 @@
|
||||
};
|
||||
|
||||
qcom,pmic_glink_log {
|
||||
compatible = "qcom,pmic-glink";
|
||||
compatible = "qcom,qti-pmic-glink";
|
||||
qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS";
|
||||
|
||||
qcom,battery_debug {
|
||||
|
||||
19
qcom/parrot-qrd-wcn6755-overlay.dts
Normal file
19
qcom/parrot-qrd-wcn6755-overlay.dts
Normal file
@@ -0,0 +1,19 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "parrot-qrd-wcn6750.dtsi"
|
||||
#include "parrot-qrd-pm7250b.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Parrot WCN6755 QRD";
|
||||
compatible = "qcom,parrot-qrd", "qcom,parrot", "qcom,qrd";
|
||||
qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>,
|
||||
<633 0x10000>, <634 0x10000>, <638 0x10000>,
|
||||
<663 0x10000>;
|
||||
qcom,board-id = <0x1000B 2>;
|
||||
};
|
||||
@@ -125,8 +125,10 @@
|
||||
#size-cells = <0>;
|
||||
status = "ok";
|
||||
qcom,touch-active = "goodix,gt9916S";
|
||||
qcom,la-vm;
|
||||
|
||||
goodix-berlin@0 {
|
||||
compatible = "goodix,gt9916S";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
@@ -150,6 +152,8 @@
|
||||
pinctrl-1 = <&ts_spi_int_suspend &ts_spi_reset_suspend>;
|
||||
pinctrl-2 = <&ts_spi_release>;
|
||||
|
||||
goodix,touch-type = "primary";
|
||||
goodix,qts_en;
|
||||
qcom,touch-environment = "pvm";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -574,7 +574,7 @@
|
||||
<&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>,
|
||||
<&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,
|
||||
<&aggre2_noc MASTER_QUP_1 &mc_virt SLAVE_EBI1>;
|
||||
pinctrl-names = "default", "active", "sleep";
|
||||
pinctrl-names = "default", "active", "sleep", "shutdown";
|
||||
pinctrl-0 = <&qupv3_se11_default_cts>, <&qupv3_se11_default_rts>,
|
||||
<&qupv3_se11_default_tx>, <&qupv3_se11_default_rx>;
|
||||
pinctrl-1 = <&qupv3_se11_cts>, <&qupv3_se11_rts>,
|
||||
@@ -584,6 +584,7 @@
|
||||
pinctrl-3 = <&qupv3_se11_default_cts>, <&qupv3_se11_default_rts>,
|
||||
<&qupv3_se11_default_tx>, <&qupv3_se11_default_rx>;
|
||||
qcom,wakeup-byte = <0xFD>;
|
||||
qcom,suspend-ignore-children;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
183
qcom/parrot.dtsi
183
qcom/parrot.dtsi
@@ -1876,14 +1876,14 @@
|
||||
ufshc_mem: ufshc@1d84000 {
|
||||
compatible = "qcom,ufshc";
|
||||
reg = <0x1d84000 0x3000>,
|
||||
<0x1d88000 0x8000>,
|
||||
<0x1d90000 0x9000>;
|
||||
reg-names = "ufs_mem", "ufs_ice", "ufs_ice_hwkm";
|
||||
<0x1d88000 0x18000>;
|
||||
reg-names = "ufs_mem", "ice";
|
||||
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&ufsphy_mem>;
|
||||
phy-names = "ufsphy";
|
||||
#reset-cells = <1>;
|
||||
|
||||
qcom,ice-use-hwkm;
|
||||
lanes-per-direction = <2>;
|
||||
dev-ref-clk-freq = <0>; /* 19.2 MHz */
|
||||
clock-names =
|
||||
@@ -2167,6 +2167,7 @@
|
||||
|
||||
qcom,adsp_qrtr {
|
||||
qcom,glink-channels = "IPCRTR";
|
||||
qcom,net-id = <2>;
|
||||
qcom,intents = <0x800 5
|
||||
0x2000 3
|
||||
0x4400 2>;
|
||||
@@ -2174,10 +2175,15 @@
|
||||
qcom,no-wake-svc = <0x190>;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_rpmsg {
|
||||
compatible = "qcom,msm-fastrpc-rpmsg";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
qcom,intents = <0x64 64>;
|
||||
qcom,pmic_glink_rpmsg {
|
||||
qcom,glink-channels = "PMIC_RTR_ADSP_APPS";
|
||||
};
|
||||
|
||||
qcom,pmic_glink_log_rpmsg {
|
||||
qcom,glink-channels = "PMIC_LOGS_ADSP_APPS";
|
||||
qcom,intents = <0x800 5
|
||||
0xc00 3
|
||||
0x2000 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -2222,7 +2228,7 @@
|
||||
qcom,smem-states = <&cdsp_smp2p_out 0>;
|
||||
qcom,smem-state-names = "stop";
|
||||
|
||||
glink-edge {
|
||||
remoteproc_cdsp_glink: glink-edge {
|
||||
qcom,remote-pid = <5>;
|
||||
transport = "smem";
|
||||
mboxes = <&ipcc_mproc IPCC_CLIENT_CDSP
|
||||
@@ -2243,12 +2249,6 @@
|
||||
0x4400 2>;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_rpmsg {
|
||||
compatible = "qcom,msm-fastrpc-rpmsg";
|
||||
qcom,glink-channels = "fastrpcglink-apps-dsp";
|
||||
qcom,intents = <0x64 64>;
|
||||
};
|
||||
|
||||
qcom,msm_cdsprm_rpmsg {
|
||||
compatible = "qcom,msm-cdsprm-rpmsg";
|
||||
qcom,glink-channels = "cdsprmglink-apps-dsp";
|
||||
@@ -2582,162 +2582,7 @@
|
||||
qcom,pipe-attr-ee;
|
||||
};
|
||||
|
||||
msm_fastrpc: qcom,msm_fastrpc {
|
||||
compatible = "qcom,msm-fastrpc-compute";
|
||||
qcom,adsp-remoteheap-vmid = <22 37>;
|
||||
qcom,fastrpc-adsp-audio-pdr;
|
||||
qcom,fastrpc-adsp-sensors-pdr;
|
||||
qcom,rpc-latency-us = <235>;
|
||||
qcom,fastrpc-gids = <2908>;
|
||||
qcom,qos-cores = <0 1 2 3>;
|
||||
|
||||
qcom,msm_fastrpc_compute_cb1 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1401 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb2 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1402 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb3 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1403 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb4 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1404 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb5 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1405 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb6 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1406 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb7 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1407 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb8 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1408 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb9 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
qcom,secure-context-bank;
|
||||
iommus = <&apps_smmu 0x1409 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb10 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "adsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1803 0x0>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb11 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "adsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1804 0x0>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb12 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "adsprpc-smd";
|
||||
iommus = <&apps_smmu 0x1805 0x0>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
shared-cb = <5>;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb13 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x140B 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb14 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x140C 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb15 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x140D 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
qcom,msm_fastrpc_compute_cb16 {
|
||||
compatible = "qcom,msm-fastrpc-compute-cb";
|
||||
label = "cdsprpc-smd";
|
||||
iommus = <&apps_smmu 0x140E 0x0400>;
|
||||
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF";
|
||||
dma-coherent;
|
||||
};
|
||||
};
|
||||
|
||||
thermal_zones: thermal-zones {
|
||||
};
|
||||
|
||||
@@ -218,6 +218,11 @@ _platform_map = {
|
||||
{"name": "parrot-idp-wcn6750-amoled-4gb-overlay.dtbo"},
|
||||
{"name": "parrot-qrd-4gb-overlay.dtbo"},
|
||||
{"name": "parrot-qrd-wcn6750-4gb-overlay.dtbo"},
|
||||
{"name": "parrot-idp-wcn6755-amoled-rcm-overlay.dtbo"},
|
||||
{"name": "parrot-idp-wcn6755-overlay.dtbo"},
|
||||
{"name": "parrot-qrd-wcn6755-overlay.dtbo"},
|
||||
{"name": "parrot-idp-wcn6755-pm8350b-overlay.dtbo"},
|
||||
{"name": "parrot-idp-wcn6755-nopmi-overlay.dtbo"},
|
||||
{"name": "ravelin-rumi-overlay.dtbo"},
|
||||
{"name": "ravelin-atp-overlay.dtbo"},
|
||||
{"name": "ravelin-idp-overlay.dtbo"},
|
||||
|
||||
@@ -56,7 +56,6 @@
|
||||
&sdhc_2 {
|
||||
status = "ok";
|
||||
vdd-supply = <&L24B>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 800000>;
|
||||
|
||||
/*
|
||||
|
||||
@@ -105,7 +105,6 @@
|
||||
&sdhc_2 {
|
||||
status = "ok";
|
||||
vdd-supply = <&L24B>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 800000>;
|
||||
|
||||
/*
|
||||
|
||||
@@ -56,7 +56,6 @@
|
||||
&sdhc_2 {
|
||||
status = "ok";
|
||||
vdd-supply = <&L24B>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 800000>;
|
||||
|
||||
/*
|
||||
|
||||
@@ -156,7 +156,6 @@
|
||||
&sdhc_2 {
|
||||
status = "ok";
|
||||
vdd-supply = <&L24B>;
|
||||
qcom,vdd-voltage-level = <2960000 2960000>;
|
||||
qcom,vdd-current-level = <0 800000>;
|
||||
|
||||
vdd-io-supply = <&L28B>;
|
||||
|
||||
@@ -62,8 +62,8 @@
|
||||
reg = <0x0 0x17D09100 0x0 0x200>;
|
||||
ranges = <0x0 0x0 0x0 0x17D09100 0x0 0x200>;
|
||||
|
||||
cpu_scp_lpri: scp-shmem@0 {
|
||||
compatible = "arm,scp-shmem";
|
||||
cpu_scmi_lpri: scmi-shmem@0 {
|
||||
compatible = "arm,scmi-shmem";
|
||||
reg = <0x0 0x0 0x0 0x200>;
|
||||
};
|
||||
};
|
||||
@@ -351,6 +351,7 @@
|
||||
#include "ravelin-usb.dtsi"
|
||||
#include "ravelin-coresight.dtsi"
|
||||
#include "ravelin-debug.dtsi"
|
||||
#include "parrot-walt.dtsi"
|
||||
|
||||
&reserved_memory {
|
||||
#address-cells = <2>;
|
||||
@@ -373,6 +374,12 @@
|
||||
no-map;
|
||||
};
|
||||
|
||||
kinfo_mem: debug_kinfo_region {
|
||||
alloc-ranges = <0x0 0x00000000 0xffffffff 0xffffffff>;
|
||||
size = <0x0 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
va_md_mem: va_md_mem_region {
|
||||
compatible = "shared-dma-pool";
|
||||
alloc-ranges = <0x1 0x00000000 0xfffffffe 0xffffffff>;
|
||||
@@ -746,7 +753,7 @@
|
||||
compatible = "qcom,cpucp";
|
||||
reg = <0x17400000 0x10>,
|
||||
<0x17d90000 0x2000>;
|
||||
reg-names = "rx", "tx";
|
||||
reg-names = "tx", "rx";
|
||||
#mbox-cells = <1>;
|
||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
@@ -757,7 +764,7 @@
|
||||
compatible = "arm,scmi";
|
||||
mboxes = <&cpucp 0>;
|
||||
mbox-names = "tx";
|
||||
shmem = <&cpu_scp_lpri>;
|
||||
shmem = <&cpu_scmi_lpri>;
|
||||
|
||||
scmi_pmu: protocol@86 {
|
||||
reg = <0x86>;
|
||||
@@ -1444,8 +1451,7 @@
|
||||
< 0x0008 0xFF 0xFF 0x02 >,
|
||||
< 0x0011 0xFF 0xFF 0x00 >,
|
||||
< 0x0017 0xFF 0xFF 0xFF >,
|
||||
< 0x002A 0xFF 0xFF 0xFF >,
|
||||
< 0x4005 0xC0 0xFF 0xFF >;
|
||||
< 0x002A 0xFF 0xFF 0xFF >;
|
||||
};
|
||||
|
||||
ddr_freq_table: ddr-freq-table {
|
||||
@@ -1531,7 +1537,6 @@
|
||||
|
||||
qcom_memlat: qcom,memlat {
|
||||
compatible = "qcom,memlat";
|
||||
qcom,be-stall-ev = <0x4005>;
|
||||
|
||||
ddr {
|
||||
compatible = "qcom,memlat-grp";
|
||||
@@ -1736,6 +1741,11 @@
|
||||
reg = <0x007C4000 0x1000>, <0x007C5000 0x1000>,
|
||||
<0x007C8000 0x8000>, <0x007D0000 0x9000>;
|
||||
reg-names = "hc", "cqhci", "cqhci_ice", "cqhci_ice_hwkm";
|
||||
iommus = <&apps_smmu 0x560 0x0>;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
|
||||
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
|
||||
qcom,iommu-geometry = <0x40000000 0x10000000>;
|
||||
|
||||
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
|
||||
@@ -1765,6 +1775,11 @@
|
||||
|
||||
qcom,ice-clk-rates = <300000000 100000000>;
|
||||
|
||||
interconnects = <&aggre2_noc MASTER_SDCC_1 &mc_virt SLAVE_EBI1>,
|
||||
<&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_SDC1>;
|
||||
interconnect-names = "sdhc-ddr","cpu-sdhc";
|
||||
operating-points-v2 = <&sdhc1_opp_table>;
|
||||
|
||||
/* DLL HSR settings. Refer go/hsr - <Target> DLL settings */
|
||||
qcom,dll-hsr-list = <0x000F642C 0x0 0x01
|
||||
0x2C010800 0x80040868>;
|
||||
@@ -1773,18 +1788,6 @@
|
||||
resets = <&gcc GCC_SDCC1_BCR>;
|
||||
reset-names = "core_reset";
|
||||
|
||||
iommus = <&apps_smmu 0x560 0x0>;
|
||||
dma-coherent;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
|
||||
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
|
||||
qcom,iommu-geometry = <0x40000000 0x10000000>;
|
||||
|
||||
interconnects = <&aggre2_noc MASTER_SDCC_1 &mc_virt SLAVE_EBI1>,
|
||||
<&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_SDC1>;
|
||||
interconnect-names = "sdhc-ddr","cpu-sdhc";
|
||||
operating-points-v2 = <&sdhc1_opp_table>;
|
||||
|
||||
qos0 {
|
||||
mask = <0x03>;
|
||||
vote = <44>;
|
||||
@@ -1837,7 +1840,6 @@
|
||||
0x2C010800 0x80040868>;
|
||||
|
||||
iommus = <&apps_smmu 0x140 0x0>;
|
||||
dma-coherent;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
|
||||
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
|
||||
@@ -1930,6 +1932,11 @@
|
||||
compatible = "qcom,logbuf-vendor-hooks";
|
||||
};
|
||||
|
||||
google,debug-kinfo {
|
||||
compatible = "google,debug-kinfo";
|
||||
memory-region = <&kinfo_mem>;
|
||||
};
|
||||
|
||||
mini_dump_node {
|
||||
compatible = "qcom,minidump";
|
||||
status = "ok";
|
||||
|
||||
261
qcom/slate.dtsi
Normal file
261
qcom/slate.dtsi
Normal file
@@ -0,0 +1,261 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&qupv3_se4_spi { /* BLSP4 QUP3*/
|
||||
status = "ok";
|
||||
qcom,shared_ee;
|
||||
qcom,slate-spi {
|
||||
compatible = "qcom,slate-spi";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
interrupt-parent = <&tlmm>;
|
||||
qcom,irq-gpio = <&tlmm 95 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
aon_pas:qcom,rproc-slate {
|
||||
compatible = "qcom,rproc-slate";
|
||||
qcom,firmware-name = "slatefw.mdt";
|
||||
/* GPIO inputs from blackghost */
|
||||
qcom,slate2ap-status-gpio = <&tlmm 98 0>;
|
||||
/* GPIO output to blackghost */
|
||||
qcom,ap2slate-status-gpio = <&tlmm 97 0>;
|
||||
};
|
||||
|
||||
qcom,slate-daemon {
|
||||
compatible = "qcom,slate-daemon";
|
||||
qcom,firmware-name = "slatefw.mdt";
|
||||
qcom,rproc-handle = <&aon_pas>;
|
||||
/* GPIO for external flash */
|
||||
qcom,platform-reset-gpio = <&pm5100_gpios 15 0>;
|
||||
clocks = <&rpmcc RPM_SMD_RF_CLK2>;
|
||||
clock-names = "rf_clk2";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
glink_slatecom:qcom,glink-slatecom-xprt-slate {
|
||||
compatible = "qcom,glink-slatecom-xprt";
|
||||
label = "slate";
|
||||
|
||||
qcom,glink-slate-events-bridge {
|
||||
qcom,glink-channels = "slate-event";
|
||||
qcom,intents = <0x0181 1>;
|
||||
};
|
||||
|
||||
qcom,glink-slatecom-ctrl {
|
||||
qcom,glink-channels = "slate-ctrl";
|
||||
qcom,intents = <0x0C 1>;
|
||||
};
|
||||
|
||||
qcom,glink-slate-ux-ctl {
|
||||
qcom,glink-channels = "slate-ux-ctl";
|
||||
qcom,intents = <0x0C 1>;
|
||||
};
|
||||
|
||||
qcom,glink-slate-rma {
|
||||
qcom,glink-channels = "slate-rma";
|
||||
qcom,intents = <0x24 1>;
|
||||
};
|
||||
|
||||
qcom,glink-slatecom-qcli {
|
||||
qcom,glink-channels = "slate-qcli";
|
||||
qcom,intents = <0x0C 1>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
qcom,glink-slate-rsb {
|
||||
qcom,glink-channels = "slate-rsb-ctl";
|
||||
qcom,intents = <0x0C 1>;
|
||||
};
|
||||
|
||||
qcom,glink-slate-touch {
|
||||
qcom,glink-channels = "touch-ctrl";
|
||||
qcom,intents = <0x0C 1>;
|
||||
};
|
||||
|
||||
qcom,glink-slate-dfu {
|
||||
qcom,glink-channels = "slate-dfu";
|
||||
qcom,intents = <0x24 1>;
|
||||
};
|
||||
|
||||
qcom,glink-slate-custom-data {
|
||||
qcom,glink-channels = "slate_custom_data";
|
||||
qcom,intents = <0x24 1>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-hal {
|
||||
qcom,glink-channels = "ssc_hal";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-sso-hal {
|
||||
qcom,glink-channels = "sso_hal";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-cam-hal {
|
||||
qcom,glink-channels = "cam_hal";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-usta {
|
||||
qcom,glink-channels = "ssc_usta";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-location-ctrl {
|
||||
qcom,glink-channels = "location_ctrl";
|
||||
qcom,intents = <0x1000 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-0 {
|
||||
qcom,glink-channels = "ssc_test_0";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-1 {
|
||||
qcom,glink-channels = "ssc_test_1";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-2 {
|
||||
qcom,glink-channels = "ssc_test_2";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-3 {
|
||||
qcom,glink-channels = "ssc_test_3";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-4 {
|
||||
qcom,glink-channels = "ssc_test_4";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-5 {
|
||||
qcom,glink-channels = "ssc_test_5";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-6 {
|
||||
qcom,glink-channels = "ssc_test_6";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-7 {
|
||||
qcom,glink-channels = "ssc_test_7";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-8 {
|
||||
qcom,glink-channels = "ssc_test_8";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-9 {
|
||||
qcom,glink-channels = "ssc_test_9";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-10 {
|
||||
qcom,glink-channels = "ssc_test_10";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-11 {
|
||||
qcom,glink-channels = "ssc_test_11";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-12 {
|
||||
qcom,glink-channels = "ssc_test_12";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-13 {
|
||||
qcom,glink-channels = "ssc_test_13";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glinkpkt-slate-ssc-test-14 {
|
||||
qcom,glink-channels = "ssc_test_14";
|
||||
qcom,intents = <0x2710 2
|
||||
0x3E8 2>;
|
||||
};
|
||||
|
||||
qcom,glink-ss-bt-ctrl {
|
||||
qcom,glink-channels = "ss_bt_ctrl";
|
||||
qcom,intents = <0x1000 10>;
|
||||
};
|
||||
|
||||
qcom,glink-ss-bt-data {
|
||||
qcom,glink-channels = "ss_bt_data";
|
||||
qcom,intents = <0x1000 10>;
|
||||
};
|
||||
|
||||
qcom,glink-ss-bt-le-data {
|
||||
qcom,glink-channels = "ss_bt_le_data";
|
||||
qcom,intents = <0x1000 10>;
|
||||
};
|
||||
|
||||
qcom,glink-ss-bt-ssr-data {
|
||||
qcom,glink-channels = "ss_bt_ssr_data";
|
||||
qcom,intents = <0xf2f8 10>;
|
||||
};
|
||||
qcom,glink-ss-bt-obex-data {
|
||||
qcom,glink-channels = "ss_bt_obex_data";
|
||||
qcom,intents = <0x1000 10>;
|
||||
};
|
||||
};
|
||||
|
||||
qcom,slatecom-rpmsg {
|
||||
compatible = "qcom,slatecom-rpmsg";
|
||||
qcom,glink-channels = "slate-ctrl";
|
||||
qcom,glinkpkt-edge = "slate";
|
||||
intents = <0x200 20>;
|
||||
};
|
||||
|
||||
qcom,slate-events-bridge {
|
||||
compatible = "qcom,slate-events-bridge";
|
||||
};
|
||||
|
||||
qcom,slate-events-bridge-rpmsg {
|
||||
compatible = "qcom,slate-events-bridge-rpmsg";
|
||||
qcom,glink-channels = "slate-event";
|
||||
qcom,glinkpkt-edge = "slate";
|
||||
};
|
||||
|
||||
qcom,slate-rsb {
|
||||
compatible = "qcom,slate-rsb";
|
||||
};
|
||||
|
||||
qcom,slatetouch-rpmsg {
|
||||
compatible = "qcom,slatetouch-rpmsg";
|
||||
qcom,glink-channels = "slate-touch-ctrl";
|
||||
qcom,glinkpkt-edge = "slate";
|
||||
intents = <0x200 1>;
|
||||
};
|
||||
};
|
||||
@@ -1762,8 +1762,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-llm-lmh0";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1783,8 +1785,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-llm-lmh1";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1804,8 +1808,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext-dsb0";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1825,8 +1831,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext-dsb1";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1846,8 +1854,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext-dsb2";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1867,8 +1877,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext-dsb3";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1888,8 +1900,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext-dsb4";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1909,8 +1923,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext_cmb0";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1930,8 +1946,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext_cmb1";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1951,8 +1969,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext_cmb2";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1972,8 +1992,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-ext_cmb3";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -1993,8 +2015,10 @@
|
||||
|
||||
coresight-name = "coresight-tpdm-int-cmb";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
@@ -2028,8 +2052,10 @@
|
||||
<10 64>,
|
||||
<11 64>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
@@ -2222,8 +2248,10 @@
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2328,8 +2356,11 @@
|
||||
coresight-name = "coresight-replicator-etr1_ncc0";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2434,8 +2465,11 @@
|
||||
coresight-name = "coresight-replicator-etr2_ncc0";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2540,8 +2574,11 @@
|
||||
coresight-name = "coresight-replicator-etr3_ncc0";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2646,8 +2683,11 @@
|
||||
coresight-name = "coresight-replicator-etr4_ncc0";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2752,8 +2792,11 @@
|
||||
coresight-name = "coresight-replicator-etr5_ncc0";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2787,8 +2830,10 @@
|
||||
|
||||
coresight-name = "coresight-funnel-ncc0_lv1";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2879,8 +2924,10 @@
|
||||
|
||||
coresight-name = "coresight-tmc-etf-uc0";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2911,8 +2958,11 @@
|
||||
coresight-name = "coresight-replicator-uc0";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2946,8 +2996,10 @@
|
||||
|
||||
coresight-name = "coresight-funnel-ncc0_lv2";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -2989,8 +3041,10 @@
|
||||
|
||||
coresight-name = "coresight-tmc-etf_ncc0";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
|
||||
in-ports {
|
||||
@@ -3091,8 +3145,11 @@
|
||||
coresight-name = "coresight-replicator-etr0_ncc1";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
|
||||
in-ports {
|
||||
@@ -3197,8 +3254,10 @@
|
||||
coresight-name = "coresight-replicator-etr1_ncc1";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
|
||||
in-ports {
|
||||
@@ -3232,8 +3291,10 @@
|
||||
|
||||
coresight-name = "coresight-funnel-ncc1_lv1";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
|
||||
in-ports {
|
||||
@@ -3292,8 +3353,10 @@
|
||||
|
||||
coresight-name = "coresight-tmc-etf-uc1";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
|
||||
in-ports {
|
||||
@@ -3324,8 +3387,11 @@
|
||||
coresight-name = "coresight-replicator-uc1";
|
||||
|
||||
qcom,replicator-loses-context;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
|
||||
in-ports {
|
||||
@@ -3359,8 +3425,10 @@
|
||||
|
||||
coresight-name = "coresight-funnel-ncc1_lv2";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
|
||||
in-ports {
|
||||
@@ -3402,8 +3470,10 @@
|
||||
|
||||
coresight-name = "coresight-tmc-etf_ncc1";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
|
||||
in-ports {
|
||||
@@ -3433,8 +3503,10 @@
|
||||
|
||||
coresight-name = "coresight-funnel-apss";
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
@@ -5552,8 +5624,10 @@
|
||||
coresight-name = "coresight-cti-apss_cti";
|
||||
|
||||
qcom,extended_cti;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
};
|
||||
|
||||
cti@12195000 {
|
||||
@@ -5564,8 +5638,10 @@
|
||||
coresight-name = "coresight-cti-apss_dl";
|
||||
|
||||
qcom,extended_cti;
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>,
|
||||
<&scmi_clk 0>;
|
||||
clock-names = "apb_pclk",
|
||||
"dynamic_clk";
|
||||
};
|
||||
|
||||
cti@10a05000 {
|
||||
|
||||
@@ -734,16 +734,18 @@
|
||||
qcom,dump-size = <0x40000>;
|
||||
qcom,dump-id = <0x220>;
|
||||
};
|
||||
|
||||
scandump_gpu {
|
||||
qcom,dump-size = <0x300000>;
|
||||
qcom,dump-id = <0x221>;
|
||||
};
|
||||
};
|
||||
|
||||
dynamic_mem_dump {
|
||||
qcom,dynamic-mem-dump;
|
||||
|
||||
scandump_gpu {
|
||||
scandump_gpu {
|
||||
qcom,dump-size = <0x300000>;
|
||||
qcom,dump-id = <0x221>;
|
||||
};
|
||||
};
|
||||
|
||||
cpuss_reg {
|
||||
cpuss_reg {
|
||||
qcom,dump-size = <0xa00000>;
|
||||
|
||||
@@ -304,6 +304,10 @@
|
||||
compatible = "qcom,smcinvoke";
|
||||
};
|
||||
|
||||
qcom_mem_object {
|
||||
compatible = "qcom,mem-object";
|
||||
};
|
||||
|
||||
qtee_shmbridge {
|
||||
compatible = "qcom,tee-shared-memory-bridge";
|
||||
qcom,custom-bridge-size = <512>;
|
||||
|
||||
@@ -379,7 +379,6 @@
|
||||
pins = "gpio127";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -409,7 +408,6 @@
|
||||
pins = "gpio128";
|
||||
drive-strength = <8>; /* 8 mA */
|
||||
bias-disable; /* NO PULL */
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -328,7 +328,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -377,7 +377,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -426,7 +426,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -475,7 +475,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -524,7 +524,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -573,7 +573,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -622,7 +622,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -671,7 +671,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -720,7 +720,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -769,7 +769,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -818,7 +818,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -867,7 +867,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -973,7 +973,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1022,7 +1022,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1071,7 +1071,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1120,7 +1120,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1207,7 +1207,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1232,7 +1232,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1257,7 +1257,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1282,7 +1282,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1307,7 +1307,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1332,7 +1332,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1357,7 +1357,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1433,7 +1433,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1471,7 +1471,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1509,7 +1509,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1547,7 +1547,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1585,7 +1585,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1623,7 +1623,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1661,7 +1661,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
@@ -1699,7 +1699,7 @@
|
||||
};
|
||||
|
||||
thermal-hal-config {
|
||||
temperature = <135000>;
|
||||
temperature = <95000>;
|
||||
hysteresis = <5000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
124
qcom/sun-tp.dtsi
124
qcom/sun-tp.dtsi
@@ -20,6 +20,10 @@
|
||||
|
||||
cpu-0-0-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu0-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -36,6 +40,10 @@
|
||||
|
||||
cpu-0-0-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu0-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -52,6 +60,10 @@
|
||||
|
||||
cpu-0-1-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu1-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -68,6 +80,10 @@
|
||||
|
||||
cpu-0-1-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu1-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -84,6 +100,10 @@
|
||||
|
||||
cpu-0-2-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu2-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -100,6 +120,10 @@
|
||||
|
||||
cpu-0-2-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu2-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -116,6 +140,10 @@
|
||||
|
||||
cpu-0-3-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu3-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -132,6 +160,10 @@
|
||||
|
||||
cpu-0-3-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu3-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -148,6 +180,10 @@
|
||||
|
||||
cpu-0-4-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu4-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -164,6 +200,10 @@
|
||||
|
||||
cpu-0-4-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu4-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -180,6 +220,10 @@
|
||||
|
||||
cpu-0-5-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu5-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -196,6 +240,10 @@
|
||||
|
||||
cpu-0-5-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu5-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -236,6 +284,10 @@
|
||||
|
||||
cpu-1-0-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu6-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -252,6 +304,10 @@
|
||||
|
||||
cpu-1-0-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu6-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -268,6 +324,10 @@
|
||||
|
||||
cpu-1-1-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu7-emerg0-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -284,6 +344,10 @@
|
||||
|
||||
cpu-1-1-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
cpu7-emerg1-cfg {
|
||||
temperature = <118000>;
|
||||
};
|
||||
@@ -316,6 +380,10 @@
|
||||
|
||||
nsphvx-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
reset-mon-cfg {
|
||||
temperature = <125000>;
|
||||
};
|
||||
@@ -324,6 +392,10 @@
|
||||
|
||||
nsphvx-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
reset-mon-cfg {
|
||||
temperature = <125000>;
|
||||
};
|
||||
@@ -332,6 +404,10 @@
|
||||
|
||||
nsphvx-2 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
reset-mon-cfg {
|
||||
temperature = <125000>;
|
||||
};
|
||||
@@ -340,6 +416,10 @@
|
||||
|
||||
nsphmx-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
reset-mon-cfg {
|
||||
temperature = <125000>;
|
||||
};
|
||||
@@ -348,6 +428,10 @@
|
||||
|
||||
nsphmx-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
reset-mon-cfg {
|
||||
temperature = <125000>;
|
||||
};
|
||||
@@ -356,6 +440,10 @@
|
||||
|
||||
nsphmx-2 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
reset-mon-cfg {
|
||||
temperature = <125000>;
|
||||
};
|
||||
@@ -364,6 +452,10 @@
|
||||
|
||||
nsphmx-3 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
reset-mon-cfg {
|
||||
temperature = <125000>;
|
||||
};
|
||||
@@ -392,6 +484,10 @@
|
||||
|
||||
gpuss-0 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
@@ -404,6 +500,10 @@
|
||||
|
||||
gpuss-1 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
@@ -416,6 +516,10 @@
|
||||
|
||||
gpuss-2 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
@@ -428,6 +532,10 @@
|
||||
|
||||
gpuss-3 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
@@ -440,6 +548,10 @@
|
||||
|
||||
gpuss-4 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
@@ -452,6 +564,10 @@
|
||||
|
||||
gpuss-5 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
@@ -464,6 +580,10 @@
|
||||
|
||||
gpuss-6 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
@@ -476,6 +596,10 @@
|
||||
|
||||
gpuss-7 {
|
||||
trips {
|
||||
thermal-hal-config {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
tj_cfg {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
@@ -618,6 +618,42 @@
|
||||
qcom,glinkpkt-dev-name = "at_mdm0";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-ctrl-cdsp {
|
||||
qcom,glinkpkt-edge = "cdsp";
|
||||
qcom,glinkpkt-ch-name = "LOOPBACK_CTL_CDSP";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_ctrl_cdsp";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-data-cdsp {
|
||||
qcom,glinkpkt-edge = "cdsp";
|
||||
qcom,glinkpkt-ch-name = "LOOPBACK_DATA_CDSP";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_data_cdsp";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-ctrl-lpass {
|
||||
qcom,glinkpkt-edge = "lpass";
|
||||
qcom,glinkpkt-ch-name = "LOOPBACK_CTL_LPASS";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_ctrl_lpass";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-data-lpass {
|
||||
qcom,glinkpkt-edge = "lpass";
|
||||
qcom,glinkpkt-ch-name = "LOOPBACK_DATA_LPASS";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_data_lpass";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-ctrl-mpss {
|
||||
qcom,glinkpkt-edge = "mpss";
|
||||
qcom,glinkpkt-ch-name = "LOOPBACK_CTL_MPSS";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_ctrl_mpss";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-data-mpss {
|
||||
qcom,glinkpkt-edge = "mpss";
|
||||
qcom,glinkpkt-ch-name = "LOOPBACK_DATA_MPSS";
|
||||
qcom,glinkpkt-dev-name = "glink_pkt_data_mpss";
|
||||
};
|
||||
|
||||
qcom,glinkpkt-apr-apps2 {
|
||||
qcom,glinkpkt-edge = "adsp";
|
||||
qcom,glinkpkt-ch-name = "apr_apps2";
|
||||
@@ -1435,16 +1471,23 @@
|
||||
cluster-device0 {
|
||||
compatible = "qcom,lpm-cluster-dev";
|
||||
power-domains = <&CLUSTER_PD0>;
|
||||
qcom,pred-prem-cnt = <2>;
|
||||
qcom,sample-invalid-time = <40000000>;
|
||||
};
|
||||
|
||||
cluster-device1 {
|
||||
compatible = "qcom,lpm-cluster-dev";
|
||||
power-domains = <&CLUSTER_PD1>;
|
||||
qcom,pred-prem-cnt = <2>;
|
||||
qcom,sample-invalid-time = <40000000>;
|
||||
qcom,use-cluster-bias-timer;
|
||||
};
|
||||
|
||||
cluster-device2 {
|
||||
compatible = "qcom,lpm-cluster-dev";
|
||||
power-domains = <&CLUSTER_PD2>;
|
||||
qcom,pred-prem-cnt = <2>;
|
||||
qcom,sample-invalid-time = <40000000>;
|
||||
};
|
||||
|
||||
qcom,memshare {
|
||||
@@ -2372,7 +2415,8 @@
|
||||
qcom,ice-use-hwkm;
|
||||
qcom,prime-mask = <0xc0>;
|
||||
qcom,silver-mask = <0x3f>;
|
||||
qcom,esi-affinity-mask = <0xe0>;
|
||||
/* affine cpu for each CQ starting from CQ:0 to CQ:max_cqs */
|
||||
qcom,esi-affinity-mask = <4 5 3 4 5 3 7 7>;
|
||||
|
||||
lanes-per-direction = <2>;
|
||||
dev-ref-clk-freq = <0>; /* 19.2 MHz */
|
||||
@@ -3110,6 +3154,11 @@
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
scmi_clk: protocol@14 {
|
||||
reg = <0x14>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
scmi_qcom: protocol@80 {
|
||||
reg = <0x80>;
|
||||
#clock-cells = <1>;
|
||||
@@ -3424,7 +3473,6 @@
|
||||
qcom,count-unit = <0x10000>;
|
||||
qcom,target-dev = <&qcom_llcc_dcvs_hw>;
|
||||
qcom,second-vote = <&qcom_llcc_ddr_vote>;
|
||||
qcom,low-power-cpu = <0>;
|
||||
};
|
||||
|
||||
bwmon_llcc_prime: qcom,bwmon-llcc-prime@240B7300 {
|
||||
@@ -3483,14 +3531,16 @@
|
||||
<&soccp_smp2p_in 1 0>,
|
||||
<&soccp_smp2p_in 3 0>,
|
||||
<&soccp_smp2p_in 2 0>,
|
||||
<&soccp_smp2p_in 9 0>;
|
||||
<&soccp_smp2p_in 9 0>,
|
||||
<&soccp_smp2p_in 10 0>;
|
||||
|
||||
interrupt-names = "wdog",
|
||||
"fatal",
|
||||
"ready",
|
||||
"stop-ack",
|
||||
"handover",
|
||||
"pong";
|
||||
"pong",
|
||||
"wake-ack";
|
||||
|
||||
/* Outputs to soccp */
|
||||
qcom,smem-states = <&soccp_smp2p_out 0>, <&soccp_smp2p_out 10>, <&soccp_smp2p_out 9>;
|
||||
@@ -3518,7 +3568,7 @@
|
||||
|
||||
cnss_audio_iommu_group0: cnss_audio_iommu_group0 {
|
||||
qcom,iommu-msi-size = <0x1000>;
|
||||
qcom,iommu-geometry = <0x88000000 0x28010000>;
|
||||
qcom,iommu-geometry = <0x18000000 0x98010000>;
|
||||
qcom,iommu-dma = "fastmap";
|
||||
qcom,iommu-pagetable = "coherent";
|
||||
qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
|
||||
|
||||
@@ -90,3 +90,12 @@
|
||||
status = "ok";
|
||||
};
|
||||
};
|
||||
|
||||
&pmih010x_eusb2_repeater {
|
||||
qcom,param-override-seq =
|
||||
/* <value reg_offset> */
|
||||
/* Adjust HS trasmit amplitude */
|
||||
<0xf 0x51
|
||||
/* Tx pre-emphasis tuning */
|
||||
0x5 0x57>;
|
||||
};
|
||||
|
||||
@@ -4,4 +4,44 @@
|
||||
*/
|
||||
|
||||
&tlmm {
|
||||
qupv3_se7_2uart_pins: qupv3_se7_2uart_pins {
|
||||
qupv3_se7_2uart_tx_active: qupv3_se7_2uart_tx_active {
|
||||
mux {
|
||||
pins = "gpio30";
|
||||
function = "qup1_se7_l2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio30";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se7_2uart_rx_active: qupv3_se7_2uart_rx_active {
|
||||
mux {
|
||||
pins = "gpio31";
|
||||
function = "qup1_se7_l3";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio31";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
qupv3_se7_2uart_sleep: qupv3_se7_2uart_sleep {
|
||||
mux {
|
||||
pins = "gpio30", "gpio31";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio30", "gpio31";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
33
qcom/tuna-qupv3.dtsi
Normal file
33
qcom/tuna-qupv3.dtsi
Normal file
@@ -0,0 +1,33 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&soc {
|
||||
/* QUPv3_1 Wrapper Instance */
|
||||
qupv3_1: qcom,qupv3_1_geni_se@ac0000 {
|
||||
compatible = "qcom,geni-se-qup";
|
||||
reg = <0xac0000 0x2000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
clock-names = "m-ahb", "s-ahb";
|
||||
clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
|
||||
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
|
||||
ranges;
|
||||
status = "ok";
|
||||
|
||||
/* Debug UART Instance */
|
||||
qupv3_se7_2uart: qcom,qup_uart@a9c000 {
|
||||
compatible = "qcom,geni-debug-uart";
|
||||
reg = <0xA9C000 0x4000>;
|
||||
reg-names = "se_phys";
|
||||
interrupts = <GIC_SPI 579 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "se";
|
||||
clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&qupv3_se7_2uart_tx_active>, <&qupv3_se7_2uart_rx_active>;
|
||||
pinctrl-1 = <&qupv3_se7_2uart_sleep>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
236
qcom/tuna-reserved-memory.dtsi
Normal file
236
qcom/tuna-reserved-memory.dtsi
Normal file
@@ -0,0 +1,236 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
&reserved_memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
gunyah_hyp_mem: gunyah_hyp_region@80000000 {
|
||||
no-map;
|
||||
reg = <0x0 0x80000000 0x0 0xe00000>;
|
||||
};
|
||||
|
||||
cpusys_vm_mem: cpusys_vm_region@80e00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x80e00000 0x0 0x400000>;
|
||||
};
|
||||
|
||||
cpucp_pdp_mem: cpucp_region@81200000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81200000 0x0 0x200000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* hyp_tags_mem is dynamically removed from the RAM
|
||||
* partition tables before boot occurs. Size of region
|
||||
* varies.
|
||||
*/
|
||||
|
||||
xbl_dtlog_mem: xbl_dtlog_region@81a00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81a00000 0x0 0x40000>;
|
||||
};
|
||||
|
||||
aop_image_mem: aop_image_region@81c00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81c00000 0x0 0x60000>;
|
||||
};
|
||||
|
||||
aop_cmd_db_mem: aop_cmd_db_region@81c60000 {
|
||||
compatible = "qcom,cmd-db";
|
||||
no-map;
|
||||
reg = <0x0 0x81c60000 0x0 0x20000>;
|
||||
};
|
||||
|
||||
aop_config_mem: aop_config_region@81c80000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81c80000 0x0 0x20000>;
|
||||
};
|
||||
|
||||
tme_crash_dump_mem: tme_crash_dump_region@81ca0000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81ca0000 0x0 0x40000>;
|
||||
};
|
||||
|
||||
tme_log_mem: tme_log_region@81ce0000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81ce0000 0x0 0x4000>;
|
||||
};
|
||||
|
||||
uefi_log_mem: uefi_log_region@81ce4000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81ce4000 0x0 0x10000>;
|
||||
};
|
||||
|
||||
smem_mem: smem_region@81d00000 {
|
||||
compatible = "qcom,smem";
|
||||
reg = <0x0 0x81d00000 0x0 0x200000>;
|
||||
hwlocks = <&tcsr_mutex 3>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
pdp_ns_shared_mem: pdp_ns_shared_region@81f00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x81f00000 0x0 0x100000>;
|
||||
};
|
||||
|
||||
cpucp_scandump_mem: cpucp_scandump_region@82000000 {
|
||||
no-map;
|
||||
reg = <0x0 0x82000000 0x0 0x380000>;
|
||||
};
|
||||
|
||||
adsp_mhi_mem: adsp_mhi_region@82380000 {
|
||||
no-map;
|
||||
reg = <0x0 0x82380000 0x0 0x20000>;
|
||||
};
|
||||
|
||||
soccp_sdi_mem: soccp_sdi_region@823a0000 {
|
||||
no-map;
|
||||
reg = <0x0 0x823a0000 0x0 0x40000>;
|
||||
};
|
||||
|
||||
pmic_minii_dump_mem: pmic_minii_dump_region@823e0000 {
|
||||
no-map;
|
||||
reg = <0x0 0x823e0000 0x0 0x80000>;
|
||||
};
|
||||
|
||||
pvm_fw_mem: pvm_fw_region@824a0000 {
|
||||
no-map;
|
||||
reg = <0x0 0x824a0000 0x0 0x100000>;
|
||||
};
|
||||
|
||||
hyp_mem_database_mem: hyp_mem_database_region@825a0000 {
|
||||
no-map;
|
||||
reg = <0x0 0x825a0000 0x0 0x60000>;
|
||||
};
|
||||
|
||||
global_sync_mem: global_sync_region@82600000 {
|
||||
no-map;
|
||||
reg = <0x0 0x82600000 0x0 0x100000>;
|
||||
};
|
||||
|
||||
tz_stat_mem: tz_stat_region@82700000 {
|
||||
no-map;
|
||||
reg = <0x0 0x82700000 0x0 0x100000>;
|
||||
};
|
||||
|
||||
dsm_partition_1_mem: dsm_partition_1_region@84a00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x84a00000 0x0 0x4900000>;
|
||||
};
|
||||
|
||||
dsm_partition_2_mem: dsm_partition_2_region@89300000 {
|
||||
no-map;
|
||||
reg = <0x0 0x89300000 0x0 0xa80000>;
|
||||
};
|
||||
|
||||
mpss_mem: mpss_region@89e00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x89e00000 0x0 0x11200000>;
|
||||
};
|
||||
|
||||
q6_mpss_dtb_mem: q6_mpss_dtb_region@9b000000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9b000000 0x0 0x80000>;
|
||||
};
|
||||
|
||||
ipa_fw_mem: ipa_fw_region@9b080000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9b080000 0x0 0x10000>;
|
||||
};
|
||||
|
||||
ipa_gsi_mem: ipa_gsi_region@9b090000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9b090000 0x0 0xa000>;
|
||||
};
|
||||
|
||||
gpu_microcode_mem: gpu_microcode_region@9b09a000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9b09a000 0x0 0x2000>;
|
||||
};
|
||||
|
||||
camera_mem: camera_region@9b300000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9b300000 0x0 0x800000>;
|
||||
};
|
||||
|
||||
camera_2_mem: camera_2_region@9bb00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9bb00000 0x0 0x800000>;
|
||||
};
|
||||
|
||||
video_mem: video_region@9c300000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9c300000 0x0 0x800000>;
|
||||
};
|
||||
|
||||
cvp_mem: cvp_region@9cb00000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9cb00000 0x0 0x700000>;
|
||||
};
|
||||
|
||||
cdsp_mem: cdsp_region@9d200000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9d200000 0x0 0x2000000>;
|
||||
};
|
||||
|
||||
q6_cdsp_dtb_mem: q6_cdsp_dtb_region@9f200000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9f200000 0x0 0x80000>;
|
||||
};
|
||||
|
||||
q6_adsp_dtb_mem: q6_adsp_dtb_region@9f280000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9f280000 0x0 0x80000>;
|
||||
};
|
||||
|
||||
adspslpi_mem: adspslpi_region@9f300000 {
|
||||
no-map;
|
||||
reg = <0x0 0x9f300000 0x0 0x4080000>;
|
||||
};
|
||||
|
||||
soccp_mem: soccp_region@a3380000 {
|
||||
no-map;
|
||||
reg = <0x0 0xa3380000 0x0 0x180000>;
|
||||
};
|
||||
|
||||
wpss_mem: wpss_region@a3500000 {
|
||||
no-map;
|
||||
reg = <0x0 0xa3500000 0x0 0x1900000>;
|
||||
};
|
||||
|
||||
wlan_msa_mem: wlan_msa_region@a6400000 {
|
||||
no-map;
|
||||
reg = <0x0 0xa6400000 0x0 0xc00000>;
|
||||
};
|
||||
|
||||
/* uefi region can be reused by apps */
|
||||
|
||||
/* Linux kernel image is loaded at 0xa8000000 */
|
||||
|
||||
xbl_ramdump_mem: xbl_ramdump_region@b8000000 {
|
||||
no-map;
|
||||
reg = <0x0 0xb8000000 0x0 0x1c0000>;
|
||||
};
|
||||
|
||||
/* merged tz_reserved, xbl_sc, and qtee regions */
|
||||
tz_merged_mem: tz_merged_region@d8000000 {
|
||||
no-map;
|
||||
reg = <0x0 0xd8000000 0x0 0x600000>;
|
||||
};
|
||||
|
||||
/*
|
||||
* ta/tags mem is dynamically removed from the RAM
|
||||
* partition tables before boot occurs. Size of region
|
||||
* varies.
|
||||
*/
|
||||
|
||||
llcc_lpi_mem: llcc_lpi_region@ff800000 {
|
||||
no-map;
|
||||
reg = <0x0 0xff800000 0x0 0x400000>;
|
||||
};
|
||||
|
||||
};
|
||||
@@ -46,3 +46,7 @@
|
||||
&disp_rsc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&qupv3_se7_2uart {
|
||||
qcom,rumi_platform;
|
||||
};
|
||||
|
||||
128
qcom/tuna.dtsi
128
qcom/tuna.dtsi
@@ -38,7 +38,9 @@
|
||||
|
||||
firmware: firmware {};
|
||||
|
||||
aliases {};
|
||||
aliases {
|
||||
serial0 = &qupv3_se7_2uart;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <2>;
|
||||
@@ -208,6 +210,24 @@
|
||||
soc: soc { };
|
||||
};
|
||||
|
||||
#include "tuna-reserved-memory.dtsi"
|
||||
|
||||
&reserved_memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
/* global autoconfigured region for contiguous allocations */
|
||||
system_cma: linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
|
||||
reusable;
|
||||
alignment = <0x0 0x400000>;
|
||||
size = <0x0 0x2000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@@ -453,6 +473,17 @@
|
||||
wakeup-parent = <&pdc>;
|
||||
};
|
||||
|
||||
tcsr_mutex_block: syscon@1f40000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x1f40000 0x20000>;
|
||||
};
|
||||
|
||||
tcsr_mutex: hwlock {
|
||||
compatible = "qcom,tcsr-mutex";
|
||||
syscon = <&tcsr_mutex_block 0 0x1000>;
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
ipcc_mproc: qcom,ipcc@406000 {
|
||||
compatible = "qcom,ipcc";
|
||||
reg = <0x406000 0x1000>;
|
||||
@@ -542,15 +573,43 @@
|
||||
};
|
||||
|
||||
evacc: clock-controller@abf0000 {
|
||||
compatible = "qcom,dummycc";
|
||||
clock-output-names = "evacc_clocks";
|
||||
compatible = "qcom,tuna-evacc", "syscon";
|
||||
reg = <0xabf0000 0x10000>;
|
||||
reg-name = "cc_base";
|
||||
vdd_mm-supply = <&VDD_MM_LEVEL>;
|
||||
vdd_mxc-supply = <&VDD_MXC_LEVEL>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&rpmhcc RPMH_CXO_CLK_A>,
|
||||
<&sleep_clk>,
|
||||
<&gcc GCC_EVA_AHB_CLK>;
|
||||
clock-names = "bi_tcxo",
|
||||
"bi_tcxo_ao",
|
||||
"sleep_clk",
|
||||
"iface";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
gcc: clock-controller@100000 {
|
||||
compatible = "qcom,dummycc";
|
||||
clock-output-names = "gcc_clocks";
|
||||
compatible = "qcom,tuna-gcc", "syscon";
|
||||
reg = <0x100000 0x1f4200>;
|
||||
reg-name = "cc_base";
|
||||
vdd_cx-supply = <&VDD_CX_LEVEL>;
|
||||
vdd_mx-supply = <&VDD_MX_LEVEL>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&pcie_0_pipe_clk>,
|
||||
<&sleep_clk>,
|
||||
<&ufs_phy_rx_symbol_0_clk>,
|
||||
<&ufs_phy_rx_symbol_1_clk>,
|
||||
<&ufs_phy_tx_symbol_0_clk>,
|
||||
<&usb3_phy_wrapper_gcc_usb30_pipe_clk>;
|
||||
clock-names = "bi_tcxo",
|
||||
"pcie_0_pipe_clk",
|
||||
"sleep_clk",
|
||||
"ufs_phy_rx_symbol_0_clk",
|
||||
"ufs_phy_rx_symbol_1_clk",
|
||||
"ufs_phy_tx_symbol_0_clk",
|
||||
"usb3_phy_wrapper_gcc_usb30_pipe_clk";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
@@ -562,16 +621,28 @@
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
tcsrcc: clock-controller@f100000 {
|
||||
compatible = "qcom,dummycc";
|
||||
clock-output-names = "tcsrcc_clocks";
|
||||
tcsrcc: clock-controller@1fbf000 {
|
||||
compatible = "qcom,tuna-tcsrcc", "syscon";
|
||||
reg = <0x1fbf000 0x14>;
|
||||
reg-name = "cc_base";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
videocc: clock-controller@aaf0000 {
|
||||
compatible = "qcom,dummycc";
|
||||
clock-output-names = "videocc_clocks";
|
||||
compatible = "qcom,tuna-videocc", "syscon";
|
||||
reg = <0xaaf0000 0x10000>;
|
||||
reg-name = "cc_base";
|
||||
vdd_mm-supply = <&VDD_MM_LEVEL>;
|
||||
vdd_mxc-supply = <&VDD_MXC_LEVEL>;
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>,
|
||||
<&rpmhcc RPMH_CXO_CLK_A>,
|
||||
<&sleep_clk>,
|
||||
<&gcc GCC_VIDEO_AHB_CLK>;
|
||||
clock-names = "bi_tcxo",
|
||||
"bi_tcxo_ao",
|
||||
"sleep_clk",
|
||||
"iface";
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
@@ -621,42 +692,51 @@
|
||||
};
|
||||
|
||||
&eva_cc_mvs0_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
clocks = <&gcc GCC_EVA_AHB_CLK>;
|
||||
clock-names = "ahb_clk";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&eva_cc_mvs0c_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
clocks = <&gcc GCC_EVA_AHB_CLK>;
|
||||
clock-names = "ahb_clk";
|
||||
parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&gcc_pcie_0_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
compatible = "qcom,gdsc";
|
||||
parent-supply = <&VDD_CX_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&gcc_pcie_0_phy_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
compatible = "qcom,gdsc";
|
||||
parent-supply = <&VDD_MX_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&gcc_ufs_mem_phy_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
compatible = "qcom,gdsc";
|
||||
parent-supply = <&VDD_MX_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&gcc_ufs_phy_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
compatible = "qcom,gdsc";
|
||||
parent-supply = <&VDD_CX_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&gcc_usb30_prim_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
compatible = "qcom,gdsc";
|
||||
parent-supply = <&VDD_CX_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&gcc_usb3_phy_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
compatible = "qcom,gdsc";
|
||||
parent-supply = <&VDD_MX_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
@@ -671,12 +751,15 @@
|
||||
};
|
||||
|
||||
&video_cc_mvs0_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
clocks = <&gcc GCC_VIDEO_AHB_CLK>;
|
||||
clock-names = "ahb_clk";
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&video_cc_mvs0c_gdsc {
|
||||
compatible = "regulator-fixed";
|
||||
clocks = <&gcc GCC_VIDEO_AHB_CLK>;
|
||||
clock-names = "ahb_clk";
|
||||
parent-supply = <&VDD_MM_MXC_VOTER_LEVEL>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
@@ -695,3 +778,8 @@
|
||||
#include "tuna-pinctrl.dtsi"
|
||||
#include "tuna-stub-regulators.dtsi"
|
||||
#include "tuna-usb.dtsi"
|
||||
#include "tuna-qupv3.dtsi"
|
||||
|
||||
&qupv3_se7_2uart {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user