Merge "dt-bindings: mfd: add qcom-i2c-pmic bindings"
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bindings/mfd/qcom,i2c-pmic.yaml
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bindings/mfd/qcom,i2c-pmic.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mfd/qcom,i2c-pmic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. I2C PMIC Controller Multi-Function Device
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maintainers:
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- David Collins <quic_collinsd@quicinc.com>
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description: |
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I2C PMIC controller multi-function devices communicate over an I2C bus. An I2C
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PMIC controller node typically contains one or more child nodes corresponding
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to the device's peripherals.
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The controller also handles interrupts for all of the peripherals on the bus.
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The controller takes a summary interrupt, deciphers which peripheral triggered
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the interrupt, and determines which of the peripheral's interrupts were
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triggered. It then notifies peripheral subdevices about the interrupts.
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properties:
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compatible:
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const: qcom,i2c-pmic
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reg:
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description: 7-bit I2C address of the device
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maxItems: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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interrupts:
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maxItems: 1
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description: Summary interrupt specifier
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interrupt-controller: true
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'#interrupt-cells':
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const: 3
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qcom,periph-map:
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description: |
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List of peripheral addresses specifying the mapping of peripherals to
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summary status register bits. The mapping is ordered from the least
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significant status bit to the most significant.
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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minimum: 0x0
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maximum: 0xff
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required:
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- compatible
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- reg
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additionalProperties: true
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examples:
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- |
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i2c_bus {
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#address-cells = <1>;
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#size-cells = <0>;
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pmic@8 {
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compatible = "qcom,i2c-pmic";
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reg = <0x8>;
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interrupt-parent = <&tlmm_pinmux>;
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interrupts = <83 0>;
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interrupt-controller;
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#interrupt-cells = <3>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&smb_stat_active>;
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qcom,periph-map = <0x10 0x11 0x12 0x13 0x14 0x16 0x36>;
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};
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};
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