Merge 41d98cfe5d
on remote branch
Change-Id: Ibdecae9bc8447539006af0e373f021194ab0efa9
This commit is contained in:
@@ -59,6 +59,7 @@
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};
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&swr0 {
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qcom,swr-num-dev = <2>;
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wsa884x_0220: wsa884x@02170220 {
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status = "okay";
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};
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@@ -68,6 +69,10 @@
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};
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};
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&swr1 {
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qcom,swr-num-dev = <2>;
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};
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&kera_snd {
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qcom,model = "kera-cdp-snd-card";
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swr-haptics-unsupported;
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@@ -79,7 +84,6 @@
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"AMIC3", "Analog Mic3",
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"AMIC3", "MIC BIAS3",
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"AMIC4", "Analog Mic4",
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"AMIC4", "MIC BIAS4",
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"VA AMIC1", "Analog Mic1",
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"VA AMIC1", "VA MIC BIAS1",
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"VA AMIC2", "Analog Mic2",
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@@ -87,7 +91,6 @@
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"VA AMIC3", "Analog Mic3",
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"VA AMIC3", "VA MIC BIAS3",
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"VA AMIC4", "Analog Mic4",
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"VA AMIC4", "VA MIC BIAS4",
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"TX DMIC0", "Digital Mic0",
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"TX DMIC0", "MIC BIAS3",
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"TX DMIC1", "Digital Mic1",
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@@ -25,7 +25,7 @@
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};
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&swr2 {
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reg = <0x7630000 0x0>;
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swrm-io-base = <0x7630000 0x0>;
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};
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&va_macro {
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@@ -30,6 +30,10 @@
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};
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};
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&cdc_pri_mi2s_gpios {
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status = "okay";
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};
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&swr1 {
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qcom,swr-num-dev = <2>;
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};
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@@ -417,7 +417,7 @@
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qcom,model = "kera-qrd-snd-card";
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qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>;
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qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>;
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qcom,wcn-bt = <0>;
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qcom,wcn-bt = <1>;
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qcom,ext-disp-audio-rx = <0>;
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qcom,tdm-max-slots = <8>;
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qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>;
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@@ -479,6 +479,8 @@
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qcom,msm-mbhc-hphl-swh = <0>;
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qcom,msm-mbhc-gnd-swh = <0>;
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qcom,wsa-max-devs = <1>;
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qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
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qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;
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qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>,
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<&lpass_cdc>, <&lpass_bt_swr>;
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@@ -489,9 +491,9 @@
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active
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&i2s0_sd0_active &i2s0_sd1_active>;
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&i2s0_sd0_active>;
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pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep
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&i2s0_sd0_sleep &i2s0_sd1_sleep>;
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&i2s0_sd0_sleep>;
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#gpio-cells = <0>;
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};
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@@ -83,4 +83,5 @@
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asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
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"wcd9378_codec", "wsa-codec1";
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qcom,wsa-max-devs = <1>;
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fsa4480-i2c-handle = <&fsa4480>;
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};
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@@ -35,7 +35,19 @@
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reg = <0x7660000 0x0>;
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clock-names = "lpass_audio_hw_vote";
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clocks = <&lpass_audio_hw_vote 0>;
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qcom,va-dmic-sample-rate = <600000>;
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/*
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* Clk divding factors for each DMIC pair.
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* Valid entries for each DMIC pair:
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* 2, 3, 4, 6, 8, 16
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*
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* These factors are translated to corresponding config values
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* for the following registers,
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* -- LPASS_VA_TOP_CSR_DMIC0_CTL,
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* -- LPASS_VA_TOP_CSR_DMIC1_CTL,
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* -- LPASS_VA_TOP_CSR_DMIC2_CTL,
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* -- LPASS_VA_TOP_CSR_DMIC3_CTL,
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*/
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qcom,va-dmic-clk-div-factor = <16 16 16 16>;
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qcom,va-clk-mux-select = <1>;
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qcom,default-clk-id = <TX_CORE_CLK>;
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qcom,use-clk-id = <VA_CORE_CLK>;
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@@ -81,7 +93,19 @@
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compatible = "qcom,lpass-cdc-tx-macro";
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reg = <0x6AE0000 0x0>;
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qcom,default-clk-id = <TX_CORE_CLK>;
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qcom,tx-dmic-sample-rate = <2400000>;
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/*
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* Clk divding factors for each DMIC pair.
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* Valid entries for each DMIC pair:
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* 2, 3, 4, 6, 8, 16
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*
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* These factors are translated to corresponding config values
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* for the following registers,
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* -- LPASS_VA_TOP_CSR_DMIC0_CTL,
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* -- LPASS_VA_TOP_CSR_DMIC1_CTL,
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* -- LPASS_VA_TOP_CSR_DMIC2_CTL,
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* -- LPASS_VA_TOP_CSR_DMIC3_CTL,
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*/
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qcom,tx-dmic-clk-div-factor = <4 4 4 4>;
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qcom,is-used-swr-gpio = <0>;
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};
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@@ -30,6 +30,7 @@
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compatible = "qcom,gpr";
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qcom,glink-channels = "adsp_apps";
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qcom,intents = <0x200 20>;
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qcom,ch-sched-rt;
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reg = <GPR_DOMAIN_ADSP>;
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spf_core {
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