diff --git a/kera-audio-cdp.dtsi b/kera-audio-cdp.dtsi
index cfbe8973..ccd3b198 100644
--- a/kera-audio-cdp.dtsi
+++ b/kera-audio-cdp.dtsi
@@ -59,6 +59,7 @@
 };
 
 &swr0 {
+	qcom,swr-num-dev = <2>;
 	wsa884x_0220: wsa884x@02170220 {
 		status = "okay";
 	};
@@ -68,6 +69,10 @@
 	};
 };
 
+&swr1 {
+	qcom,swr-num-dev = <2>;
+};
+
 &kera_snd {
 	qcom,model = "kera-cdp-snd-card";
 	swr-haptics-unsupported;
@@ -79,7 +84,6 @@
 		"AMIC3", "Analog Mic3",
 		"AMIC3", "MIC BIAS3",
 		"AMIC4", "Analog Mic4",
-		"AMIC4", "MIC BIAS4",
 		"VA AMIC1", "Analog Mic1",
 		"VA AMIC1", "VA MIC BIAS1",
 		"VA AMIC2", "Analog Mic2",
@@ -87,7 +91,6 @@
 		"VA AMIC3", "Analog Mic3",
 		"VA AMIC3", "VA MIC BIAS3",
 		"VA AMIC4", "Analog Mic4",
-		"VA AMIC4", "VA MIC BIAS4",
 		"TX DMIC0", "Digital Mic0",
 		"TX DMIC0", "MIC BIAS3",
 		"TX DMIC1", "Digital Mic1",
diff --git a/kera-audio-lpass-reg.dtsi b/kera-audio-lpass-reg.dtsi
index c8e29bd3..03380ee4 100644
--- a/kera-audio-lpass-reg.dtsi
+++ b/kera-audio-lpass-reg.dtsi
@@ -25,7 +25,7 @@
 };
 
 &swr2 {
-	reg = <0x7630000 0x0>;
+	swrm-io-base = <0x7630000 0x0>;
 };
 
 &va_macro {
diff --git a/kera-audio-mtp.dtsi b/kera-audio-mtp.dtsi
index 16da7bbb..517e349e 100644
--- a/kera-audio-mtp.dtsi
+++ b/kera-audio-mtp.dtsi
@@ -30,6 +30,10 @@
 	};
 };
 
+&cdc_pri_mi2s_gpios {
+	status = "okay";
+};
+
 &swr1 {
 	qcom,swr-num-dev = <2>;
 };
diff --git a/kera-audio-overlay.dtsi b/kera-audio-overlay.dtsi
index 0c8b8f90..85df504e 100644
--- a/kera-audio-overlay.dtsi
+++ b/kera-audio-overlay.dtsi
@@ -417,7 +417,7 @@
 		qcom,model = "kera-qrd-snd-card";
 		qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>, <1>;
 		qcom,mi2s-tdm-is-hw-vote-needed = <1>, <1>, <1>, <1>, <1>, <1>, <1>;
-		qcom,wcn-bt = <0>;
+		qcom,wcn-bt = <1>;
 		qcom,ext-disp-audio-rx = <0>;
 		qcom,tdm-max-slots = <8>;
 		qcom,tdm-clk-attribute = <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>, <0x1>;
@@ -479,6 +479,8 @@
 		qcom,msm-mbhc-hphl-swh = <0>;
 		qcom,msm-mbhc-gnd-swh = <0>;
 		qcom,wsa-max-devs = <1>;
+		qcom,cdc-dmic01-gpios = <&cdc_dmic01_gpios>;
+		qcom,cdc-dmic23-gpios = <&cdc_dmic23_gpios>;
 		qcom,msm_audio_ssr_devs = <&audio_gpr>, <&lpi_tlmm>,
 				  <&lpass_cdc>, <&lpass_bt_swr>;
 
@@ -489,9 +491,9 @@
 		compatible = "qcom,msm-cdc-pinctrl";
 		pinctrl-names = "aud_active", "aud_sleep";
 		pinctrl-0 = <&i2s0_sck_active &i2s0_ws_active
-				&i2s0_sd0_active &i2s0_sd1_active>;
+				&i2s0_sd0_active>;
 		pinctrl-1 = <&i2s0_sck_sleep &i2s0_ws_sleep
-				&i2s0_sd0_sleep &i2s0_sd1_sleep>;
+				&i2s0_sd0_sleep>;
 		#gpio-cells = <0>;
 	};
 
diff --git a/kera-audio-qrd.dtsi b/kera-audio-qrd.dtsi
index c5b51dd4..4efa6288 100644
--- a/kera-audio-qrd.dtsi
+++ b/kera-audio-qrd.dtsi
@@ -83,4 +83,5 @@
 	asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
 			"wcd9378_codec", "wsa-codec1";
 	qcom,wsa-max-devs = <1>;
+	fsa4480-i2c-handle = <&fsa4480>;
 };
diff --git a/sun-audio-overlay.dtsi b/sun-audio-overlay.dtsi
index dc9c7340..ed513359 100644
--- a/sun-audio-overlay.dtsi
+++ b/sun-audio-overlay.dtsi
@@ -35,7 +35,19 @@
 		reg = <0x7660000 0x0>;
 		clock-names = "lpass_audio_hw_vote";
 		clocks = <&lpass_audio_hw_vote 0>;
-		qcom,va-dmic-sample-rate = <600000>;
+		/*
+		 * Clk divding factors for each DMIC pair.
+		 * Valid entries for each DMIC pair:
+		 *	2, 3, 4, 6, 8, 16
+		 *
+		 * These factors are translated to corresponding config values
+		 *  for the following registers,
+		 *   -- LPASS_VA_TOP_CSR_DMIC0_CTL,
+		 *   -- LPASS_VA_TOP_CSR_DMIC1_CTL,
+		 *   -- LPASS_VA_TOP_CSR_DMIC2_CTL,
+		 *   -- LPASS_VA_TOP_CSR_DMIC3_CTL,
+		 */
+		qcom,va-dmic-clk-div-factor = <16 16 16 16>;
 		qcom,va-clk-mux-select = <1>;
 		qcom,default-clk-id = <TX_CORE_CLK>;
 		qcom,use-clk-id = <VA_CORE_CLK>;
@@ -81,7 +93,19 @@
 		compatible = "qcom,lpass-cdc-tx-macro";
 		reg = <0x6AE0000 0x0>;
 		qcom,default-clk-id = <TX_CORE_CLK>;
-		qcom,tx-dmic-sample-rate = <2400000>;
+		/*
+		 * Clk divding factors for each DMIC pair.
+		 * Valid entries for each DMIC pair:
+		 *	2, 3, 4, 6, 8, 16
+		 *
+		 * These factors are translated to corresponding config values
+		 *  for the following registers,
+		 *   -- LPASS_VA_TOP_CSR_DMIC0_CTL,
+		 *   -- LPASS_VA_TOP_CSR_DMIC1_CTL,
+		 *   -- LPASS_VA_TOP_CSR_DMIC2_CTL,
+		 *   -- LPASS_VA_TOP_CSR_DMIC3_CTL,
+		 */
+		qcom,tx-dmic-clk-div-factor = <4 4 4 4>;
 		qcom,is-used-swr-gpio = <0>;
 	};
 
diff --git a/tuna-audio.dtsi b/tuna-audio.dtsi
index ef3a9546..c0366597 100644
--- a/tuna-audio.dtsi
+++ b/tuna-audio.dtsi
@@ -30,6 +30,7 @@
 		compatible = "qcom,gpr";
 		qcom,glink-channels = "adsp_apps";
 		qcom,intents = <0x200 20>;
+		qcom,ch-sched-rt;
 		reg = <GPR_DOMAIN_ADSP>;
 
 		spf_core {