Merge "ARM: dts: msm: Fake UFS Ref clock to run on HS mode" into kernel.lnx.6.6.r1-rel
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ab4f93cdf3
@@ -57,5 +57,39 @@
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qcom,vccq2-parent-supply = <&S1B>;
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qcom,vccq2-parent-max-microamp = <210000>;
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clock-names =
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"core_clk",
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"bus_aggr_clk",
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"iface_clk",
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"core_clk_unipro",
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"core_clk_ice",
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"ref_clk",
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"tx_lane0_sync_clk",
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"rx_lane0_sync_clk",
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"rx_lane1_sync_clk",
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"dev_ref_clk";
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clocks =
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<&gcc GCC_UFS_PHY_AXI_CLK>,
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<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
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<&gcc GCC_UFS_PHY_AHB_CLK>,
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<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
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<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
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<&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
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<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
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<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
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<&rpmhcc RPMH_LN_BB_CLK3>;
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freq-table-hz =
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<100000000 403000000>,
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<0 0>,
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<0 0>,
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<100000000 403000000>,
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<100000000 403000000>,
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<0 0>,
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<0 0>,
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<0 0>,
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<0 0>,
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<0 0>;
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status = "ok";
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};
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