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Merge commit '9f996a9f8e9c6ca6081ab03b7f9d6a5e3ab11537' into gfx-devicetree-oss.lnx.1.0.r1-rel

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Change-Id: If47c5cf1c599c4d88f9a188829e1b70e6b481889
Signed-off-by: Rohit Jadhav <quic_rbjadhav@quicinc.com>
This commit is contained in:
Rohit Jadhav
2025-03-09 07:31:05 +05:30
parent 50079aa858 9f996a9f8e
commit 68698774fe
2 changed files with 62 additions and 86 deletions
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7
gpu/kera-gpu.dtsi
View File

@@ -15,8 +15,11 @@
reg-names = "kgsl_3d0_reg_memory", "rscc", "cx_dbgc",
"cx_misc", "qdss_etr", "qdss_gfx", "qdss_tmc";
interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "kgsl_3d0_irq";
interrupts = <0 300 IRQ_TYPE_LEVEL_HIGH>, <0 286 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "kgsl_3d0_irq", "freq_limiter_irq";
resets = <&gpucc GPU_CC_FREQUENCY_LIMITER_IRQ_CLEAR>;
reset-names = "freq_limiter_irq_clear";
clocks = <&gcc GCC_GPU_GEMNOC_GFX_CLK>, <&gpucc GPU_CC_AHB_CLK>,
<&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, <&aoss_qmp>;

141
gpu/tuna-gpu-pwrlevels.dtsi
View File

@@ -4,17 +4,16 @@
*/
/* ACD Control register values */
#define ACD_LEVEL_TURBO_L3 0xa8285ffd
#define ACD_LEVEL_TURBO_L2 0x88295ffd
#define ACD_LEVEL_TURBO_L1 0x882a5ffd
#define ACD_LEVEL_TURBO 0x882a5ffd
#define ACD_LEVEL_NOM_L1 0xa82a5ffd
#define ACD_LEVEL_NOM 0x882b5ffd
#define ACD_LEVEL_SVS_L2 0x882b5ffd
#define ACD_LEVEL_SVS_L1 0xa82b5ffd
#define ACD_LEVEL_SVS 0xc02c5ffd
#define ACD_LEVEL_LOW_SVS 0xc8295ffd
#define ACD_LEVEL_LOW_SVS_D1 0xc8295ffd
#define ACD_LEVEL_TURBO_L2 0xa02f5ffd
#define ACD_LEVEL_TURBO_L1 0xa8285ffd
#define ACD_LEVEL_TURBO 0x88295ffd
#define ACD_LEVEL_NOM_L1 0xa8295ffd
#define ACD_LEVEL_NOM 0x882a5ffd
#define ACD_LEVEL_SVS_L2 0x882a5ffd
#define ACD_LEVEL_SVS_L1 0xa82a5ffd
#define ACD_LEVEL_SVS 0xa82c5ffd
#define ACD_LEVEL_LOW_SVS 0xc02c5ffd
#define ACD_LEVEL_LOW_SVS_D1 0xc02c5ffd
&msm_gpu {
/* Power levels */
@@ -32,26 +31,13 @@
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <10>;
qcom,initial-pwrlevel = <9>;
qcom,speed-bin = <0>;
/* Turbo_L3 */
/* Turbo_L2 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <1150000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L3>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L3>;
};
/* Turbo_L2 */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <1100000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
qcom,bus-freq = <11>;
@@ -62,8 +48,8 @@
};
/* Turbo_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <1050000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
@@ -75,34 +61,34 @@
};
/* Turbo */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <937000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
qcom,bus-freq = <10>;
qcom,bus-min = <9>;
qcom,bus-max = <11>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_TURBO>;
};
/* Nom_L1 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <873000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq = <10>;
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <11>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM_L1>;
};
/* Nom */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <763000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
@@ -114,8 +100,8 @@
};
/* SVS_L2 */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <688000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
@@ -127,8 +113,8 @@
};
/* SVS_L1 */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <644000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
@@ -140,8 +126,8 @@
};
/* SVS */
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <510000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
@@ -153,8 +139,8 @@
};
/* Low_SVS */
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-freq = <362000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
@@ -166,8 +152,8 @@
};
/* Low_SVS_D1 */
qcom,gpu-pwrlevel@10 {
reg = <10>;
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-freq = <264000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
@@ -307,26 +293,13 @@
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <10>;
qcom,initial-pwrlevel = <9>;
qcom,speed-bin = <0xf2>;
/* Turbo_L3 */
/* Turbo_L2 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <1150000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L3>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L3>;
};
/* Turbo_L2 */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <1100000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L2>;
qcom,bus-freq = <11>;
@@ -337,8 +310,8 @@
};
/* Turbo_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <1050000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
@@ -350,34 +323,34 @@
};
/* Turbo */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <937000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
qcom,bus-freq = <10>;
qcom,bus-min = <9>;
qcom,bus-max = <11>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_TURBO>;
};
/* Nom_L1 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <873000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq = <10>;
qcom,bus-freq = <9>;
qcom,bus-min = <7>;
qcom,bus-max = <11>;
qcom,bus-max = <9>;
qcom,acd-level = <ACD_LEVEL_NOM_L1>;
};
/* Nom */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <763000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
@@ -389,8 +362,8 @@
};
/* SVS_L2 */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <688000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
@@ -402,8 +375,8 @@
};
/* SVS_L1 */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <644000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
@@ -415,12 +388,12 @@
};
/* SVS */
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <510000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq = <6>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
@@ -428,8 +401,8 @@
};
/* Low_SVS */
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-freq = <362000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
@@ -441,8 +414,8 @@
};
/* Low_SVS_D1 */
qcom,gpu-pwrlevel@10 {
reg = <10>;
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-freq = <264000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;