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ARM: dts: msm: Mark gpucc clock node as GenPD provider

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Mark gpucc clock node as GenPD provider and disable the
graphics GDSC regulator nodes. While at it, update gxclkctl
node to add support for gx_clkctl_gx_gdsc power domain.

Change-Id: I0d4c84da2e3aadd7e1a901d6a9e26c7d4ad1a3c1
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
This commit is contained in:
Jagadeesh Kona
2024-02-01 18:22:00 +05:30
parent 77cc16e01b
commit 49f746bf1e
1 changed files with 10 additions and 5 deletions
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15
qcom/sun.dtsi
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@@ -1797,14 +1797,17 @@
"gpll0_out_main",
"gpll0_out_main_div";
#clock-cells = <1>;
#power-domain-cells = <1>;
#reset-cells = <1>;
};
gxclkctl: clock-controller@3d64000 {
compatible = "qcom,dummycc";
clock-output-names = "gxclkctl_clocks";
#clock-cells = <1>;
#reset-cells = <1>;
gxclkctl: clock-controller@3d68024 {
compatible = "qcom,sun-gx_clkctl";
reg = <0x3d68024 0x8>;
reg-name = "cc_base";
power-domains = <&gpucc GPU_CC_CX_GDSC>;
vdd_gx-supply = <&VDD_GFX_GFX_MXC_VOTER_LEVEL>;
#power-domain-cells = <1>;
};
tcsrcc: clock-controller@f204008 {
@@ -2083,6 +2086,7 @@
qcom,proxy-consumer-enable;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
/* GX_CLKCTL GDSCs */
@@ -2095,6 +2099,7 @@
reg-supply = <&gpu_cc_cx_gdsc>;
qcom,retain-regs;
qcom,support-cfg-gdscr;
status = "disabled";
};
/* VIDEO_CC GDSCs */