Revert "ARM: dts: msm: Fake UFS Ref clock to run on HS mode"

This reverts commit d5c176fe3b.

Change-Id: I50cc341052b54a6d9381d0c6501f78413dd31dc4
Signed-off-by: Vishvanath Singh <quic_vishvana@quicinc.com>
This commit is contained in:
Vishvanath Singh
2025-01-20 15:11:05 +05:30
parent 682957b7e4
commit 49f20e9cf6

View File

@@ -57,39 +57,5 @@
qcom,vccq2-parent-supply = <&S1B>; qcom,vccq2-parent-supply = <&S1B>;
qcom,vccq2-parent-max-microamp = <210000>; qcom,vccq2-parent-max-microamp = <210000>;
clock-names =
"core_clk",
"bus_aggr_clk",
"iface_clk",
"core_clk_unipro",
"core_clk_ice",
"ref_clk",
"tx_lane0_sync_clk",
"rx_lane0_sync_clk",
"rx_lane1_sync_clk",
"dev_ref_clk";
clocks =
<&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
<&rpmhcc RPMH_LN_BB_CLK3>;
freq-table-hz =
<100000000 403000000>,
<0 0>,
<0 0>,
<100000000 403000000>,
<100000000 403000000>,
<0 0>,
<0 0>,
<0 0>,
<0 0>,
<0 0>;
status = "ok"; status = "ok";
}; };