ARM: dts: msm: Add a node for cpufreq cycle counter driver

Add cpufreq cycle counter register information to devicetree in a
separate node for use by associated driver.

Change-Id: If1b45003a1ce4faca372db2954293493bc45bbb6
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>

qcom/pineapple-walt.dtsi

@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+&soc {
+	walt {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		qcom,cycle-cntr {
+			compatible = "qcom,epss";
+			reg = <0x17D91000 0x1000>,
+				<0x17D92000 0x1000>,
+				<0x17D93000 0x1000>,
+				<0x17D94000 0x1000>;
+			reg-names = "freq-domain0",
+				"freq-domain1",
+				"freq-domain2",
+				"freq-domain3";
+		};
+	};
+};

qcom/pineapple.dtsi

@@ -3432,6 +3432,7 @@
 #include "pineapple-pcie.dtsi"
 #include "msm-rdbg.dtsi"
 #include "pineapple-thermal.dtsi"
+#include "pineapple-walt.dtsi"
 
 &qupv3_se15_2uart {
 	status = "ok";