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Merge "ARM: dts: msm: Add correct pin functionality for ravelin pinctrl dtsi"

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QCTECMDR Service
2024-11-13 05:31:12 -08:00
committed by Gerrit - the friendly Code Review server
parent a7de213fd9 4a4b8f110d
commit 2133585590
1 changed files with 4 additions and 4 deletions
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8
qcom/ravelin-pinctrl.dtsi
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@@ -468,7 +468,7 @@
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active { qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
mux { mux {
pins = "gpio8"; pins = "gpio8";
function = "qup0_se4_l0_mira"; function = "qup0_se4_l0";
}; };
config { config {
@@ -481,7 +481,7 @@
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active { qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
mux { mux {
pins = "gpio9"; pins = "gpio9";
function = "qup0_se4_l1_mira"; function = "qup0_se4_l1";
}; };
config { config {
@@ -509,7 +509,7 @@
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active { qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
mux { mux {
pins = "gpio8"; pins = "gpio8";
function = "qup0_se4_l0_mira"; function = "qup0_se4_l0";
}; };
config { config {
@@ -522,7 +522,7 @@
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active { qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
mux { mux {
pins = "gpio9"; pins = "gpio9";
function = "qup0_se4_l1_mira"; function = "qup0_se4_l1";
}; };
config { config {