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ARM: dts: msm: Add correct pin functionality for ravelin pinctrl dtsi

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Adding correct pin functionality as per pinctrl table.

Change-Id: I153d9f7114ce188eaec472be4b3acb3cdf3968d4
Signed-off-by: Somesh Dey <quic_somedey@quicinc.com>
This commit is contained in:
Somesh Dey
2024-11-07 12:03:19 +05:30
parent 6047c61f82
commit 4a4b8f110d
1 changed files with 4 additions and 4 deletions
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8
qcom/ravelin-pinctrl.dtsi
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@@ -468,7 +468,7 @@
qupv3_se4_i2c_sda_active: qupv3_se4_i2c_sda_active {
mux {
pins = "gpio8";
function = "qup0_se4_l0_mira";
function = "qup0_se4_l0";
};
config {
@@ -481,7 +481,7 @@
qupv3_se4_i2c_scl_active: qupv3_se4_i2c_scl_active {
mux {
pins = "gpio9";
function = "qup0_se4_l1_mira";
function = "qup0_se4_l1";
};
config {
@@ -509,7 +509,7 @@
qupv3_se4_spi_miso_active: qupv3_se4_spi_miso_active {
mux {
pins = "gpio8";
function = "qup0_se4_l0_mira";
function = "qup0_se4_l0";
};
config {
@@ -522,7 +522,7 @@
qupv3_se4_spi_mosi_active: qupv3_se4_spi_mosi_active {
mux {
pins = "gpio9";
function = "qup0_se4_l1_mira";
function = "qup0_se4_l1";
};
config {