samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge 73d8eb7ad7 on remote branch

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Change-Id: Ib3b7d732289ed2e8a4db315b4b8753338d693160
This commit is contained in:
Linux Build Service Account
2024-07-23 03:51:28 -07:00
parent 1f069dabf7 73d8eb7ad7
commit 1b8fc1d6dc
6 changed files with 319 additions and 5 deletions
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7
Kbuild Normal file → Executable file
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@@ -22,6 +22,13 @@ ifeq ($(CONFIG_ARCH_MONACO), y)
dtbo-y += monaco/monaco-dsp.dtbo
endif
ifeq ($(CONFIG_ARCH_PARROT), y)
dtbo-y += parrot/parrot-dsp.dtbo
endif
ifeq ($(CONFIG_ARCH_RAVELIN), y)
dtbo-y += ravelin/ravelin-dsp.dtbo
endif
always-y := $(dtb-y) $(dtbo-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb *.dtbo

5
monaco/monaco-dsp.dtsi
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@@ -17,7 +17,6 @@
iommus = <&apps_smmu 0x01C3 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <1>; /* ROOT_PD */
};
@@ -28,7 +27,6 @@
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
qcom,nsessions = <5>;
dma-coherent;
pd-type = <3>; /* SENSORS_STATICPD */
};
@@ -38,7 +36,6 @@
iommus = <&apps_smmu 0x01C5 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <2>; /* AUDIO_STATICPD */
};
@@ -48,7 +45,6 @@
iommus = <&apps_smmu 0x01C6 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <7>; /* USERPD */
};
@@ -58,7 +54,6 @@
iommus = <&apps_smmu 0x01C7 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable";
dma-coherent;
pd-type = <7>; /* USERPD */
};
};

15
parrot/parrot-dsp.dts Normal file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "parrot-dsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. parrot v1 SoC";
compatible = "qcom,parrot";
qcom,msm-id = <537 0x10000>, <613 0x10000>, <663 0x10000>;
qcom,board-id = <0 0>;
};

234
parrot/parrot-dsp.dtsi Normal file
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@@ -0,0 +1,234 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&glink_edge {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "adsp";
memory-region = <&adsp_mem_heap>;
qcom,vmids = <22 37>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1803 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <1>;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1804 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <2>;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1805 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,nsessions = <5>;
pd-type = <3>;
};
};
};
&remoteproc_cdsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "cdsp";
qcom,fastrpc-gids = <2908>;
qcom,rpc-latency-us = <235>;
qcom,qos-cores = <0 1 2 3>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1401 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <1>;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1402 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1403 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1404 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1405 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1406 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
};
compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1407 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
};
compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x1408 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
};
compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
label = "cdsprpc-smd";
qcom,secure-context-bank;
iommus = <&apps_smmu 0x1409 0x0400>;
qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>;
dma-coherent;
pd-type = <6>;
};
compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <11>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x140B 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-best-fit;
qcom,iova-max-align-shift = <9>;
pd-type = <7>;
alloc-size-range = <0x0 0xFFFFFFFF>;
};
compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x140C 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <9>;
alloc-size-range = <0x0 0xFFFFFFFF>;
};
compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x140D 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <9>;
alloc-size-range = <0x0 0xFFFFFFFF>;
};
compute-cb@13 {
compatible = "qcom,fastrpc-compute-cb";
reg = <14>;
label = "cdsprpc-smd";
iommus = <&apps_smmu 0x140E 0x0400>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,iova-max-align-shift = <9>;
pd-type = <9>;
alloc-size-range = <0x0 0xFFFFFFFF>;
};
};
};

15
ravelin/ravelin-dsp.dts Executable file
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@@ -0,0 +1,15 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "ravelin-dsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. ravelin v1 SoC";
compatible = "qcom,ravelin";
qcom,msm-id = <568 0x10000>;
qcom,board-id = <0 0>;
};

48
ravelin/ravelin-dsp.dtsi Executable file
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@@ -0,0 +1,48 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
&glink_edge {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "adsp";
memory-region = <&adsp_mem_heap>;
qcom,vmids = <22 37>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1003 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <1>; /* ROOT_PD */
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1004 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qcom,nsessions = <4>;
pd-type = <3>; /* SENSORS_STATICPD */
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
label = "adsprpc-smd";
iommus = <&apps_smmu 0x1005 0x0>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <2>; /* AUDIO_STATICPD */
};
};
};