From 8a8c40f33a1fa0d25ee6dd0d282213c9ca178ea6 Mon Sep 17 00:00:00 2001 From: Abhinav Parihar Date: Tue, 9 Jul 2024 14:24:33 +0530 Subject: [PATCH 1/4] arm64: dts: qcom: monaco: Remove coherent property for monaco Remove coherent proeprty for fastrpc smmu context banks in monaco target. Monaco target doesn't support IO coherency hence coherent property is not applicable for monaco. Change-Id: I9d1f46825b264c48dc519cf6be3cb1edb6241d70 Signed-off-by: Abhinav Parihar --- monaco/monaco-dsp.dtsi | 5 ----- 1 file changed, 5 deletions(-) diff --git a/monaco/monaco-dsp.dtsi b/monaco/monaco-dsp.dtsi index 7bef63cf..a6589ed8 100644 --- a/monaco/monaco-dsp.dtsi +++ b/monaco/monaco-dsp.dtsi @@ -17,7 +17,6 @@ iommus = <&apps_smmu 0x01C3 0x0>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-faults = "stall-disable"; - dma-coherent; pd-type = <1>; /* ROOT_PD */ }; @@ -28,7 +27,6 @@ qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-faults = "stall-disable"; qcom,nsessions = <5>; - dma-coherent; pd-type = <3>; /* SENSORS_STATICPD */ }; @@ -38,7 +36,6 @@ iommus = <&apps_smmu 0x01C5 0x0>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-faults = "stall-disable"; - dma-coherent; pd-type = <2>; /* AUDIO_STATICPD */ }; @@ -48,7 +45,6 @@ iommus = <&apps_smmu 0x01C6 0x0>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-faults = "stall-disable"; - dma-coherent; pd-type = <7>; /* USERPD */ }; @@ -58,7 +54,6 @@ iommus = <&apps_smmu 0x01C7 0x0>; qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; qcom,iommu-faults = "stall-disable"; - dma-coherent; pd-type = <7>; /* USERPD */ }; }; From fa64779d37f9c812b62520dc1b1df4051bc6aa26 Mon Sep 17 00:00:00 2001 From: Akhil Manikoth Kallankandy Date: Fri, 3 May 2024 16:01:45 +0530 Subject: [PATCH 2/4] ARM: dts: msm: Add parrot dts and dtsi files Add context banks support for parrot Change-Id: Iec07cdee087f72762d278ac4c9015497c22ec007 --- Kbuild | 3 + parrot/parrot-dsp.dts | 14 +++ parrot/parrot-dsp.dtsi | 234 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 251 insertions(+) create mode 100644 parrot/parrot-dsp.dts create mode 100644 parrot/parrot-dsp.dtsi diff --git a/Kbuild b/Kbuild index 58612c39..7a752447 100644 --- a/Kbuild +++ b/Kbuild @@ -22,6 +22,9 @@ ifeq ($(CONFIG_ARCH_MONACO), y) dtbo-y += monaco/monaco-dsp.dtbo endif +ifeq ($(CONFIG_ARCH_PARROT), y) +dtbo-y += parrot/parrot-dsp.dtbo +endif always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/parrot/parrot-dsp.dts b/parrot/parrot-dsp.dts new file mode 100644 index 00000000..8aeb6e31 --- /dev/null +++ b/parrot/parrot-dsp.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include "parrot-dsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. parrot v1 SoC"; + compatible = "qcom,parrot"; + qcom,board-id = <0 0>; +}; diff --git a/parrot/parrot-dsp.dtsi b/parrot/parrot-dsp.dtsi new file mode 100644 index 00000000..a7eac1aa --- /dev/null +++ b/parrot/parrot-dsp.dtsi @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +&glink_edge { + qcom,fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + label = "adsp"; + memory-region = <&adsp_mem_heap>; + qcom,vmids = <22 37>; + + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1803 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <1>; + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1804 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <2>; + }; + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1805 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + qcom,nsessions = <5>; + pd-type = <3>; + }; + }; +}; + +&remoteproc_cdsp_glink { + qcom,fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + label = "cdsp"; + qcom,fastrpc-gids = <2908>; + qcom,rpc-latency-us = <235>; + + qcom,qos-cores = <0 1 2 3>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1401 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + pd-type = <1>; + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1402 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1403 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + }; + + compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1404 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + }; + + compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1405 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + }; + + compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1406 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + }; + + compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1407 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + }; + + compute-cb@8 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x1408 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + }; + + compute-cb@9 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <9>; + label = "cdsprpc-smd"; + qcom,secure-context-bank; + iommus = <&apps_smmu 0x1409 0x0400>; + qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + qcom,iommu-vmid = <0xA>; + dma-coherent; + + pd-type = <6>; + }; + + compute-cb@10 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x140B 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + qcom,iova-best-fit; + qcom,iova-max-align-shift = <9>; + pd-type = <7>; + alloc-size-range = <0x0 0xFFFFFFFF>; + }; + + compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <12>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x140C 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <9>; + alloc-size-range = <0x0 0xFFFFFFFF>; + }; + + compute-cb@12 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <13>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x140D 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <9>; + alloc-size-range = <0x0 0xFFFFFFFF>; + }; + + compute-cb@13 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <14>; + label = "cdsprpc-smd"; + iommus = <&apps_smmu 0x140E 0x0400>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + + qcom,iova-max-align-shift = <9>; + pd-type = <9>; + alloc-size-range = <0x0 0xFFFFFFFF>; + }; + }; +}; From 17ebcbb45d460640c09a22ffa85794f7fedd3e3e Mon Sep 17 00:00:00 2001 From: Akhil Manikoth Kallankandy Date: Fri, 3 May 2024 16:07:57 +0530 Subject: [PATCH 3/4] ARM: dts: msm: Add parrot soc id's Add parrot soc id's Change-Id: I33f2f6e8402cf4f1dd3dd102579be58bc5446f40 --- parrot/parrot-dsp.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/parrot/parrot-dsp.dts b/parrot/parrot-dsp.dts index 8aeb6e31..2f4b059d 100644 --- a/parrot/parrot-dsp.dts +++ b/parrot/parrot-dsp.dts @@ -10,5 +10,6 @@ / { model = "Qualcomm Technologies, Inc. parrot v1 SoC"; compatible = "qcom,parrot"; + qcom,msm-id = <537 0x10000>, <613 0x10000>, <663 0x10000>; qcom,board-id = <0 0>; }; From af02293fd94dc99d550cd6de8e72b0714e4e0e58 Mon Sep 17 00:00:00 2001 From: Himanshu Agrawal Date: Wed, 10 Jul 2024 09:28:11 +0530 Subject: [PATCH 4/4] ARM: dts: msm: Add ravelin dts and dtsi files Add ADSP context banks support for ravelin Change-Id: I5654b66740165e8646ef0503ecedff6b6c1661a2 (cherry picked from commit 0aa9cc2941e7b541b3207186d250794ec8d790a8) --- Kbuild | 4 ++++ ravelin/ravelin-dsp.dts | 15 +++++++++++++ ravelin/ravelin-dsp.dtsi | 48 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+) mode change 100644 => 100755 Kbuild create mode 100755 ravelin/ravelin-dsp.dts create mode 100755 ravelin/ravelin-dsp.dtsi diff --git a/Kbuild b/Kbuild old mode 100644 new mode 100755 index 7a752447..935d4f5b --- a/Kbuild +++ b/Kbuild @@ -25,6 +25,10 @@ endif ifeq ($(CONFIG_ARCH_PARROT), y) dtbo-y += parrot/parrot-dsp.dtbo endif + +ifeq ($(CONFIG_ARCH_RAVELIN), y) +dtbo-y += ravelin/ravelin-dsp.dtbo +endif always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/ravelin/ravelin-dsp.dts b/ravelin/ravelin-dsp.dts new file mode 100755 index 00000000..ea175f58 --- /dev/null +++ b/ravelin/ravelin-dsp.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; +/plugin/; + +#include "ravelin-dsp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. ravelin v1 SoC"; + compatible = "qcom,ravelin"; + qcom,msm-id = <568 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/ravelin/ravelin-dsp.dtsi b/ravelin/ravelin-dsp.dtsi new file mode 100755 index 00000000..70d0c74a --- /dev/null +++ b/ravelin/ravelin-dsp.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ +&glink_edge { + qcom,fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + qcom,intents = <0x64 64>; + label = "adsp"; + memory-region = <&adsp_mem_heap>; + qcom,vmids = <22 37>; + + compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1003 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <1>; /* ROOT_PD */ + }; + + compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1004 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + qcom,nsessions = <4>; + pd-type = <3>; /* SENSORS_STATICPD */ + }; + + compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + label = "adsprpc-smd"; + iommus = <&apps_smmu 0x1005 0x0>; + qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>; + qcom,iommu-faults = "stall-disable", "HUPCF"; + dma-coherent; + pd-type = <2>; /* AUDIO_STATICPD */ + }; + }; +};