samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge "ARM: dts: msm: dt snabpshot for Monaco SoC"

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qctecmdr
2024-06-17 05:52:12 -07:00
committed by Gerrit - the friendly Code Review server
parent 94873196df 58daad1f6c
commit 1b7fd4cfae
1 changed files with 11 additions and 11 deletions
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qcom/monaco.dtsi
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@@ -54,17 +54,17 @@
qcom,lmh-dcvs = <&lmh_dcvs0>; qcom,lmh-dcvs = <&lmh_dcvs0>;
#cooling-cells = <2>; #cooling-cells = <2>;
L2_0: l2-cache { L2_0: l2-cache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
cache-size = <0x80000>; cache-size = <0x80000>;
cache-level = <2>; cache-level = <2>;
}; };
L1_I_0: l1-icache { L1_I_0: l1-icache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
L1_D_0: l1-dcache { L1_D_0: l1-dcache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
}; };
@@ -85,11 +85,11 @@
qcom,lmh-dcvs = <&lmh_dcvs0>; qcom,lmh-dcvs = <&lmh_dcvs0>;
L1_I_1: l1-icache { L1_I_1: l1-icache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
L1_D_1: l1-dcache { L1_D_1: l1-dcache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
}; };
@@ -110,11 +110,11 @@
qcom,lmh-dcvs = <&lmh_dcvs0>; qcom,lmh-dcvs = <&lmh_dcvs0>;
L1_I_2: l1-icache { L1_I_2: l1-icache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
L1_D_2: l1-dcache { L1_D_2: l1-dcache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
}; };
@@ -135,11 +135,11 @@
qcom,lmh-dcvs = <&lmh_dcvs0>; qcom,lmh-dcvs = <&lmh_dcvs0>;
L1_I_3: l1-icache { L1_I_3: l1-icache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
L1_D_3: l1-dcache { L1_D_3: l1-dcache {
/* compatible = "arm,arch-cache"; */ compatible = "cache";
}; };
}; };