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Merge remote-tracking branch 'quic/display-kernel-dev.lnx.1.0' into display-kernel.lnx.11.0

Browse Source 
CRs              SHA_ID     Commit Message
----------------------------------------------------------------------
3719851           Ia88f0e73 ARM: dts: msm: add entry for ssip fuse configuration
3715338           I506c8145 ARM: dts: msm: move soccp property for sun target
3722175           I443e4541 ARM: dts: msm: add supported platform variants for sun target
3720894           I9ee3e2bd ARM: dts: msm: enable dfps on sun target
3715338           I6f7d769f ARM: dts: msm: enable hw-fences in display driver for Sun
3719851           Ia88f0e73 ARM: dts: msm: add entry for ssip fuse configuration
3713845           I3860457c ARM: dts: msm: add ATP variant DT support on sun target
3712602           I20ae5e35 ARM: dts: msm: update iommu address range for sun target

CRs-Included: 3715338,3722175,3713845,3712602,3719851,3720894 .

Change-Id: I27a43113cfc004e4023e1ce11c8bf558d18130f2
Signed-off-by: Linux Display <lnxdisplay@localhost>
This commit is contained in:
Linux Display
2024-02-14 07:03:24 +05:30
parent 5468eee8ad 27c9eab566
commit 0d3006488c
13 changed files with 112 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
Kbuild
View File

@@ -14,7 +14,12 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \
display/sun-sde-display-cdp-nfc-overlay.dtbo \
display/sun-sde-display-mtp-nfc-overlay.dtbo \
display/sun-sde-display-cdp-v8-overlay.dtbo \
display/sun-sde-display-mtp-v8-overlay.dtbo
display/sun-sde-display-mtp-v8-overlay.dtbo \
display/sun-sde-display-atp-overlay.dtbo \
display/sun-sde-display-mtp-3-5mm-overlay.dtbo \
display/sun-sde-display-rcm-kiwi-overlay.dtbo \
display/sun-sde-display-rcm-kiwi-v8-overlay.dtbo \
display/sun-sde-display-rcm-v8-overlay.dtbo
else
dtbo-$(CONFIG_ARCH_SUN) += display/trustedvm-sun-sde-display-cdp-overlay.dtbo \
display/trustedvm-sun-sde-display-mtp-overlay.dtbo \

5
bindings/sde.txt
View File

@@ -103,6 +103,10 @@ Optional properties:
-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off
-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off
- qcom,sde-hw-version: A u32 value indicates the MDSS hw version
- qcom,hw-fence-sw-version: A u32 value to indicate the hw fencing version. If set to a value
greather than zero, driver will attempt to enable the feature (if
supported by the HW). Otherwise, if this value is not set or set
to zero, feature will remain disabled.
- qcom,sde-sspp-src-size: A u32 value indicates the address range for each sspp.
- qcom,sde-mixer-size: A u32 value indicates the address range for each mixer.
- qcom,sde-ctl-size: A u32 value indicates the address range for each ctl.
@@ -720,6 +724,7 @@ Example:
#power-domain-cells = <0>;
qcom,sde-hw-version = <0x70000000>;
qcom,hw-fence-sw-version = <0x1>;
qcom,sde-emulated-env;
qcom,sde-off = <0x1000>;
qcom,sde-ctl-off = <0x00002000 0x00002200 0x00002400

1
display/sun-sde-common.dtsi
View File

@@ -265,7 +265,6 @@
qcom,sde-ipcc-protocol-id = <0x4>;
qcom,sde-ipcc-client-dpu-phys-id = <0x14>;
qcom,sde-soccp-controller = <&soccp_pas>;
qcom,sde-hw-fence-mdp-ctl-offset = <0x20000>;
/* offsets are relative to "mdp_phys + qcom,sde-off */

16
display/sun-sde-display-atp-overlay.dts Normal file
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@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "sun-sde-display-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Sun ATP";
compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp", "qcom,atp";
qcom,msm-id = <618 0x10000>, <618 0x20000>;
qcom,board-id = <0x10021 0>;
};

6
display/sun-sde-display-cdp-kiwi-overlay.dts
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
@@ -10,7 +10,7 @@
/ {
model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN";
compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp";
qcom,msm-id = <618 0x10000>, <618 0x20000>;
compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
qcom,board-id = <0x20001 0>;
};

8
display/sun-sde-display-common.dtsi
View File

@@ -375,6 +375,10 @@
&dsi_nt37801_amoled_video_cphy {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,dsi-supported-dfps-list = <120 110 100 90 80>;
qcom,mdss-dsi-pan-enable-dynamic-fps;
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
@@ -414,6 +418,10 @@
&dsi_nt37801_amoled_video {
qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1";
qcom,dsi-supported-dfps-list = <120 110 100 90 80>;
qcom,mdss-dsi-pan-enable-dynamic-fps;
qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
qcom,esd-check-enabled;
qcom,mdss-dsi-panel-status-check-mode = "reg_read";
qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];

16
display/sun-sde-display-mtp-3-5mm-overlay.dts Normal file
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@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "sun-sde-display-mtp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Sun MTP with 3.5mm";
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
qcom,board-id = <0x60008 0>;
};

6
display/sun-sde-display-mtp-kiwi-overlay.dts
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
@@ -10,7 +10,7 @@
/ {
model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN";
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp";
qcom,msm-id = <618 0x10000>, <618 0x20000>;
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
qcom,board-id = <0x20008 0>;
};

4
display/sun-sde-display-mtp-overlay.dts
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
@@ -10,7 +10,7 @@
/ {
model = "Qualcomm Technologies, Inc. Sun MTP";
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp";
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
qcom,board-id = <8 0>;
};

16
display/sun-sde-display-rcm-kiwi-overlay.dts Normal file
View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "sun-sde-display-rcm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN";
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
qcom,msm-id = <618 0x10000>, <618 0x20000>;
qcom,board-id = <0x40015 0>;
};

16
display/sun-sde-display-rcm-kiwi-v8-overlay.dts Normal file
View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "sun-sde-display-rcm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN V8 Power Grid";
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
qcom,msm-id = <618 0x10000>, <618 0x20000>;
qcom,board-id = <0x20015 0>;
};

16
display/sun-sde-display-rcm-v8-overlay.dts Normal file
View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
/plugin/;
#include "sun-sde-display-rcm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Sun RCM V8 Power Grid";
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
qcom,msm-id = <618 0x10000>, <618 0x20000>;
qcom,board-id = <0x30015 0>;
};

5
display/sun-sde.dtsi
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@@ -183,6 +183,7 @@
smmu_sde_iommu_region_partition: smmu_sde_iommu_region_partition {
iommu-addresses = <&smmu_sde_unsec 0x0 0x00060000>,
<&smmu_sde_unsec 0xd4e23000 0x002dd000>,
<&smmu_sde_unsec 0xd5500000 0x02b00000>,
<&smmu_sde_sec 0x0 0x00020000>;
};
@@ -219,11 +220,15 @@
clock-rate = <0 0 575000000 575000000 19200000 575000000>;
clock-max-rate = <0 0 575000000 575000000 19200000 575000000>;
qcom,hw-fence-sw-version = <0x1>;
vdd-supply = <&disp_cc_mdss_core_gdsc>;
mmcx-supply = <&VDD_MMCX_LEVEL>;
qti,smmu-proxy-cb-id = <QTI_SMMU_PROXY_DISPLAY_CB>;
qcom,sde-soccp-controller = <&soccp_pas>;
qcom,sde-vm-exclude-reg-names = "ipcc_reg";
/* data and reg bus scale settings */