From cc38699007b8108ddffbe22e0a1e7b2308cdac4e Mon Sep 17 00:00:00 2001 From: Jayasri Sampath Kumaran Date: Mon, 22 Jan 2024 13:11:45 -0500 Subject: [PATCH 1/7] ARM: dts: msm: update iommu address range for sun target Update unsecure iommu address pool to exclude memory region allocated to HW-Fence. Change-Id: I20ae5e357da5346e663044bbc1565135ff3a1ca7 Signed-off-by: Jayasri Sampath Kumaran --- display/sun-sde.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 18c83c8e..1c714c37 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -183,6 +183,7 @@ smmu_sde_iommu_region_partition: smmu_sde_iommu_region_partition { iommu-addresses = <&smmu_sde_unsec 0x0 0x00060000>, + <&smmu_sde_unsec 0xd4e23000 0x002dd000>, <&smmu_sde_unsec 0xd5500000 0x02b00000>, <&smmu_sde_sec 0x0 0x00020000>; }; From 9e5057ad5b8d9c3b54b62e4d4fde2e33a35f5d2e Mon Sep 17 00:00:00 2001 From: Veera Sundaram Sankaran Date: Mon, 22 Jan 2024 22:43:57 -0800 Subject: [PATCH 2/7] ARM: dts: msm: add ATP variant DT support on sun target Add DT support for ATP variant on sun target. Change-Id: I3860457c497e311e625884dad6972496cc3729c0 Signed-off-by: Veera Sundaram Sankaran --- Kbuild | 3 ++- display/sun-sde-display-atp-overlay.dts | 16 ++++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) create mode 100644 display/sun-sde-display-atp-overlay.dts diff --git a/Kbuild b/Kbuild index a824c4d7..3060fd20 100644 --- a/Kbuild +++ b/Kbuild @@ -14,7 +14,8 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \ display/sun-sde-display-cdp-nfc-overlay.dtbo \ display/sun-sde-display-mtp-nfc-overlay.dtbo \ display/sun-sde-display-cdp-v8-overlay.dtbo \ - display/sun-sde-display-mtp-v8-overlay.dtbo + display/sun-sde-display-mtp-v8-overlay.dtbo \ + display/sun-sde-display-atp-overlay.dtbo else dtbo-$(CONFIG_ARCH_SUN) += display/trustedvm-sun-sde-display-cdp-overlay.dtbo \ display/trustedvm-sun-sde-display-mtp-overlay.dtbo diff --git a/display/sun-sde-display-atp-overlay.dts b/display/sun-sde-display-atp-overlay.dts new file mode 100644 index 00000000..d3b24f2d --- /dev/null +++ b/display/sun-sde-display-atp-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun ATP"; + compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp", "qcom,atp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x10021 0>; +}; From ab7e80ddd8f1e9537e5afe84dbe582061ebb0b01 Mon Sep 17 00:00:00 2001 From: Ping Li Date: Fri, 26 Jan 2024 13:18:24 -0800 Subject: [PATCH 3/7] ARM: dts: msm: add entry for ssip fuse configuration Add dts entry for ssip fuse configuration on Sun platform. Change-Id: Ia88f0e73d0813c99b7464adc031c4aca8e331440 Signed-off-by: Ping Li --- bindings/sde.txt | 5 +++++ display/sun-sde.dtsi | 3 +++ 2 files changed, 8 insertions(+) diff --git a/bindings/sde.txt b/bindings/sde.txt index 779a3da7..e432ad8b 100644 --- a/bindings/sde.txt +++ b/bindings/sde.txt @@ -420,6 +420,8 @@ Optional properties: hardware. - qcom,sde-aiqe-has-feature-aiscaler: Boolean property indicating the presence of AIQE feature AI Scaler hardware. +- nvmem-cells: phandle list to the fuse configuration data provided by a nvmem device. +- nvmem-cell-names: nvmem cell name. - qcom,sde-lm-noise-off: A u32 value indicating noise layer offset from mixer base. - qcom,sde-lm-noise-version: A u32 value indicating the noise layer version. - qcom,sde-vbif-id: Array of vbif ids corresponding to the @@ -982,6 +984,9 @@ Example: qcom,sde-reg-dma-xin-id = <7>; qcom,sde-reg-dma-clk-ctrl = <0x2bc 20>; + nvmem-cells = <&ssip_config>; + nvmem-cell-names = "ssip_config"; + qcom,sde-sspp-vig-blocks { vcm@0 { cell-index = <0>; diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 18c83c8e..578d63e6 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -241,6 +241,9 @@ /* offsets are based off dspp 0, 1, 2, and 3 */ qcom,sde-dspp-ltm-off = <0x15300 0x14300 0x13300 0x12300>; + nvmem-cells = <&ssip_config>; + nvmem-cell-names = "ssip_config"; + qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; From 672405ce89b79e671032c1bf3a8596af643efa87 Mon Sep 17 00:00:00 2001 From: Christina Oliveira Date: Tue, 30 Jan 2024 14:14:50 -0800 Subject: [PATCH 4/7] ARM: dts: msm: enable hw-fences in display driver for Sun Enable the use of hw-fences as the preferred synchronization primitives in the display driver for Sun target. Change-Id: I6f7d769f0a9002d27e68bac55095a3958587e47b Signed-off-by: Christina Oliveira --- bindings/sde.txt | 5 +++++ display/sun-sde.dtsi | 2 ++ 2 files changed, 7 insertions(+) diff --git a/bindings/sde.txt b/bindings/sde.txt index 6ceef390..48cba952 100644 --- a/bindings/sde.txt +++ b/bindings/sde.txt @@ -103,6 +103,10 @@ Optional properties: -- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off -- qcom,supply-post-off-sleep: time to sleep (ms) after turning off - qcom,sde-hw-version: A u32 value indicates the MDSS hw version +- qcom,hw-fence-sw-version: A u32 value to indicate the hw fencing version. If set to a value + greather than zero, driver will attempt to enable the feature (if + supported by the HW). Otherwise, if this value is not set or set + to zero, feature will remain disabled. - qcom,sde-sspp-src-size: A u32 value indicates the address range for each sspp. - qcom,sde-mixer-size: A u32 value indicates the address range for each mixer. - qcom,sde-ctl-size: A u32 value indicates the address range for each ctl. @@ -718,6 +722,7 @@ Example: #power-domain-cells = <0>; qcom,sde-hw-version = <0x70000000>; + qcom,hw-fence-sw-version = <0x1>; qcom,sde-emulated-env; qcom,sde-off = <0x1000>; qcom,sde-ctl-off = <0x00002000 0x00002200 0x00002400 diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 18c83c8e..8188c462 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -219,6 +219,8 @@ clock-rate = <0 0 575000000 575000000 19200000 575000000>; clock-max-rate = <0 0 575000000 575000000 19200000 575000000>; + qcom,hw-fence-sw-version = <0x1>; + vdd-supply = <&disp_cc_mdss_core_gdsc>; mmcx-supply = <&VDD_MMCX_LEVEL>; From 3d852df744721286bd59cc0b5d2e5d6bcbfee496 Mon Sep 17 00:00:00 2001 From: Jinfeng Gu Date: Thu, 1 Feb 2024 18:55:55 +0800 Subject: [PATCH 5/7] ARM: dts: msm: enable dfps on sun target This change enable dfps for video mode panel on sun target. Change-Id: I9ee3e2bd916b064550d2a0b64b67e6be0335610c Signed-off-by: Jinfeng Gu --- display/sun-sde-display-common.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/display/sun-sde-display-common.dtsi b/display/sun-sde-display-common.dtsi index 54797f5e..a8bff957 100644 --- a/display/sun-sde-display-common.dtsi +++ b/display/sun-sde-display-common.dtsi @@ -375,6 +375,10 @@ &dsi_nt37801_amoled_video_cphy { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; + qcom,dsi-supported-dfps-list = <120 110 100 90 80>; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp"; + qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; @@ -414,6 +418,10 @@ &dsi_nt37801_amoled_video { qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0"; qcom,dsi-select-sec-clocks = "pll_byte_clk1", "pll_dsi_clk1"; + qcom,dsi-supported-dfps-list = <120 110 100 90 80>; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp"; + qcom,esd-check-enabled; qcom,mdss-dsi-panel-status-check-mode = "reg_read"; qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; From 8cc1a7778de16a5d92b167bb526cf676e3092817 Mon Sep 17 00:00:00 2001 From: Jayasri Sampath Kumaran Date: Wed, 31 Jan 2024 15:26:17 -0500 Subject: [PATCH 6/7] ARM: dts: msm: add supported platform variants for sun target Add Kiwi, v8 Power Grid, v8 Power Grid with Kiwi on RCM platform and 3.5mm on MTP platform for sun target. Add APQ SOC id and add more models for compatible property on Kiwi CDP and MTP platforms for sun target. Change-Id: I443e45414ba663cbb0672e686e9757e861379f5c Signed-off-by: Jayasri Sampath Kumaran --- Kbuild | 6 +++++- display/sun-sde-display-cdp-kiwi-overlay.dts | 6 +++--- display/sun-sde-display-mtp-3-5mm-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-mtp-kiwi-overlay.dts | 6 +++--- display/sun-sde-display-mtp-overlay.dts | 4 ++-- display/sun-sde-display-rcm-kiwi-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-rcm-kiwi-v8-overlay.dts | 16 ++++++++++++++++ display/sun-sde-display-rcm-v8-overlay.dts | 16 ++++++++++++++++ 8 files changed, 77 insertions(+), 9 deletions(-) create mode 100644 display/sun-sde-display-mtp-3-5mm-overlay.dts create mode 100644 display/sun-sde-display-rcm-kiwi-overlay.dts create mode 100644 display/sun-sde-display-rcm-kiwi-v8-overlay.dts create mode 100644 display/sun-sde-display-rcm-v8-overlay.dts diff --git a/Kbuild b/Kbuild index 3060fd20..56042b05 100644 --- a/Kbuild +++ b/Kbuild @@ -15,7 +15,11 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \ display/sun-sde-display-mtp-nfc-overlay.dtbo \ display/sun-sde-display-cdp-v8-overlay.dtbo \ display/sun-sde-display-mtp-v8-overlay.dtbo \ - display/sun-sde-display-atp-overlay.dtbo + display/sun-sde-display-atp-overlay.dtbo \ + display/sun-sde-display-mtp-3-5mm-overlay.dtbo \ + display/sun-sde-display-rcm-kiwi-overlay.dtbo \ + display/sun-sde-display-rcm-kiwi-v8-overlay.dtbo \ + display/sun-sde-display-rcm-v8-overlay.dtbo else dtbo-$(CONFIG_ARCH_SUN) += display/trustedvm-sun-sde-display-cdp-overlay.dtbo \ display/trustedvm-sun-sde-display-mtp-overlay.dtbo diff --git a/display/sun-sde-display-cdp-kiwi-overlay.dts b/display/sun-sde-display-cdp-kiwi-overlay.dts index acfc23ea..4ba523d6 100644 --- a/display/sun-sde-display-cdp-kiwi-overlay.dts +++ b/display/sun-sde-display-cdp-kiwi-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -10,7 +10,7 @@ / { model = "Qualcomm Technologies, Inc. Sun CDP Kiwi WLAN"; - compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + compatible = "qcom,sun-cdp", "qcom,sun", "qcom,sunp-cdp", "qcom,sunp", "qcom,cdp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x20001 0>; }; diff --git a/display/sun-sde-display-mtp-3-5mm-overlay.dts b/display/sun-sde-display-mtp-3-5mm-overlay.dts new file mode 100644 index 00000000..e7b19c30 --- /dev/null +++ b/display/sun-sde-display-mtp-3-5mm-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-mtp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun MTP with 3.5mm"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; + qcom,board-id = <0x60008 0>; +}; diff --git a/display/sun-sde-display-mtp-kiwi-overlay.dts b/display/sun-sde-display-mtp-kiwi-overlay.dts index 6d755f25..7dd3d0f1 100644 --- a/display/sun-sde-display-mtp-kiwi-overlay.dts +++ b/display/sun-sde-display-mtp-kiwi-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -10,7 +10,7 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP Kiwi WLAN"; - compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; - qcom,msm-id = <618 0x10000>, <618 0x20000>; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; + qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <0x20008 0>; }; diff --git a/display/sun-sde-display-mtp-overlay.dts b/display/sun-sde-display-mtp-overlay.dts index 48ad6325..ba89d90c 100644 --- a/display/sun-sde-display-mtp-overlay.dts +++ b/display/sun-sde-display-mtp-overlay.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -10,7 +10,7 @@ / { model = "Qualcomm Technologies, Inc. Sun MTP"; - compatible = "qcom,sun-mtp", "qcom,sun", "qcom,mtp"; + compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp"; qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>; qcom,board-id = <8 0>; }; diff --git a/display/sun-sde-display-rcm-kiwi-overlay.dts b/display/sun-sde-display-rcm-kiwi-overlay.dts new file mode 100644 index 00000000..21abbbbf --- /dev/null +++ b/display/sun-sde-display-rcm-kiwi-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN"; + compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x40015 0>; +}; diff --git a/display/sun-sde-display-rcm-kiwi-v8-overlay.dts b/display/sun-sde-display-rcm-kiwi-v8-overlay.dts new file mode 100644 index 00000000..18bdb0e6 --- /dev/null +++ b/display/sun-sde-display-rcm-kiwi-v8-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN V8 Power Grid"; + compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x20015 0>; +}; diff --git a/display/sun-sde-display-rcm-v8-overlay.dts b/display/sun-sde-display-rcm-v8-overlay.dts new file mode 100644 index 00000000..1c7308f2 --- /dev/null +++ b/display/sun-sde-display-rcm-v8-overlay.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include "sun-sde-display-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Sun RCM V8 Power Grid"; + compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm"; + qcom,msm-id = <618 0x10000>, <618 0x20000>; + qcom,board-id = <0x30015 0>; +}; From 4195a29a99c607be4bde16e70c58028e8266b8d5 Mon Sep 17 00:00:00 2001 From: Christina Oliveira Date: Thu, 8 Feb 2024 11:20:08 -0800 Subject: [PATCH 7/7] ARM: dts: msm: move soccp property for sun target This change moves the soccp phandle property needed for soccp power vote. Change-Id: I506c814517a2019a13450822f86d16e2c9a535e4 Signed-off-by: Christina Oliveira --- display/sun-sde-common.dtsi | 1 - display/sun-sde.dtsi | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/display/sun-sde-common.dtsi b/display/sun-sde-common.dtsi index 3300a722..0b2c0bb1 100644 --- a/display/sun-sde-common.dtsi +++ b/display/sun-sde-common.dtsi @@ -265,7 +265,6 @@ qcom,sde-ipcc-protocol-id = <0x4>; qcom,sde-ipcc-client-dpu-phys-id = <0x14>; - qcom,sde-soccp-controller = <&soccp_pas>; qcom,sde-hw-fence-mdp-ctl-offset = <0x20000>; /* offsets are relative to "mdp_phys + qcom,sde-off */ diff --git a/display/sun-sde.dtsi b/display/sun-sde.dtsi index 18c83c8e..b7ea2b0d 100644 --- a/display/sun-sde.dtsi +++ b/display/sun-sde.dtsi @@ -224,6 +224,8 @@ qti,smmu-proxy-cb-id = ; + qcom,sde-soccp-controller = <&soccp_pas>; + qcom,sde-vm-exclude-reg-names = "ipcc_reg"; /* data and reg bus scale settings */