samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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ARM: dts: msm: Update cpu ids, spin-table region, timer interrupts

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Update cpu ids, spin-table region, and timer interrupts on sun
to enable multicore boot.

Change-Id: Ibc25a86992dddc997c58e8e10a749b3c79731244
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
This commit is contained in:
Melody Olvera
2023-04-19 14:29:14 -07:00
parent cb8cf933bf
commit 0a6dffcb0d
2 changed files with 7 additions and 7 deletions
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4
qcom/sun-rumi.dtsi
View File

@@ -4,9 +4,9 @@
*/
&reserved_memory {
spintable: spintable_region@e3940000 {
spintable: spintable_region@90000000 {
no-map;
reg = <0x0 0xe3940000 0x0 0x100000>;
reg = <0x0 0x90000000 0x0 0x100000>;
};
};

10
qcom/sun.dtsi
View File

@@ -84,10 +84,10 @@
next-level-cache = <&L2_0>;
};
CPU6: cpu@600 {
CPU6: cpu@10000 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x600>;
reg = <0x0 0x10000>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_6>;
@@ -97,10 +97,10 @@
};
};
CPU7: cpu@700 {
CPU7: cpu@10100 {
device_type = "cpu";
compatible = "arm,armv8";
reg = <0x0 0x700>;
reg = <0x0 0x10100>;
enable-method = "spin-table";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_6>;
@@ -231,7 +231,7 @@
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
clock-frequency = <19200000>;
};
};