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Merge tag 'pci-v4.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Browse Source 
Pull PCI fixes from Bjorn Helgaas:

 - fix NULL pointer dereferences in many DesignWare-based drivers due to
   refactoring error

 - fix Altera config write breakage due to my refactoring error

* tag 'pci-v4.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: altera: Fix TLP_CFG_DW0 for TLP write
  PCI: dwc: Fix crashes seen due to missing assignments
This commit is contained in:
Linus Torvalds
2017-03-03 16:44:21 -08:00
parent f47e2db43d 2a7275a3d8
commit e27fd02d92
11 changed files with 25 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/pci/dwc/pci-exynos.c
View File

@@ -668,6 +668,7 @@ static int __init exynos_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
ep->pci = pci;
ep->ops = (const struct exynos_pcie_ops *)
of_device_get_match_data(dev);

1
drivers/pci/dwc/pci-imx6.c
View File

@@ -605,6 +605,7 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
imx6_pcie->pci = pci;
imx6_pcie->variant =
(enum imx6_pcie_variants)of_device_get_match_data(dev);

2
drivers/pci/dwc/pci-keystone.c
View File

@@ -401,6 +401,8 @@ static int __init ks_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
ks_pcie->pci = pci;
/* initialize SerDes Phy if present */
phy = devm_phy_get(dev, "pcie-phy");
if (PTR_ERR_OR_ZERO(phy) == -EPROBE_DEFER)

2
drivers/pci/dwc/pci-layerscape.c
View File

@@ -280,6 +280,8 @@ static int __init ls_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = pcie->drvdata->dw_pcie_ops;
pcie->pci = pci;
dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
pci->dbi_base = devm_ioremap_resource(dev, dbi_base);
if (IS_ERR(pci->dbi_base))

2
drivers/pci/dwc/pcie-armada8k.c
View File

@@ -220,6 +220,8 @@ static int armada8k_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
pcie->pci = pci;
pcie->clk = devm_clk_get(dev, NULL);
if (IS_ERR(pcie->clk))
return PTR_ERR(pcie->clk);

2
drivers/pci/dwc/pcie-artpec6.c
View File

@@ -253,6 +253,8 @@ static int artpec6_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
artpec6_pcie->pci = pci;
dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
pci->dbi_base = devm_ioremap_resource(dev, dbi_base);
if (IS_ERR(pci->dbi_base))

2
drivers/pci/dwc/pcie-designware-plat.c
View File

@@ -104,6 +104,8 @@ static int dw_plat_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
dw_plat_pcie->pci = pci;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
pci->dbi_base = devm_ioremap_resource(dev, res);
if (IS_ERR(pci->dbi_base))

2
drivers/pci/dwc/pcie-hisi.c
View File

@@ -284,6 +284,8 @@ static int hisi_pcie_probe(struct platform_device *pdev)
driver = dev->driver;
hisi_pcie->pci = pci;
hisi_pcie->soc_ops = of_device_get_match_data(dev);
hisi_pcie->subctrl =

2
drivers/pci/dwc/pcie-qcom.c
View File

@@ -686,6 +686,8 @@ static int qcom_pcie_probe(struct platform_device *pdev)
pci->ops = &dw_pcie_ops;
pp = &pci->pp;
pcie->pci = pci;
pcie->ops = (struct qcom_pcie_ops *)of_device_get_match_data(dev);
pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW);

2
drivers/pci/dwc/pcie-spear13xx.c
View File

@@ -247,6 +247,8 @@ static int spear13xx_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
spear13xx_pcie->pci = pci;
spear13xx_pcie->phy = devm_phy_get(dev, "pcie-phy");
if (IS_ERR(spear13xx_pcie->phy)) {
ret = PTR_ERR(spear13xx_pcie->phy);

10
drivers/pci/host/pcie-altera.c
View File

@@ -57,10 +57,14 @@
#define TLP_WRITE_TAG 0x10
#define RP_DEVFN 0
#define TLP_REQ_ID(bus, devfn) (((bus) << 8) | (devfn))
#define TLP_CFG_DW0(pcie, bus) \
#define TLP_CFGRD_DW0(pcie, bus) \
((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGRD0 \
: TLP_FMTTYPE_CFGRD1) << 24) | \
TLP_PAYLOAD_SIZE)
#define TLP_CFGWR_DW0(pcie, bus) \
((((bus == pcie->root_bus_nr) ? TLP_FMTTYPE_CFGWR0 \
: TLP_FMTTYPE_CFGWR1) << 24) | \
TLP_PAYLOAD_SIZE)
#define TLP_CFG_DW1(pcie, tag, be) \
(((TLP_REQ_ID(pcie->root_bus_nr, RP_DEVFN)) << 16) | (tag << 8) | (be))
#define TLP_CFG_DW2(bus, devfn, offset) \
@@ -222,7 +226,7 @@ static int tlp_cfg_dword_read(struct altera_pcie *pcie, u8 bus, u32 devfn,
{
u32 headers[TLP_HDR_SIZE];
headers[0] = TLP_CFG_DW0(pcie, bus);
headers[0] = TLP_CFGRD_DW0(pcie, bus);
headers[1] = TLP_CFG_DW1(pcie, TLP_READ_TAG, byte_en);
headers[2] = TLP_CFG_DW2(bus, devfn, where);
@@ -237,7 +241,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 bus, u32 devfn,
u32 headers[TLP_HDR_SIZE];
int ret;
headers[0] = TLP_CFG_DW0(pcie, bus);
headers[0] = TLP_CFGWR_DW0(pcie, bus);
headers[1] = TLP_CFG_DW1(pcie, TLP_WRITE_TAG, byte_en);
headers[2] = TLP_CFG_DW2(bus, devfn, where);