Merge tag 'android15-6.6.100_r00' of https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-msm into lineage-22.2
This commit is contained in:
SaschaNes
1
.bazelignore
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1
.bazelignore
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@@ -0,0 +1 @@
|
||||
common/.kunit
|
||||
689
.clang-format
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689
.clang-format
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@@ -0,0 +1,689 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
#
|
||||
# clang-format configuration file. Intended for clang-format >= 11.
|
||||
#
|
||||
# For more information, see:
|
||||
#
|
||||
# Documentation/process/clang-format.rst
|
||||
# https://clang.llvm.org/docs/ClangFormat.html
|
||||
# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
|
||||
#
|
||||
---
|
||||
AccessModifierOffset: -4
|
||||
AlignAfterOpenBracket: Align
|
||||
AlignConsecutiveAssignments: false
|
||||
AlignConsecutiveDeclarations: false
|
||||
AlignEscapedNewlines: Left
|
||||
AlignOperands: true
|
||||
AlignTrailingComments: false
|
||||
AllowAllParametersOfDeclarationOnNextLine: false
|
||||
AllowShortBlocksOnASingleLine: false
|
||||
AllowShortCaseLabelsOnASingleLine: false
|
||||
AllowShortFunctionsOnASingleLine: None
|
||||
AllowShortIfStatementsOnASingleLine: false
|
||||
AllowShortLoopsOnASingleLine: false
|
||||
AlwaysBreakAfterDefinitionReturnType: None
|
||||
AlwaysBreakAfterReturnType: None
|
||||
AlwaysBreakBeforeMultilineStrings: false
|
||||
AlwaysBreakTemplateDeclarations: false
|
||||
BinPackArguments: true
|
||||
BinPackParameters: true
|
||||
BraceWrapping:
|
||||
AfterClass: false
|
||||
AfterControlStatement: false
|
||||
AfterEnum: false
|
||||
AfterFunction: true
|
||||
AfterNamespace: true
|
||||
AfterObjCDeclaration: false
|
||||
AfterStruct: false
|
||||
AfterUnion: false
|
||||
AfterExternBlock: false
|
||||
BeforeCatch: false
|
||||
BeforeElse: false
|
||||
IndentBraces: false
|
||||
SplitEmptyFunction: true
|
||||
SplitEmptyRecord: true
|
||||
SplitEmptyNamespace: true
|
||||
BreakBeforeBinaryOperators: None
|
||||
BreakBeforeBraces: Custom
|
||||
BreakBeforeInheritanceComma: false
|
||||
BreakBeforeTernaryOperators: false
|
||||
BreakConstructorInitializersBeforeComma: false
|
||||
BreakConstructorInitializers: BeforeComma
|
||||
BreakAfterJavaFieldAnnotations: false
|
||||
BreakStringLiterals: false
|
||||
ColumnLimit: 80
|
||||
CommentPragmas: '^ IWYU pragma:'
|
||||
CompactNamespaces: false
|
||||
ConstructorInitializerAllOnOneLineOrOnePerLine: false
|
||||
ConstructorInitializerIndentWidth: 8
|
||||
ContinuationIndentWidth: 8
|
||||
Cpp11BracedListStyle: false
|
||||
DerivePointerAlignment: false
|
||||
DisableFormat: false
|
||||
ExperimentalAutoDetectBinPacking: false
|
||||
FixNamespaceComments: false
|
||||
|
||||
# Taken from:
|
||||
# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ tools/ \
|
||||
# | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$, - '\1'," \
|
||||
# | LC_ALL=C sort -u
|
||||
ForEachMacros:
|
||||
- '__ata_qc_for_each'
|
||||
- '__bio_for_each_bvec'
|
||||
- '__bio_for_each_segment'
|
||||
- '__evlist__for_each_entry'
|
||||
- '__evlist__for_each_entry_continue'
|
||||
- '__evlist__for_each_entry_from'
|
||||
- '__evlist__for_each_entry_reverse'
|
||||
- '__evlist__for_each_entry_safe'
|
||||
- '__for_each_mem_range'
|
||||
- '__for_each_mem_range_rev'
|
||||
- '__for_each_thread'
|
||||
- '__hlist_for_each_rcu'
|
||||
- '__map__for_each_symbol_by_name'
|
||||
- '__perf_evlist__for_each_entry'
|
||||
- '__perf_evlist__for_each_entry_reverse'
|
||||
- '__perf_evlist__for_each_entry_safe'
|
||||
- '__rq_for_each_bio'
|
||||
- '__shost_for_each_device'
|
||||
- 'apei_estatus_for_each_section'
|
||||
- 'ata_for_each_dev'
|
||||
- 'ata_for_each_link'
|
||||
- 'ata_qc_for_each'
|
||||
- 'ata_qc_for_each_raw'
|
||||
- 'ata_qc_for_each_with_internal'
|
||||
- 'ax25_for_each'
|
||||
- 'ax25_uid_for_each'
|
||||
- 'bio_for_each_bvec'
|
||||
- 'bio_for_each_bvec_all'
|
||||
- 'bio_for_each_folio_all'
|
||||
- 'bio_for_each_integrity_vec'
|
||||
- 'bio_for_each_segment'
|
||||
- 'bio_for_each_segment_all'
|
||||
- 'bio_list_for_each'
|
||||
- 'bip_for_each_vec'
|
||||
- 'bond_for_each_slave'
|
||||
- 'bond_for_each_slave_rcu'
|
||||
- 'bpf__perf_for_each_map'
|
||||
- 'bpf__perf_for_each_map_named'
|
||||
- 'bpf_for_each_spilled_reg'
|
||||
- 'bpf_object__for_each_map'
|
||||
- 'bpf_object__for_each_program'
|
||||
- 'bpf_object__for_each_safe'
|
||||
- 'bpf_perf_object__for_each'
|
||||
- 'btree_for_each_safe128'
|
||||
- 'btree_for_each_safe32'
|
||||
- 'btree_for_each_safe64'
|
||||
- 'btree_for_each_safel'
|
||||
- 'card_for_each_dev'
|
||||
- 'cgroup_taskset_for_each'
|
||||
- 'cgroup_taskset_for_each_leader'
|
||||
- 'cpufreq_for_each_efficient_entry_idx'
|
||||
- 'cpufreq_for_each_entry'
|
||||
- 'cpufreq_for_each_entry_idx'
|
||||
- 'cpufreq_for_each_valid_entry'
|
||||
- 'cpufreq_for_each_valid_entry_idx'
|
||||
- 'css_for_each_child'
|
||||
- 'css_for_each_descendant_post'
|
||||
- 'css_for_each_descendant_pre'
|
||||
- 'damon_for_each_region'
|
||||
- 'damon_for_each_region_safe'
|
||||
- 'damon_for_each_scheme'
|
||||
- 'damon_for_each_scheme_safe'
|
||||
- 'damon_for_each_target'
|
||||
- 'damon_for_each_target_safe'
|
||||
- 'data__for_each_file'
|
||||
- 'data__for_each_file_new'
|
||||
- 'data__for_each_file_start'
|
||||
- 'device_for_each_child_node'
|
||||
- 'displayid_iter_for_each'
|
||||
- 'dma_fence_array_for_each'
|
||||
- 'dma_fence_chain_for_each'
|
||||
- 'dma_fence_unwrap_for_each'
|
||||
- 'dma_resv_for_each_fence'
|
||||
- 'dma_resv_for_each_fence_unlocked'
|
||||
- 'do_for_each_ftrace_op'
|
||||
- 'drm_atomic_crtc_for_each_plane'
|
||||
- 'drm_atomic_crtc_state_for_each_plane'
|
||||
- 'drm_atomic_crtc_state_for_each_plane_state'
|
||||
- 'drm_atomic_for_each_plane_damage'
|
||||
- 'drm_client_for_each_connector_iter'
|
||||
- 'drm_client_for_each_modeset'
|
||||
- 'drm_connector_for_each_possible_encoder'
|
||||
- 'drm_for_each_bridge_in_chain'
|
||||
- 'drm_for_each_connector_iter'
|
||||
- 'drm_for_each_crtc'
|
||||
- 'drm_for_each_crtc_reverse'
|
||||
- 'drm_for_each_encoder'
|
||||
- 'drm_for_each_encoder_mask'
|
||||
- 'drm_for_each_fb'
|
||||
- 'drm_for_each_legacy_plane'
|
||||
- 'drm_for_each_plane'
|
||||
- 'drm_for_each_plane_mask'
|
||||
- 'drm_for_each_privobj'
|
||||
- 'drm_mm_for_each_hole'
|
||||
- 'drm_mm_for_each_node'
|
||||
- 'drm_mm_for_each_node_in_range'
|
||||
- 'drm_mm_for_each_node_safe'
|
||||
- 'dsa_switch_for_each_available_port'
|
||||
- 'dsa_switch_for_each_cpu_port'
|
||||
- 'dsa_switch_for_each_port'
|
||||
- 'dsa_switch_for_each_port_continue_reverse'
|
||||
- 'dsa_switch_for_each_port_safe'
|
||||
- 'dsa_switch_for_each_user_port'
|
||||
- 'dsa_tree_for_each_user_port'
|
||||
- 'dso__for_each_symbol'
|
||||
- 'dsos__for_each_with_build_id'
|
||||
- 'elf_hash_for_each_possible'
|
||||
- 'elf_section__for_each_rel'
|
||||
- 'elf_section__for_each_rela'
|
||||
- 'elf_symtab__for_each_symbol'
|
||||
- 'evlist__for_each_cpu'
|
||||
- 'evlist__for_each_entry'
|
||||
- 'evlist__for_each_entry_continue'
|
||||
- 'evlist__for_each_entry_from'
|
||||
- 'evlist__for_each_entry_reverse'
|
||||
- 'evlist__for_each_entry_safe'
|
||||
- 'flow_action_for_each'
|
||||
- 'for_each_acpi_dev_match'
|
||||
- 'for_each_active_dev_scope'
|
||||
- 'for_each_active_drhd_unit'
|
||||
- 'for_each_active_iommu'
|
||||
- 'for_each_active_route'
|
||||
- 'for_each_aggr_pgid'
|
||||
- 'for_each_available_child_of_node'
|
||||
- 'for_each_bench'
|
||||
- 'for_each_bio'
|
||||
- 'for_each_board_func_rsrc'
|
||||
- 'for_each_btf_ext_rec'
|
||||
- 'for_each_btf_ext_sec'
|
||||
- 'for_each_bvec'
|
||||
- 'for_each_card_auxs'
|
||||
- 'for_each_card_auxs_safe'
|
||||
- 'for_each_card_components'
|
||||
- 'for_each_card_dapms'
|
||||
- 'for_each_card_pre_auxs'
|
||||
- 'for_each_card_prelinks'
|
||||
- 'for_each_card_rtds'
|
||||
- 'for_each_card_rtds_safe'
|
||||
- 'for_each_card_widgets'
|
||||
- 'for_each_card_widgets_safe'
|
||||
- 'for_each_cgroup_storage_type'
|
||||
- 'for_each_child_of_node'
|
||||
- 'for_each_clear_bit'
|
||||
- 'for_each_clear_bit_from'
|
||||
- 'for_each_clear_bitrange'
|
||||
- 'for_each_clear_bitrange_from'
|
||||
- 'for_each_cmd'
|
||||
- 'for_each_cmsghdr'
|
||||
- 'for_each_collection'
|
||||
- 'for_each_comp_order'
|
||||
- 'for_each_compatible_node'
|
||||
- 'for_each_component_dais'
|
||||
- 'for_each_component_dais_safe'
|
||||
- 'for_each_console'
|
||||
- 'for_each_console_srcu'
|
||||
- 'for_each_cpu'
|
||||
- 'for_each_cpu_and'
|
||||
- 'for_each_cpu_wrap'
|
||||
- 'for_each_dapm_widgets'
|
||||
- 'for_each_dedup_cand'
|
||||
- 'for_each_dev_addr'
|
||||
- 'for_each_dev_scope'
|
||||
- 'for_each_dma_cap_mask'
|
||||
- 'for_each_dpcm_be'
|
||||
- 'for_each_dpcm_be_rollback'
|
||||
- 'for_each_dpcm_be_safe'
|
||||
- 'for_each_dpcm_fe'
|
||||
- 'for_each_drhd_unit'
|
||||
- 'for_each_dss_dev'
|
||||
- 'for_each_efi_memory_desc'
|
||||
- 'for_each_efi_memory_desc_in_map'
|
||||
- 'for_each_element'
|
||||
- 'for_each_element_extid'
|
||||
- 'for_each_element_id'
|
||||
- 'for_each_endpoint_of_node'
|
||||
- 'for_each_event'
|
||||
- 'for_each_event_tps'
|
||||
- 'for_each_evictable_lru'
|
||||
- 'for_each_fib6_node_rt_rcu'
|
||||
- 'for_each_fib6_walker_rt'
|
||||
- 'for_each_free_mem_pfn_range_in_zone'
|
||||
- 'for_each_free_mem_pfn_range_in_zone_from'
|
||||
- 'for_each_free_mem_range'
|
||||
- 'for_each_free_mem_range_reverse'
|
||||
- 'for_each_func_rsrc'
|
||||
- 'for_each_group_device'
|
||||
- 'for_each_group_evsel'
|
||||
- 'for_each_group_member'
|
||||
- 'for_each_hstate'
|
||||
- 'for_each_if'
|
||||
- 'for_each_inject_fn'
|
||||
- 'for_each_insn'
|
||||
- 'for_each_insn_prefix'
|
||||
- 'for_each_intid'
|
||||
- 'for_each_iommu'
|
||||
- 'for_each_ip_tunnel_rcu'
|
||||
- 'for_each_irq_nr'
|
||||
- 'for_each_lang'
|
||||
- 'for_each_link_codecs'
|
||||
- 'for_each_link_cpus'
|
||||
- 'for_each_link_platforms'
|
||||
- 'for_each_lru'
|
||||
- 'for_each_matching_node'
|
||||
- 'for_each_matching_node_and_match'
|
||||
- 'for_each_mem_pfn_range'
|
||||
- 'for_each_mem_range'
|
||||
- 'for_each_mem_range_rev'
|
||||
- 'for_each_mem_region'
|
||||
- 'for_each_member'
|
||||
- 'for_each_memory'
|
||||
- 'for_each_migratetype_order'
|
||||
- 'for_each_missing_reg'
|
||||
- 'for_each_net'
|
||||
- 'for_each_net_continue_reverse'
|
||||
- 'for_each_net_rcu'
|
||||
- 'for_each_netdev'
|
||||
- 'for_each_netdev_continue'
|
||||
- 'for_each_netdev_continue_rcu'
|
||||
- 'for_each_netdev_continue_reverse'
|
||||
- 'for_each_netdev_feature'
|
||||
- 'for_each_netdev_in_bond_rcu'
|
||||
- 'for_each_netdev_rcu'
|
||||
- 'for_each_netdev_reverse'
|
||||
- 'for_each_netdev_safe'
|
||||
- 'for_each_new_connector_in_state'
|
||||
- 'for_each_new_crtc_in_state'
|
||||
- 'for_each_new_mst_mgr_in_state'
|
||||
- 'for_each_new_plane_in_state'
|
||||
- 'for_each_new_plane_in_state_reverse'
|
||||
- 'for_each_new_private_obj_in_state'
|
||||
- 'for_each_new_reg'
|
||||
- 'for_each_node'
|
||||
- 'for_each_node_by_name'
|
||||
- 'for_each_node_by_type'
|
||||
- 'for_each_node_mask'
|
||||
- 'for_each_node_state'
|
||||
- 'for_each_node_with_cpus'
|
||||
- 'for_each_node_with_property'
|
||||
- 'for_each_nonreserved_multicast_dest_pgid'
|
||||
- 'for_each_of_allnodes'
|
||||
- 'for_each_of_allnodes_from'
|
||||
- 'for_each_of_cpu_node'
|
||||
- 'for_each_of_pci_range'
|
||||
- 'for_each_old_connector_in_state'
|
||||
- 'for_each_old_crtc_in_state'
|
||||
- 'for_each_old_mst_mgr_in_state'
|
||||
- 'for_each_old_plane_in_state'
|
||||
- 'for_each_old_private_obj_in_state'
|
||||
- 'for_each_oldnew_connector_in_state'
|
||||
- 'for_each_oldnew_crtc_in_state'
|
||||
- 'for_each_oldnew_mst_mgr_in_state'
|
||||
- 'for_each_oldnew_plane_in_state'
|
||||
- 'for_each_oldnew_plane_in_state_reverse'
|
||||
- 'for_each_oldnew_private_obj_in_state'
|
||||
- 'for_each_online_cpu'
|
||||
- 'for_each_online_node'
|
||||
- 'for_each_online_pgdat'
|
||||
- 'for_each_path'
|
||||
- 'for_each_pci_bridge'
|
||||
- 'for_each_pci_dev'
|
||||
- 'for_each_pcm_streams'
|
||||
- 'for_each_physmem_range'
|
||||
- 'for_each_populated_zone'
|
||||
- 'for_each_possible_cpu'
|
||||
- 'for_each_present_cpu'
|
||||
- 'for_each_prime_number'
|
||||
- 'for_each_prime_number_from'
|
||||
- 'for_each_probe_cache_entry'
|
||||
- 'for_each_process'
|
||||
- 'for_each_process_thread'
|
||||
- 'for_each_prop_codec_conf'
|
||||
- 'for_each_prop_dai_codec'
|
||||
- 'for_each_prop_dai_cpu'
|
||||
- 'for_each_prop_dlc_codecs'
|
||||
- 'for_each_prop_dlc_cpus'
|
||||
- 'for_each_prop_dlc_platforms'
|
||||
- 'for_each_property_of_node'
|
||||
- 'for_each_reg'
|
||||
- 'for_each_reg_filtered'
|
||||
- 'for_each_registered_fb'
|
||||
- 'for_each_requested_gpio'
|
||||
- 'for_each_requested_gpio_in_range'
|
||||
- 'for_each_reserved_mem_range'
|
||||
- 'for_each_reserved_mem_region'
|
||||
- 'for_each_rtd_codec_dais'
|
||||
- 'for_each_rtd_components'
|
||||
- 'for_each_rtd_cpu_dais'
|
||||
- 'for_each_rtd_dais'
|
||||
- 'for_each_script'
|
||||
- 'for_each_sec'
|
||||
- 'for_each_set_bit'
|
||||
- 'for_each_set_bit_from'
|
||||
- 'for_each_set_bitrange'
|
||||
- 'for_each_set_bitrange_from'
|
||||
- 'for_each_set_clump8'
|
||||
- 'for_each_sg'
|
||||
- 'for_each_sg_dma_page'
|
||||
- 'for_each_sg_page'
|
||||
- 'for_each_sgtable_dma_page'
|
||||
- 'for_each_sgtable_dma_sg'
|
||||
- 'for_each_sgtable_page'
|
||||
- 'for_each_sgtable_sg'
|
||||
- 'for_each_shell_test'
|
||||
- 'for_each_sibling_event'
|
||||
- 'for_each_subelement'
|
||||
- 'for_each_subelement_extid'
|
||||
- 'for_each_subelement_id'
|
||||
- 'for_each_sublist'
|
||||
- 'for_each_subsystem'
|
||||
- 'for_each_supported_activate_fn'
|
||||
- 'for_each_supported_inject_fn'
|
||||
- 'for_each_test'
|
||||
- 'for_each_thread'
|
||||
- 'for_each_token'
|
||||
- 'for_each_unicast_dest_pgid'
|
||||
- 'for_each_vsi'
|
||||
- 'for_each_wakeup_source'
|
||||
- 'for_each_zone'
|
||||
- 'for_each_zone_zonelist'
|
||||
- 'for_each_zone_zonelist_nodemask'
|
||||
- 'func_for_each_insn'
|
||||
- 'fwnode_for_each_available_child_node'
|
||||
- 'fwnode_for_each_child_node'
|
||||
- 'fwnode_graph_for_each_endpoint'
|
||||
- 'gadget_for_each_ep'
|
||||
- 'genradix_for_each'
|
||||
- 'genradix_for_each_from'
|
||||
- 'hash_for_each'
|
||||
- 'hash_for_each_possible'
|
||||
- 'hash_for_each_possible_rcu'
|
||||
- 'hash_for_each_possible_rcu_notrace'
|
||||
- 'hash_for_each_possible_safe'
|
||||
- 'hash_for_each_rcu'
|
||||
- 'hash_for_each_safe'
|
||||
- 'hashmap__for_each_entry'
|
||||
- 'hashmap__for_each_entry_safe'
|
||||
- 'hashmap__for_each_key_entry'
|
||||
- 'hashmap__for_each_key_entry_safe'
|
||||
- 'hctx_for_each_ctx'
|
||||
- 'hists__for_each_format'
|
||||
- 'hists__for_each_sort_list'
|
||||
- 'hlist_bl_for_each_entry'
|
||||
- 'hlist_bl_for_each_entry_rcu'
|
||||
- 'hlist_bl_for_each_entry_safe'
|
||||
- 'hlist_for_each'
|
||||
- 'hlist_for_each_entry'
|
||||
- 'hlist_for_each_entry_continue'
|
||||
- 'hlist_for_each_entry_continue_rcu'
|
||||
- 'hlist_for_each_entry_continue_rcu_bh'
|
||||
- 'hlist_for_each_entry_from'
|
||||
- 'hlist_for_each_entry_from_rcu'
|
||||
- 'hlist_for_each_entry_rcu'
|
||||
- 'hlist_for_each_entry_rcu_bh'
|
||||
- 'hlist_for_each_entry_rcu_notrace'
|
||||
- 'hlist_for_each_entry_safe'
|
||||
- 'hlist_for_each_entry_srcu'
|
||||
- 'hlist_for_each_safe'
|
||||
- 'hlist_nulls_for_each_entry'
|
||||
- 'hlist_nulls_for_each_entry_from'
|
||||
- 'hlist_nulls_for_each_entry_rcu'
|
||||
- 'hlist_nulls_for_each_entry_safe'
|
||||
- 'i3c_bus_for_each_i2cdev'
|
||||
- 'i3c_bus_for_each_i3cdev'
|
||||
- 'idr_for_each_entry'
|
||||
- 'idr_for_each_entry_continue'
|
||||
- 'idr_for_each_entry_continue_ul'
|
||||
- 'idr_for_each_entry_ul'
|
||||
- 'in_dev_for_each_ifa_rcu'
|
||||
- 'in_dev_for_each_ifa_rtnl'
|
||||
- 'inet_bind_bucket_for_each'
|
||||
- 'inet_lhash2_for_each_icsk'
|
||||
- 'inet_lhash2_for_each_icsk_continue'
|
||||
- 'inet_lhash2_for_each_icsk_rcu'
|
||||
- 'interval_tree_for_each_double_span'
|
||||
- 'interval_tree_for_each_span'
|
||||
- 'intlist__for_each_entry'
|
||||
- 'intlist__for_each_entry_safe'
|
||||
- 'iopt_for_each_contig_area'
|
||||
- 'kcore_copy__for_each_phdr'
|
||||
- 'key_for_each'
|
||||
- 'key_for_each_safe'
|
||||
- 'klp_for_each_func'
|
||||
- 'klp_for_each_func_safe'
|
||||
- 'klp_for_each_func_static'
|
||||
- 'klp_for_each_object'
|
||||
- 'klp_for_each_object_safe'
|
||||
- 'klp_for_each_object_static'
|
||||
- 'kunit_suite_for_each_test_case'
|
||||
- 'kvm_for_each_memslot'
|
||||
- 'kvm_for_each_memslot_in_gfn_range'
|
||||
- 'kvm_for_each_vcpu'
|
||||
- 'libbpf_nla_for_each_attr'
|
||||
- 'list_for_each'
|
||||
- 'list_for_each_codec'
|
||||
- 'list_for_each_codec_safe'
|
||||
- 'list_for_each_continue'
|
||||
- 'list_for_each_entry'
|
||||
- 'list_for_each_entry_continue'
|
||||
- 'list_for_each_entry_continue_rcu'
|
||||
- 'list_for_each_entry_continue_reverse'
|
||||
- 'list_for_each_entry_from'
|
||||
- 'list_for_each_entry_from_rcu'
|
||||
- 'list_for_each_entry_from_reverse'
|
||||
- 'list_for_each_entry_lockless'
|
||||
- 'list_for_each_entry_rcu'
|
||||
- 'list_for_each_entry_reverse'
|
||||
- 'list_for_each_entry_safe'
|
||||
- 'list_for_each_entry_safe_continue'
|
||||
- 'list_for_each_entry_safe_from'
|
||||
- 'list_for_each_entry_safe_reverse'
|
||||
- 'list_for_each_entry_srcu'
|
||||
- 'list_for_each_from'
|
||||
- 'list_for_each_prev'
|
||||
- 'list_for_each_prev_safe'
|
||||
- 'list_for_each_safe'
|
||||
- 'llist_for_each'
|
||||
- 'llist_for_each_entry'
|
||||
- 'llist_for_each_entry_safe'
|
||||
- 'llist_for_each_safe'
|
||||
- 'map__for_each_symbol'
|
||||
- 'map__for_each_symbol_by_name'
|
||||
- 'map_for_each_event'
|
||||
- 'map_for_each_metric'
|
||||
- 'maps__for_each_entry'
|
||||
- 'maps__for_each_entry_safe'
|
||||
- 'mci_for_each_dimm'
|
||||
- 'media_device_for_each_entity'
|
||||
- 'media_device_for_each_intf'
|
||||
- 'media_device_for_each_link'
|
||||
- 'media_device_for_each_pad'
|
||||
- 'msi_for_each_desc'
|
||||
- 'nanddev_io_for_each_page'
|
||||
- 'netdev_for_each_lower_dev'
|
||||
- 'netdev_for_each_lower_private'
|
||||
- 'netdev_for_each_lower_private_rcu'
|
||||
- 'netdev_for_each_mc_addr'
|
||||
- 'netdev_for_each_uc_addr'
|
||||
- 'netdev_for_each_upper_dev_rcu'
|
||||
- 'netdev_hw_addr_list_for_each'
|
||||
- 'nft_rule_for_each_expr'
|
||||
- 'nla_for_each_attr'
|
||||
- 'nla_for_each_nested'
|
||||
- 'nlmsg_for_each_attr'
|
||||
- 'nlmsg_for_each_msg'
|
||||
- 'nr_neigh_for_each'
|
||||
- 'nr_neigh_for_each_safe'
|
||||
- 'nr_node_for_each'
|
||||
- 'nr_node_for_each_safe'
|
||||
- 'of_for_each_phandle'
|
||||
- 'of_property_for_each_string'
|
||||
- 'of_property_for_each_u32'
|
||||
- 'pci_bus_for_each_resource'
|
||||
- 'pci_dev_for_each_resource'
|
||||
- 'pcl_for_each_chunk'
|
||||
- 'pcl_for_each_segment'
|
||||
- 'pcm_for_each_format'
|
||||
- 'perf_config_items__for_each_entry'
|
||||
- 'perf_config_sections__for_each_entry'
|
||||
- 'perf_config_set__for_each_entry'
|
||||
- 'perf_cpu_map__for_each_cpu'
|
||||
- 'perf_evlist__for_each_entry'
|
||||
- 'perf_evlist__for_each_entry_reverse'
|
||||
- 'perf_evlist__for_each_entry_safe'
|
||||
- 'perf_evlist__for_each_evsel'
|
||||
- 'perf_evlist__for_each_mmap'
|
||||
- 'perf_hpp_list__for_each_format'
|
||||
- 'perf_hpp_list__for_each_format_safe'
|
||||
- 'perf_hpp_list__for_each_sort_list'
|
||||
- 'perf_hpp_list__for_each_sort_list_safe'
|
||||
- 'perf_pmu__for_each_hybrid_pmu'
|
||||
- 'ping_portaddr_for_each_entry'
|
||||
- 'ping_portaddr_for_each_entry_rcu'
|
||||
- 'plist_for_each'
|
||||
- 'plist_for_each_continue'
|
||||
- 'plist_for_each_entry'
|
||||
- 'plist_for_each_entry_continue'
|
||||
- 'plist_for_each_entry_safe'
|
||||
- 'plist_for_each_safe'
|
||||
- 'pnp_for_each_card'
|
||||
- 'pnp_for_each_dev'
|
||||
- 'protocol_for_each_card'
|
||||
- 'protocol_for_each_dev'
|
||||
- 'queue_for_each_hw_ctx'
|
||||
- 'radix_tree_for_each_slot'
|
||||
- 'radix_tree_for_each_tagged'
|
||||
- 'rb_for_each'
|
||||
- 'rbtree_postorder_for_each_entry_safe'
|
||||
- 'rdma_for_each_block'
|
||||
- 'rdma_for_each_port'
|
||||
- 'rdma_umem_for_each_dma_block'
|
||||
- 'resort_rb__for_each_entry'
|
||||
- 'resource_list_for_each_entry'
|
||||
- 'resource_list_for_each_entry_safe'
|
||||
- 'rhl_for_each_entry_rcu'
|
||||
- 'rhl_for_each_rcu'
|
||||
- 'rht_for_each'
|
||||
- 'rht_for_each_entry'
|
||||
- 'rht_for_each_entry_from'
|
||||
- 'rht_for_each_entry_rcu'
|
||||
- 'rht_for_each_entry_rcu_from'
|
||||
- 'rht_for_each_entry_safe'
|
||||
- 'rht_for_each_from'
|
||||
- 'rht_for_each_rcu'
|
||||
- 'rht_for_each_rcu_from'
|
||||
- 'rq_for_each_bvec'
|
||||
- 'rq_for_each_segment'
|
||||
- 'rq_list_for_each'
|
||||
- 'rq_list_for_each_safe'
|
||||
- 'scsi_for_each_prot_sg'
|
||||
- 'scsi_for_each_sg'
|
||||
- 'sctp_for_each_hentry'
|
||||
- 'sctp_skb_for_each'
|
||||
- 'sec_for_each_insn'
|
||||
- 'sec_for_each_insn_continue'
|
||||
- 'sec_for_each_insn_from'
|
||||
- 'shdma_for_each_chan'
|
||||
- 'shost_for_each_device'
|
||||
- 'sk_for_each'
|
||||
- 'sk_for_each_bound'
|
||||
- 'sk_for_each_entry_offset_rcu'
|
||||
- 'sk_for_each_from'
|
||||
- 'sk_for_each_rcu'
|
||||
- 'sk_for_each_safe'
|
||||
- 'sk_nulls_for_each'
|
||||
- 'sk_nulls_for_each_from'
|
||||
- 'sk_nulls_for_each_rcu'
|
||||
- 'snd_array_for_each'
|
||||
- 'snd_pcm_group_for_each_entry'
|
||||
- 'snd_soc_dapm_widget_for_each_path'
|
||||
- 'snd_soc_dapm_widget_for_each_path_safe'
|
||||
- 'snd_soc_dapm_widget_for_each_sink_path'
|
||||
- 'snd_soc_dapm_widget_for_each_source_path'
|
||||
- 'strlist__for_each_entry'
|
||||
- 'strlist__for_each_entry_safe'
|
||||
- 'sym_for_each_insn'
|
||||
- 'sym_for_each_insn_continue_reverse'
|
||||
- 'symbols__for_each_entry'
|
||||
- 'tb_property_for_each'
|
||||
- 'tcf_act_for_each_action'
|
||||
- 'tcf_exts_for_each_action'
|
||||
- 'udp_portaddr_for_each_entry'
|
||||
- 'udp_portaddr_for_each_entry_rcu'
|
||||
- 'usb_hub_for_each_child'
|
||||
- 'v4l2_device_for_each_subdev'
|
||||
- 'v4l2_m2m_for_each_dst_buf'
|
||||
- 'v4l2_m2m_for_each_dst_buf_safe'
|
||||
- 'v4l2_m2m_for_each_src_buf'
|
||||
- 'v4l2_m2m_for_each_src_buf_safe'
|
||||
- 'virtio_device_for_each_vq'
|
||||
- 'while_for_each_ftrace_op'
|
||||
- 'xa_for_each'
|
||||
- 'xa_for_each_marked'
|
||||
- 'xa_for_each_range'
|
||||
- 'xa_for_each_start'
|
||||
- 'xas_for_each'
|
||||
- 'xas_for_each_conflict'
|
||||
- 'xas_for_each_marked'
|
||||
- 'xbc_array_for_each_value'
|
||||
- 'xbc_for_each_key_value'
|
||||
- 'xbc_node_for_each_array_value'
|
||||
- 'xbc_node_for_each_child'
|
||||
- 'xbc_node_for_each_key_value'
|
||||
- 'xbc_node_for_each_subkey'
|
||||
- 'zorro_for_each_dev'
|
||||
|
||||
IncludeBlocks: Preserve
|
||||
IncludeCategories:
|
||||
- Regex: '.*'
|
||||
Priority: 1
|
||||
IncludeIsMainRegex: '(Test)?$'
|
||||
IndentCaseLabels: false
|
||||
IndentGotoLabels: false
|
||||
IndentPPDirectives: None
|
||||
IndentWidth: 8
|
||||
IndentWrappedFunctionNames: false
|
||||
JavaScriptQuotes: Leave
|
||||
JavaScriptWrapImports: true
|
||||
KeepEmptyLinesAtTheStartOfBlocks: false
|
||||
MacroBlockBegin: ''
|
||||
MacroBlockEnd: ''
|
||||
MaxEmptyLinesToKeep: 1
|
||||
NamespaceIndentation: None
|
||||
ObjCBinPackProtocolList: Auto
|
||||
ObjCBlockIndentWidth: 8
|
||||
ObjCSpaceAfterProperty: true
|
||||
ObjCSpaceBeforeProtocolList: true
|
||||
|
||||
# Taken from git's rules
|
||||
PenaltyBreakAssignment: 10
|
||||
PenaltyBreakBeforeFirstCallParameter: 30
|
||||
PenaltyBreakComment: 10
|
||||
PenaltyBreakFirstLessLess: 0
|
||||
PenaltyBreakString: 10
|
||||
PenaltyExcessCharacter: 100
|
||||
PenaltyReturnTypeOnItsOwnLine: 60
|
||||
|
||||
PointerAlignment: Right
|
||||
ReflowComments: false
|
||||
SortIncludes: false
|
||||
SortUsingDeclarations: false
|
||||
SpaceAfterCStyleCast: false
|
||||
SpaceAfterTemplateKeyword: true
|
||||
SpaceBeforeAssignmentOperators: true
|
||||
SpaceBeforeCtorInitializerColon: true
|
||||
SpaceBeforeInheritanceColon: true
|
||||
SpaceBeforeParens: ControlStatementsExceptForEachMacros
|
||||
SpaceBeforeRangeBasedForLoopColon: true
|
||||
SpaceInEmptyParentheses: false
|
||||
SpacesBeforeTrailingComments: 1
|
||||
SpacesInAngles: false
|
||||
SpacesInContainerLiterals: false
|
||||
SpacesInCStyleCastParentheses: false
|
||||
SpacesInParentheses: false
|
||||
SpacesInSquareBrackets: false
|
||||
Standard: Cpp03
|
||||
TabWidth: 8
|
||||
UseTab: Always
|
||||
...
|
||||
3
.cocciconfig
Normal file
3
.cocciconfig
Normal file
@@ -0,0 +1,3 @@
|
||||
[spatch]
|
||||
options = --timeout 200
|
||||
options = --use-gitgrep
|
||||
4
.get_maintainer.ignore
Normal file
4
.get_maintainer.ignore
Normal file
@@ -0,0 +1,4 @@
|
||||
Alan Cox <alan@lxorguk.ukuu.org.uk>
|
||||
Alan Cox <root@hraefn.swansea.linux.org.uk>
|
||||
Christoph Hellwig <hch@lst.de>
|
||||
Marc Gonzalez <marc.w.gonzalez@free.fr>
|
||||
5
.gitattributes
vendored
Normal file
5
.gitattributes
vendored
Normal file
@@ -0,0 +1,5 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
*.[ch] diff=cpp
|
||||
*.dts diff=dts
|
||||
*.dts[io] diff=dts
|
||||
*.rs diff=rust
|
||||
171
.gitignore
vendored
Normal file
171
.gitignore
vendored
Normal file
@@ -0,0 +1,171 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# NOTE! Don't add files that are generated in specific
|
||||
# subdirectories here. Add them in the ".gitignore" file
|
||||
# in that subdirectory instead.
|
||||
#
|
||||
# NOTE! Please use 'git ls-files -i -c --exclude-per-directory=.gitignore'
|
||||
# command after changing this file, to see if there are
|
||||
# any tracked files which get ignored after the change.
|
||||
#
|
||||
# Normal rules (sorted alphabetically)
|
||||
#
|
||||
.*
|
||||
*.a
|
||||
*.asn1.[ch]
|
||||
*.bin
|
||||
*.bz2
|
||||
*.c.[012]*.*
|
||||
*.dt.yaml
|
||||
*.dtb
|
||||
*.dtbo
|
||||
*.dtb.S
|
||||
*.dtbo.S
|
||||
*.dwo
|
||||
*.elf
|
||||
*.gcno
|
||||
*.gz
|
||||
*.i
|
||||
*.ko
|
||||
*.lex.c
|
||||
*.ll
|
||||
*.lst
|
||||
*.lz4
|
||||
*.lzma
|
||||
*.lzo
|
||||
*.mod
|
||||
*.mod.c
|
||||
*.o
|
||||
*.o.*
|
||||
*.patch
|
||||
*.rmeta
|
||||
*.rpm
|
||||
*.rsi
|
||||
*.s
|
||||
*.so
|
||||
*.so.dbg
|
||||
*.su
|
||||
*.symtypes
|
||||
*.symversions
|
||||
*.tab.[ch]
|
||||
*.tar
|
||||
*.xz
|
||||
*.zst
|
||||
Module.symvers
|
||||
modules.order
|
||||
|
||||
#
|
||||
# Top-level generic files
|
||||
#
|
||||
/linux
|
||||
/modules-only.symvers
|
||||
/vmlinux
|
||||
/vmlinux.32
|
||||
/vmlinux.map
|
||||
/vmlinux.symvers
|
||||
/vmlinux-gdb.py
|
||||
/vmlinuz
|
||||
/System.map
|
||||
/Module.markers
|
||||
/modules.builtin
|
||||
/modules.builtin.modinfo
|
||||
/modules.nsdeps
|
||||
|
||||
#
|
||||
# RPM spec file (make rpm-pkg)
|
||||
#
|
||||
/kernel.spec
|
||||
/rpmbuild/
|
||||
|
||||
#
|
||||
# Debian directory (make deb-pkg)
|
||||
#
|
||||
/debian/
|
||||
|
||||
#
|
||||
# Snap directory (make snap-pkg)
|
||||
#
|
||||
/snap/
|
||||
|
||||
#
|
||||
# tar directory (make tar*-pkg)
|
||||
#
|
||||
/tar-install/
|
||||
|
||||
#
|
||||
# We don't want to ignore the following even if they are dot-files
|
||||
#
|
||||
!.clang-format
|
||||
!.cocciconfig
|
||||
!.get_maintainer.ignore
|
||||
!.gitattributes
|
||||
!.gitignore
|
||||
!.kunitconfig
|
||||
!.mailmap
|
||||
!.rustfmt.toml
|
||||
|
||||
#
|
||||
# Generated include files
|
||||
#
|
||||
/include/config/
|
||||
/include/generated/
|
||||
/arch/*/include/generated/
|
||||
|
||||
# stgit generated dirs
|
||||
patches-*
|
||||
|
||||
# quilt's files
|
||||
patches
|
||||
series
|
||||
|
||||
# ctags files
|
||||
tags
|
||||
TAGS
|
||||
|
||||
# cscope files
|
||||
cscope.*
|
||||
ncscope.*
|
||||
|
||||
# gnu global files
|
||||
GPATH
|
||||
GRTAGS
|
||||
GSYMS
|
||||
GTAGS
|
||||
|
||||
# id-utils files
|
||||
ID
|
||||
|
||||
*~
|
||||
\#*#
|
||||
|
||||
#
|
||||
# Leavings from module signing
|
||||
#
|
||||
extra_certificates
|
||||
signing_key.pem
|
||||
signing_key.priv
|
||||
signing_key.x509
|
||||
x509.genkey
|
||||
|
||||
# Kconfig presets
|
||||
/all.config
|
||||
/alldef.config
|
||||
/allmod.config
|
||||
/allno.config
|
||||
/allrandom.config
|
||||
/allyes.config
|
||||
|
||||
# Kconfig savedefconfig output
|
||||
/defconfig
|
||||
|
||||
# Kdevelop4
|
||||
*.kdev4
|
||||
|
||||
# Clang's compilation database file
|
||||
/compile_commands.json
|
||||
|
||||
# Documentation toolchain
|
||||
sphinx_*/
|
||||
|
||||
# Rust analyzer configuration
|
||||
/rust-project.json
|
||||
629
.mailmap
Normal file
629
.mailmap
Normal file
@@ -0,0 +1,629 @@
|
||||
#
|
||||
# This list is used by git-shortlog to fix a few botched name translations
|
||||
# in the git archive, either because the author's full name was messed up
|
||||
# and/or not always written the same way, making contributions from the
|
||||
# same person appearing not to be so or badly displayed. Also allows for
|
||||
# old email addresses to map to new email addresses.
|
||||
#
|
||||
# For format details, see "man gitmailmap" or "MAPPING AUTHORS" in
|
||||
# "man git-shortlog" on older systems.
|
||||
#
|
||||
# Please keep this list dictionary sorted.
|
||||
#
|
||||
Aaron Durbin <adurbin@google.com>
|
||||
Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com>
|
||||
Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com>
|
||||
Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org>
|
||||
Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org>
|
||||
Ahmad Masri <quic_amasri@quicinc.com> <amasri@codeaurora.org>
|
||||
Adam Oldham <oldhamca@gmail.com>
|
||||
Adam Radford <aradford@gmail.com>
|
||||
Adriana Reus <adi.reus@gmail.com> <adriana.reus@intel.com>
|
||||
Adrian Bunk <bunk@stusta.de>
|
||||
Akhil P Oommen <quic_akhilpo@quicinc.com> <akhilpo@codeaurora.org>
|
||||
Alan Cox <alan@lxorguk.ukuu.org.uk>
|
||||
Alan Cox <root@hraefn.swansea.linux.org.uk>
|
||||
Aleksandar Markovic <aleksandar.markovic@mips.com> <aleksandar.markovic@imgtec.com>
|
||||
Aleksey Gorelov <aleksey_gorelov@phoenix.com>
|
||||
Alexander Lobakin <alobakin@pm.me> <alobakin@dlink.ru>
|
||||
Alexander Lobakin <alobakin@pm.me> <alobakin@marvell.com>
|
||||
Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru>
|
||||
Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo.com>
|
||||
Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>
|
||||
Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>
|
||||
Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com>
|
||||
Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>
|
||||
Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@fb.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
|
||||
Alex Hung <alexhung@gmail.com> <alex.hung@canonical.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@intel.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@linaro.org>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@linux.alibaba.com>
|
||||
Aloka Dixit <quic_alokad@quicinc.com> <alokad@codeaurora.org>
|
||||
Al Viro <viro@ftp.linux.org.uk>
|
||||
Al Viro <viro@zenIV.linux.org.uk>
|
||||
Amit Blay <quic_ablay@quicinc.com> <ablay@codeaurora.org>
|
||||
Amit Nischal <quic_anischal@quicinc.com> <anischal@codeaurora.org>
|
||||
Andi Kleen <ak@linux.intel.com> <ak@suse.de>
|
||||
Andi Shyti <andi@etezian.org> <andi.shyti@samsung.com>
|
||||
Andreas Herrmann <aherrman@de.ibm.com>
|
||||
Andrej Shadura <andrew.shadura@collabora.co.uk>
|
||||
Andrej Shadura <andrew@shadura.me> <andrew@beldisplaytech.com>
|
||||
Andrew Morton <akpm@linux-foundation.org>
|
||||
Andrew Murray <amurray@thegoodpenguin.co.uk> <amurray@embedded-bits.co.uk>
|
||||
Andrew Murray <amurray@thegoodpenguin.co.uk> <andrew.murray@arm.com>
|
||||
Andrew Vasquez <andrew.vasquez@qlogic.com>
|
||||
Andrey Konovalov <andreyknvl@gmail.com> <andreyknvl@google.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
|
||||
Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
|
||||
Andrzej Hajda <andrzej.hajda@intel.com> <a.hajda@samsung.com>
|
||||
André Almeida <andrealmeid@igalia.com> <andrealmeid@collabora.com>
|
||||
Andy Adamson <andros@citi.umich.edu>
|
||||
Anilkumar Kolli <quic_akolli@quicinc.com> <akolli@codeaurora.org>
|
||||
Anirudh Ghayal <quic_aghayal@quicinc.com> <aghayal@codeaurora.org>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com>
|
||||
Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com>
|
||||
Anup Patel <anup@brainfault.org> <anup.patel@wdc.com>
|
||||
Archit Taneja <archit@ti.com>
|
||||
Ard Biesheuvel <ardb@kernel.org> <ard.biesheuvel@linaro.org>
|
||||
Arnaud Patard <arnaud.patard@rtp-net.org>
|
||||
Arnd Bergmann <arnd@arndb.de>
|
||||
Arun Kumar Neelakantam <quic_aneela@quicinc.com> <aneela@codeaurora.org>
|
||||
Ashok Raj Nagarajan <quic_arnagara@quicinc.com> <arnagara@codeaurora.org>
|
||||
Ashwin Chaugule <quic_ashwinc@quicinc.com> <ashwinc@codeaurora.org>
|
||||
Asutosh Das <quic_asutoshd@quicinc.com> <asutoshd@codeaurora.org>
|
||||
Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
|
||||
Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org>
|
||||
Axel Dyks <xl@xlsigned.net>
|
||||
Axel Lin <axel.lin@gmail.com>
|
||||
Balakrishna Godavarthi <quic_bgodavar@quicinc.com> <bgodavar@codeaurora.org>
|
||||
Banajit Goswami <quic_bgoswami@quicinc.com> <bgoswami@codeaurora.org>
|
||||
Baochen Qiang <quic_bqiang@quicinc.com> <bqiang@codeaurora.org>
|
||||
Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@linaro.org>
|
||||
Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com>
|
||||
Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com>
|
||||
Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang7@gmail.com>
|
||||
Bart Van Assche <bvanassche@acm.org> <bart.vanassche@sandisk.com>
|
||||
Bart Van Assche <bvanassche@acm.org> <bart.vanassche@wdc.com>
|
||||
Bartosz Golaszewski <brgl@bgdev.pl> <bgolaszewski@baylibre.com>
|
||||
Ben Dooks <ben-linux@fluff.org> <ben.dooks@simtec.co.uk>
|
||||
Ben Dooks <ben-linux@fluff.org> <ben.dooks@sifive.com>
|
||||
Ben Gardner <bgardner@wabtec.com>
|
||||
Ben M Cahill <ben.m.cahill@intel.com>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <ben@bwidawsk.net>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <ben.widawsky@intel.com>
|
||||
Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
|
||||
Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
|
||||
Björn Steinbrink <B.Steinbrink@gmx.de>
|
||||
Björn Töpel <bjorn@kernel.org> <bjorn.topel@gmail.com>
|
||||
Björn Töpel <bjorn@kernel.org> <bjorn.topel@intel.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <b.brezillon.dev@gmail.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <b.brezillon@overkiz.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
|
||||
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
|
||||
Brendan Higgins <brendan.higgins@linux.dev> <brendanhiggins@google.com>
|
||||
Brian Avery <b.avery@hp.com>
|
||||
Brian King <brking@us.ibm.com>
|
||||
Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com>
|
||||
Cai Huoqing <cai.huoqing@linux.dev> <caihuoqing@baidu.com>
|
||||
Can Guo <quic_cang@quicinc.com> <cang@codeaurora.org>
|
||||
Carl Huang <quic_cjhuang@quicinc.com> <cjhuang@codeaurora.org>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
|
||||
Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
|
||||
Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
|
||||
Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com>
|
||||
Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org>
|
||||
Chris Lew <quic_clew@quicinc.com> <clew@codeaurora.org>
|
||||
Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com>
|
||||
Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com>
|
||||
Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com>
|
||||
Christian Brauner <brauner@kernel.org> <christian@brauner.io>
|
||||
Christian Brauner <brauner@kernel.org> <christian.brauner@canonical.com>
|
||||
Christian Brauner <brauner@kernel.org> <christian.brauner@ubuntu.com>
|
||||
Christian Marangi <ansuelsmth@gmail.com>
|
||||
Christophe Ricard <christophe.ricard@gmail.com>
|
||||
Christoph Hellwig <hch@lst.de>
|
||||
Colin Ian King <colin.i.king@gmail.com> <colin.king@canonical.com>
|
||||
Corey Minyard <minyard@acm.org>
|
||||
Damian Hobson-Garcia <dhobsong@igel.co.jp>
|
||||
Dan Carpenter <error27@gmail.com> <dan.carpenter@oracle.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <danborkmann@googlemail.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <danborkmann@iogearbox.net>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <daniel.borkmann@tik.ee.ethz.ch>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
|
||||
David Brownell <david-b@pacbell.net>
|
||||
David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
|
||||
David Rheinsberg <david@readahead.eu> <dh.herrmann@gmail.com>
|
||||
David Rheinsberg <david@readahead.eu> <dh.herrmann@googlemail.com>
|
||||
David Rheinsberg <david@readahead.eu> <david.rheinsberg@gmail.com>
|
||||
David Woodhouse <dwmw2@shinybook.infradead.org>
|
||||
Dedy Lansky <quic_dlansky@quicinc.com> <dlansky@codeaurora.org>
|
||||
Deepak Kumar Singh <quic_deesin@quicinc.com> <deesin@codeaurora.org>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@mips.com>
|
||||
<dev.kurt@vandijck-laurijssen.be> <kurt.van.dijck@eia.be>
|
||||
Dikshita Agarwal <quic_dikshita@quicinc.com> <dikshita@codeaurora.org>
|
||||
Dmitry Baryshkov <dbaryshkov@gmail.com>
|
||||
Dmitry Baryshkov <dbaryshkov@gmail.com> <[dbaryshkov@gmail.com]>
|
||||
Dmitry Baryshkov <dbaryshkov@gmail.com> <dmitry_baryshkov@mentor.com>
|
||||
Dmitry Baryshkov <dbaryshkov@gmail.com> <dmitry_eremin@mentor.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <dima@arista.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com>
|
||||
Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com>
|
||||
Domen Puncer <domen@coderock.org>
|
||||
Douglas Gilbert <dougg@torque.net>
|
||||
Ed L. Cashin <ecashin@coraid.com>
|
||||
Elliot Berman <quic_eberman@quicinc.com> <eberman@codeaurora.org>
|
||||
Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com>
|
||||
Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com>
|
||||
Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
|
||||
Eugen Hristev <eugen.hristev@collabora.com> <eugen.hristev@microchip.com>
|
||||
Evgeniy Polyakov <johnpol@2ka.mipt.ru>
|
||||
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> <ezequiel@collabora.com>
|
||||
Faith Ekstrand <faith.ekstrand@collabora.com> <jason@jlekstrand.net>
|
||||
Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@intel.com>
|
||||
Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@collabora.com>
|
||||
Felipe W Damasio <felipewd@terra.com.br>
|
||||
Felix Kuhling <fxkuehl@gmx.de>
|
||||
Felix Moeller <felix@derklecks.de>
|
||||
Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org>
|
||||
Filipe Lautert <filipe@icewall.org>
|
||||
Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au>
|
||||
Franck Bui-Huu <vagabon.xyz@gmail.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frank.rowand@am.sony.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frank.rowand@sony.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com>
|
||||
Frank Rowand <frowand.list@gmail.com> <frowand@mvista.com>
|
||||
Frank Zago <fzago@systemfabricworks.com>
|
||||
Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com>
|
||||
Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com>
|
||||
Gao Xiang <xiang@kernel.org> <hsiangkao@linux.alibaba.com>
|
||||
Gao Xiang <xiang@kernel.org> <hsiangkao@redhat.com>
|
||||
Georgi Djakov <djakov@kernel.org> <georgi.djakov@linaro.org>
|
||||
Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@de.ibm.com>
|
||||
Gerald Schaefer <gerald.schaefer@linux.ibm.com> <gerald.schaefer@de.ibm.com>
|
||||
Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@linux.vnet.ibm.com>
|
||||
Greg Kroah-Hartman <greg@echidna.(none)>
|
||||
Greg Kroah-Hartman <gregkh@suse.de>
|
||||
Greg Kroah-Hartman <greg@kroah.com>
|
||||
Greg Kurz <groug@kaod.org> <gkurz@linux.vnet.ibm.com>
|
||||
Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>
|
||||
Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@linux.vnet.ibm.com>
|
||||
Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@canonical.com>
|
||||
Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> <gokulsri@codeaurora.org>
|
||||
Govindaraj Saminathan <quic_gsamin@quicinc.com> <gsamin@codeaurora.org>
|
||||
Guo Ren <guoren@kernel.org> <guoren@linux.alibaba.com>
|
||||
Guo Ren <guoren@kernel.org> <ren_guo@c-sky.com>
|
||||
Guru Das Srinagesh <quic_gurus@quicinc.com> <gurus@codeaurora.org>
|
||||
Gustavo Padovan <gustavo@las.ic.unicamp.br>
|
||||
Gustavo Padovan <padovan@profusion.mobi>
|
||||
Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org>
|
||||
Heiko Carstens <hca@linux.ibm.com> <h.carstens@de.ibm.com>
|
||||
Heiko Carstens <hca@linux.ibm.com> <heiko.carstens@de.ibm.com>
|
||||
Heiko Stuebner <heiko@sntech.de> <heiko.stuebner@bqreaders.com>
|
||||
Heiko Stuebner <heiko@sntech.de> <heiko.stuebner@theobroma-systems.com>
|
||||
Heiko Stuebner <heiko@sntech.de> <heiko.stuebner@vrull.eu>
|
||||
Henk Vergonet <Henk.Vergonet@gmail.com>
|
||||
Henrik Kretzschmar <henne@nachtwindheim.de>
|
||||
Henrik Rydberg <rydberg@bitmath.org>
|
||||
Herbert Xu <herbert@gondor.apana.org.au>
|
||||
Huacai Chen <chenhuacai@kernel.org> <chenhc@lemote.com>
|
||||
Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>
|
||||
J. Bruce Fields <bfields@fieldses.org> <bfields@redhat.com>
|
||||
J. Bruce Fields <bfields@fieldses.org> <bfields@citi.umich.edu>
|
||||
Jacob Shin <Jacob.Shin@amd.com>
|
||||
Jack Pham <quic_jackp@quicinc.com> <jackp@codeaurora.org>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@google.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk.kim@samsung.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@motorola.com>
|
||||
Jakub Kicinski <kuba@kernel.org> <jakub.kicinski@netronome.com>
|
||||
James Bottomley <jejb@mulgrave.(none)>
|
||||
James Bottomley <jejb@titanic.il.steeleye.com>
|
||||
James E Wilson <wilson@specifix.com>
|
||||
James Hogan <jhogan@kernel.org> <james@albanarts.com>
|
||||
James Hogan <jhogan@kernel.org> <james.hogan@imgtec.com>
|
||||
James Ketrenos <jketreno@io.(none)>
|
||||
Jan Glauber <jan.glauber@gmail.com> <jang@de.ibm.com>
|
||||
Jan Glauber <jan.glauber@gmail.com> <jang@linux.vnet.ibm.com>
|
||||
Jan Glauber <jan.glauber@gmail.com> <jglauber@cavium.com>
|
||||
Jarkko Sakkinen <jarkko@kernel.org> <jarkko.sakkinen@linux.intel.com>
|
||||
Jarkko Sakkinen <jarkko@kernel.org> <jarkko@profian.com>
|
||||
Jarkko Sakkinen <jarkko@kernel.org> <jarkko.sakkinen@tuni.fi>
|
||||
Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>
|
||||
Jason Gunthorpe <jgg@ziepe.ca> <jgg@nvidia.com>
|
||||
Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>
|
||||
<javier@osg.samsung.com> <javier.martinez@collabora.co.uk>
|
||||
Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jayachandranc@netlogicmicro.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jchandra@broadcom.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jchandra@digeo.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com>
|
||||
<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com>
|
||||
Jean Tourrilhes <jt@hpl.hp.com>
|
||||
Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org>
|
||||
Jeff Garzik <jgarzik@pretzel.yyz.us>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com>
|
||||
Jeffrey Hugo <quic_jhugo@quicinc.com> <jhugo@codeaurora.org>
|
||||
Jens Axboe <axboe@kernel.dk> <axboe@suse.de>
|
||||
Jens Axboe <axboe@kernel.dk> <jens.axboe@oracle.com>
|
||||
Jens Axboe <axboe@kernel.dk> <axboe@fb.com>
|
||||
Jens Axboe <axboe@kernel.dk> <axboe@meta.com>
|
||||
Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
|
||||
Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
|
||||
Jessica Zhang <quic_jesszhan@quicinc.com> <jesszhan@codeaurora.org>
|
||||
Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org>
|
||||
Jiri Pirko <jiri@resnulli.us> <jiri@nvidia.com>
|
||||
Jiri Pirko <jiri@resnulli.us> <jiri@mellanox.com>
|
||||
Jiri Pirko <jiri@resnulli.us> <jpirko@redhat.com>
|
||||
Jiri Slaby <jirislaby@kernel.org> <jirislaby@gmail.com>
|
||||
Jiri Slaby <jirislaby@kernel.org> <jslaby@novell.com>
|
||||
Jiri Slaby <jirislaby@kernel.org> <jslaby@suse.com>
|
||||
Jiri Slaby <jirislaby@kernel.org> <jslaby@suse.cz>
|
||||
Jiri Slaby <jirislaby@kernel.org> <xslaby@fi.muni.cz>
|
||||
Jisheng Zhang <jszhang@kernel.org> <jszhang@marvell.com>
|
||||
Jisheng Zhang <jszhang@kernel.org> <Jisheng.Zhang@synaptics.com>
|
||||
Jishnu Prakash <quic_jprakash@quicinc.com> <jprakash@codeaurora.org>
|
||||
Johan Hovold <johan@kernel.org> <jhovold@gmail.com>
|
||||
Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com>
|
||||
John Crispin <john@phrozen.org> <blogic@openwrt.org>
|
||||
John Fastabend <john.fastabend@gmail.com> <john.r.fastabend@intel.com>
|
||||
John Keeping <john@keeping.me.uk> <john@metanate.com>
|
||||
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
|
||||
John Stultz <johnstul@us.ibm.com>
|
||||
<jon.toppins+linux@gmail.com> <jtoppins@cumulusnetworks.com>
|
||||
<jon.toppins+linux@gmail.com> <jtoppins@redhat.com>
|
||||
Jonas Gorski <jonas.gorski@gmail.com> <jogo@openwrt.org>
|
||||
Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
|
||||
<josh@joshtriplett.org> <josh@freedesktop.org>
|
||||
<josh@joshtriplett.org> <josh@kernel.org>
|
||||
<josh@joshtriplett.org> <josht@linux.vnet.ibm.com>
|
||||
<josh@joshtriplett.org> <josht@us.ibm.com>
|
||||
<josh@joshtriplett.org> <josht@vnet.ibm.com>
|
||||
Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@redhat.com>
|
||||
Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@us.ibm.com>
|
||||
Jouni Malinen <quic_jouni@quicinc.com> <jouni@codeaurora.org>
|
||||
Juha Yrjola <at solidboot.com>
|
||||
Juha Yrjola <juha.yrjola@nokia.com>
|
||||
Juha Yrjola <juha.yrjola@solidboot.com>
|
||||
Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
|
||||
Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>
|
||||
Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
|
||||
Kalyan Thota <quic_kalyant@quicinc.com> <kalyan_t@codeaurora.org>
|
||||
Karthikeyan Periyasamy <quic_periyasa@quicinc.com> <periyasa@codeaurora.org>
|
||||
Kathiravan T <quic_kathirav@quicinc.com> <kathirav@codeaurora.org>
|
||||
Kay Sievers <kay.sievers@vrfy.org>
|
||||
Kees Cook <keescook@chromium.org> <kees.cook@canonical.com>
|
||||
Kees Cook <keescook@chromium.org> <keescook@google.com>
|
||||
Kees Cook <keescook@chromium.org> <kees@outflux.net>
|
||||
Kees Cook <keescook@chromium.org> <kees@ubuntu.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@intel.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@linux.intel.com>
|
||||
Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org>
|
||||
Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org>
|
||||
Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
||||
Koushik <raghavendra.koushik@neterion.com>
|
||||
Krishna Manikandan <quic_mkrishn@quicinc.com> <mkrishn@codeaurora.org>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@canonical.com>
|
||||
Kshitiz Godara <quic_kgodara@quicinc.com> <kgodara@codeaurora.org>
|
||||
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
Kuogee Hsieh <quic_khsieh@quicinc.com> <khsieh@codeaurora.org>
|
||||
Lee Jones <lee@kernel.org> <joneslee@google.com>
|
||||
Lee Jones <lee@kernel.org> <lee.jones@canonical.com>
|
||||
Lee Jones <lee@kernel.org> <lee.jones@linaro.org>
|
||||
Lee Jones <lee@kernel.org> <lee@ubuntu.com>
|
||||
Leonard Crestez <leonard.crestez@nxp.com> Leonard Crestez <cdleonard@gmail.com>
|
||||
Leonardo Bras <leobras.c@gmail.com> <leonardo@linux.ibm.com>
|
||||
Leonard Göhrs <l.goehrs@pengutronix.de>
|
||||
Leonid I Ananiev <leonid.i.ananiev@intel.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leon@leon.nu>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@mellanox.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@nvidia.com>
|
||||
Liam Mark <quic_lmark@quicinc.com> <lmark@codeaurora.org>
|
||||
Linas Vepstas <linas@austin.ibm.com>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
|
||||
<linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
|
||||
Lior David <quic_liord@quicinc.com> <liord@codeaurora.org>
|
||||
Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com>
|
||||
Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
|
||||
Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
|
||||
Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org>
|
||||
Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
|
||||
Maciej W. Rozycki <macro@orcam.me.uk> <macro@linux-mips.org>
|
||||
Maharaja Kennadyrajan <quic_mkenna@quicinc.com> <mkenna@codeaurora.org>
|
||||
Maheshwar Ajja <quic_majja@quicinc.com> <majja@codeaurora.org>
|
||||
Malathi Gottam <quic_mgottam@quicinc.com> <mgottam@codeaurora.org>
|
||||
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> <mpubbise@codeaurora.org>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannanece23@gmail.com>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannan.sadhasivam@linaro.org>
|
||||
Manoj Basapathi <quic_manojbm@quicinc.com> <manojbm@codeaurora.org>
|
||||
Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
|
||||
Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
|
||||
Marek Behún <kabel@kernel.org> <marek.behun@nic.cz>
|
||||
Marek Behún <kabel@kernel.org> Marek Behun <marek.behun@nic.cz>
|
||||
Mark Brown <broonie@sirena.org.uk>
|
||||
Mark Starovoytov <mstarovo@pm.me> <mstarovoitov@marvell.com>
|
||||
Markus Schneider-Pargmann <msp@baylibre.com> <mpa@pengutronix.de>
|
||||
Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com>
|
||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
|
||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@puri.sm>
|
||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
|
||||
Martyna Szapar-Mudlaw <martyna.szapar-mudlaw@linux.intel.com> <martyna.szapar-mudlaw@intel.com>
|
||||
Mathieu Othacehe <m.othacehe@gmail.com>
|
||||
Mat Martineau <martineau@kernel.org> <mathew.j.martineau@linux.intel.com>
|
||||
Mat Martineau <martineau@kernel.org> <mathewm@codeaurora.org>
|
||||
Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com>
|
||||
Matthew Wilcox <willy@infradead.org> <matthew@wil.cx>
|
||||
Matthew Wilcox <willy@infradead.org> <mawilcox@linuxonhyperv.com>
|
||||
Matthew Wilcox <willy@infradead.org> <mawilcox@microsoft.com>
|
||||
Matthew Wilcox <willy@infradead.org> <willy@debian.org>
|
||||
Matthew Wilcox <willy@infradead.org> <willy@linux.intel.com>
|
||||
Matthew Wilcox <willy@infradead.org> <willy@parisc-linux.org>
|
||||
Matthias Fuchs <socketcan@esd.eu> <matthias.fuchs@esd.eu>
|
||||
Matthieu Baerts <matttbe@kernel.org> <matthieu.baerts@tessares.net>
|
||||
Matthieu CASTET <castet.matthieu@free.fr>
|
||||
Matti Vaittinen <mazziesaccount@gmail.com> <matti.vaittinen@fi.rohmeurope.com>
|
||||
Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
|
||||
Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.com>
|
||||
Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com>
|
||||
Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com>
|
||||
Maulik Shah <quic_mkshah@quicinc.com> <mkshah@codeaurora.org>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@infradead.org>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@osg.samsung.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@redhat.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <m.chehab@samsung.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@s-opensource.com>
|
||||
Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@mellanox.com>
|
||||
Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@nvidia.com>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime@cerno.tech>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>
|
||||
Maya Erez <quic_merez@quicinc.com> <merez@codeaurora.org>
|
||||
Mayuresh Janorkar <mayur@ti.com>
|
||||
Md Sadre Alam <quic_mdalam@quicinc.com> <mdalam@codeaurora.org>
|
||||
Miaoqing Pan <quic_miaoqing@quicinc.com> <miaoqing@codeaurora.org>
|
||||
Michael Buesch <m@bues.ch>
|
||||
Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
|
||||
Michel Dänzer <michel@tungstengraphics.com>
|
||||
Michel Lespinasse <michel@lespinasse.org>
|
||||
Michel Lespinasse <michel@lespinasse.org> <walken@google.com>
|
||||
Michel Lespinasse <michel@lespinasse.org> <walken@zoy.org>
|
||||
Miguel Ojeda <ojeda@kernel.org> <miguel.ojeda.sandonis@gmail.com>
|
||||
Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
|
||||
Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
|
||||
Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com>
|
||||
Mike Tipton <quic_mdtipton@quicinc.com> <mdtipton@codeaurora.org>
|
||||
Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
|
||||
Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>
|
||||
Mitesh shah <mshah@teja.com>
|
||||
Mohit Kumar <mohit.kumar@st.com> <mohit.kumar.dhaka@gmail.com>
|
||||
Morten Welinder <terra@gnome.org>
|
||||
Morten Welinder <welinder@anemone.rentec.com>
|
||||
Morten Welinder <welinder@darter.rentec.com>
|
||||
Morten Welinder <welinder@troll.com>
|
||||
Mukesh Ojha <quic_mojha@quicinc.com> <mojha@codeaurora.org>
|
||||
Muna Sinada <quic_msinada@quicinc.com> <msinada@codeaurora.org>
|
||||
Murali Nalajala <quic_mnalajal@quicinc.com> <mnalajal@codeaurora.org>
|
||||
Mythri P K <mythripk@ti.com>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
Nguyen Anh Quynh <aquynh@gmail.com>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggen@suse.de>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggin@kernel.dk>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggin@suse.de>
|
||||
Nicholas Piggin <npiggin@gmail.com> <nickpiggin@yahoo.com.au>
|
||||
Nicholas Piggin <npiggin@gmail.com> <piggin@cyberone.com.au>
|
||||
Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com>
|
||||
Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org>
|
||||
Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>
|
||||
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de>
|
||||
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.com>
|
||||
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <naleksan@redhat.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@redhat.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@cumulusnetworks.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@nvidia.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@isovalent.com>
|
||||
Odelu Kukatla <quic_okukatla@quicinc.com> <okukatla@codeaurora.org>
|
||||
Oleksandr Natalenko <oleksandr@natalenko.name> <oleksandr@redhat.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com>
|
||||
Oleksij Rempel <o.rempel@pengutronix.de>
|
||||
Oleksij Rempel <o.rempel@pengutronix.de> <ore@pengutronix.de>
|
||||
Oliver Upton <oliver.upton@linux.dev> <oupton@google.com>
|
||||
Ondřej Jirman <megi@xff.cz> <megous@megous.com>
|
||||
Oza Pawandeep <quic_poza@quicinc.com> <poza@codeaurora.org>
|
||||
Pali Rohár <pali@kernel.org> <pali.rohar@gmail.com>
|
||||
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
|
||||
Patrick Mochel <mochel@digitalimplant.org>
|
||||
Paul Burton <paulburton@kernel.org> <paul.burton@imgtec.com>
|
||||
Paul Burton <paulburton@kernel.org> <paul.burton@mips.com>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paul.mckenney@linaro.org>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paulmck@linux.ibm.com>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paulmck@linux.vnet.ibm.com>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paulmck@us.ibm.com>
|
||||
Paul Mackerras <paulus@ozlabs.org> <paulus@samba.org>
|
||||
Paul Mackerras <paulus@ozlabs.org> <paulus@au1.ibm.com>
|
||||
Pavankumar Kondeti <quic_pkondeti@quicinc.com> <pkondeti@codeaurora.org>
|
||||
Peter A Jonsson <pj@ludd.ltu.se>
|
||||
Peter Oruba <peter.oruba@amd.com>
|
||||
Peter Oruba <peter@oruba.de>
|
||||
Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
|
||||
Praveen BP <praveenbp@ti.com>
|
||||
Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com> <pradeepc@codeaurora.org>
|
||||
Prasad Sodagudi <quic_psodagud@quicinc.com> <psodagud@codeaurora.org>
|
||||
Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@imgtec.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@arm.com>
|
||||
Quentin Monnet <quentin@isovalent.com> <quentin.monnet@netronome.com>
|
||||
Quentin Perret <qperret@qperret.net> <quentin.perret@arm.com>
|
||||
Rafael J. Wysocki <rjw@rjwysocki.net> <rjw@sisk.pl>
|
||||
Rajeev Nandan <quic_rajeevny@quicinc.com> <rajeevny@codeaurora.org>
|
||||
Rajendra Nayak <quic_rjendra@quicinc.com> <rnayak@codeaurora.org>
|
||||
Rajeshwari Ravindra Kamble <quic_rkambl@quicinc.com> <rkambl@codeaurora.org>
|
||||
Raju P.L.S.S.S.N <quic_rplsssn@quicinc.com> <rplsssn@codeaurora.org>
|
||||
Rajesh Shah <rajesh.shah@intel.com>
|
||||
Rakesh Pillai <quic_pillair@quicinc.com> <pillair@codeaurora.org>
|
||||
Ralf Baechle <ralf@linux-mips.org>
|
||||
Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
||||
Ram Chandra Jangir <quic_rjangir@quicinc.com> <rjangir@codeaurora.org>
|
||||
Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net>
|
||||
Ravi Kumar Bokka <quic_rbokka@quicinc.com> <rbokka@codeaurora.org>
|
||||
Ravi Kumar Siddojigari <quic_rsiddoji@quicinc.com> <rsiddoji@codeaurora.org>
|
||||
Rémi Denis-Courmont <rdenis@simphalempin.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com>
|
||||
Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
|
||||
Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>
|
||||
Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru>
|
||||
Muchun Song <muchun.song@linux.dev> <songmuchun@bytedance.com>
|
||||
Muchun Song <muchun.song@linux.dev> <smuchun@gmail.com>
|
||||
Ross Zwisler <zwisler@kernel.org> <ross.zwisler@linux.intel.com>
|
||||
Rudolf Marek <R.Marek@sh.cvut.cz>
|
||||
Rui Saraiva <rmps@joel.ist.utl.pt>
|
||||
Sachin P Sant <ssant@in.ibm.com>
|
||||
Sai Prakash Ranjan <quic_saipraka@quicinc.com> <saiprakash.ranjan@codeaurora.org>
|
||||
Sakari Ailus <sakari.ailus@linux.intel.com> <sakari.ailus@iki.fi>
|
||||
Sam Ravnborg <sam@mars.ravnborg.org>
|
||||
Sankeerth Billakanti <quic_sbillaka@quicinc.com> <sbillaka@codeaurora.org>
|
||||
Santosh Shilimkar <santosh.shilimkar@oracle.org>
|
||||
Santosh Shilimkar <ssantosh@kernel.org>
|
||||
Sarangdhar Joshi <spjoshi@codeaurora.org>
|
||||
Sascha Hauer <s.hauer@pengutronix.de>
|
||||
Sahitya Tummala <quic_stummala@quicinc.com> <stummala@codeaurora.org>
|
||||
Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
|
||||
Satya Priya <quic_c_skakit@quicinc.com> <skakit@codeaurora.org>
|
||||
S.Çağlar Onur <caglar@pardus.org.tr>
|
||||
Sayali Lokhande <quic_sayalil@quicinc.com> <sayalil@codeaurora.org>
|
||||
Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com>
|
||||
Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
|
||||
Sean Tranchetti <quic_stranche@quicinc.com> <stranche@codeaurora.org>
|
||||
Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk>
|
||||
Sebastian Reichel <sre@kernel.org> <sre@debian.org>
|
||||
Sedat Dilek <sedat.dilek@gmail.com> <sedat.dilek@credativ.de>
|
||||
Senthilkumar N L <quic_snlakshm@quicinc.com> <snlakshm@codeaurora.org>
|
||||
Seth Forshee <sforshee@kernel.org> <seth.forshee@canonical.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <snelson@pensando.io>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@intel.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@oracle.com>
|
||||
Sharath Chandra Vurukala <quic_sharathv@quicinc.com> <sharathv@codeaurora.org>
|
||||
Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
|
||||
Sibi Sankar <quic_sibis@quicinc.com> <sibis@codeaurora.org>
|
||||
Sid Manning <quic_sidneym@quicinc.com> <sidneym@codeaurora.org>
|
||||
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
|
||||
Simon Horman <horms@kernel.org> <simon.horman@corigine.com>
|
||||
Simon Horman <horms@kernel.org> <simon.horman@netronome.com>
|
||||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org>
|
||||
Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>
|
||||
Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>
|
||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <shemminger@linux-foundation.org>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <shemminger@osdl.org>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <sthemmin@microsoft.com>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <sthemmin@vyatta.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com>
|
||||
Subash Abhinov Kasiviswanathan <quic_subashab@quicinc.com> <subashab@codeaurora.org>
|
||||
Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> <subbaram@codeaurora.org>
|
||||
Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Sudarshan Rajagopalan <quic_sudaraja@quicinc.com> <sudaraja@codeaurora.org>
|
||||
Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
|
||||
Sumit Semwal <sumit.semwal@ti.com>
|
||||
Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
|
||||
Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
|
||||
Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
|
||||
Tejun Heo <htejun@gmail.com>
|
||||
Thomas Graf <tgraf@suug.ch>
|
||||
Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
|
||||
Thomas Pedersen <twp@codeaurora.org>
|
||||
Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com>
|
||||
Tingwei Zhang <quic_tingwei@quicinc.com> <tingwei@codeaurora.org>
|
||||
Tirupathi Reddy <quic_tirupath@quicinc.com> <tirupath@codeaurora.org>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tobias.klauser@gmail.com>
|
||||
Tobias Klauser <tklauser@distanz.ch> <klto@zhaw.ch>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tklauser@nuerscht.ch>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tklauser@xenon.tklauser.home>
|
||||
Todor Tomov <todor.too@gmail.com> <todor.tomov@linaro.org>
|
||||
Tony Luck <tony.luck@intel.com>
|
||||
Trilok Soni <quic_tsoni@quicinc.com> <tsoni@codeaurora.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
|
||||
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
||||
Tudor Ambarus <tudor.ambarus@linaro.org> <tudor.ambarus@microchip.com>
|
||||
Tycho Andersen <tycho@tycho.pizza> <tycho@tycho.ws>
|
||||
Tzung-Bi Shih <tzungbi@kernel.org> <tzungbi@google.com>
|
||||
Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
|
||||
Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
|
||||
Uwe Kleine-König <ukleinek@strlen.de>
|
||||
Uwe Kleine-König <ukl@pengutronix.de>
|
||||
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
|
||||
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
||||
Vara Reddy <quic_varar@quicinc.com> <varar@codeaurora.org>
|
||||
Varadarajan Narayanan <quic_varada@quicinc.com> <varada@codeaurora.org>
|
||||
Vasanthakumar Thiagarajan <quic_vthiagar@quicinc.com> <vthiagar@codeaurora.org>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@virtuozzo.com>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@openvz.org>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@parallels.com>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@sw.ru>
|
||||
Valentin Schneider <vschneid@redhat.com> <valentin.schneider@arm.com>
|
||||
Veera Sundaram Sankaran <quic_veeras@quicinc.com> <veeras@codeaurora.org>
|
||||
Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> <vbadigan@codeaurora.org>
|
||||
Venkateswara Naralasetty <quic_vnaralas@quicinc.com> <vnaralas@codeaurora.org>
|
||||
Vikash Garodia <quic_vgarodia@quicinc.com> <vgarodia@codeaurora.org>
|
||||
Vinod Koul <vkoul@kernel.org> <vinod.koul@intel.com>
|
||||
Vinod Koul <vkoul@kernel.org> <vinod.koul@linux.intel.com>
|
||||
Vinod Koul <vkoul@kernel.org> <vkoul@infradead.org>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar2@arm.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.org>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.com>
|
||||
Vivek Aknurwar <quic_viveka@quicinc.com> <viveka@codeaurora.org>
|
||||
Vivien Didelot <vivien.didelot@gmail.com> <vivien.didelot@savoirfairelinux.com>
|
||||
Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
|
||||
WeiXiong Liao <gmpy.liaowx@gmail.com> <liaoweixiong@allwinnertech.com>
|
||||
Wen Gong <quic_wgong@quicinc.com> <wgong@codeaurora.org>
|
||||
Wesley Cheng <quic_wcheng@quicinc.com> <wcheng@codeaurora.org>
|
||||
Will Deacon <will@kernel.org> <will.deacon@arm.com>
|
||||
Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de>
|
||||
Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
|
||||
Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
|
||||
Yusuke Goda <goda.yusuke@renesas.com>
|
||||
Zhu Yanjun <zyjzyj2000@gmail.com> <yanjunz@nvidia.com>
|
||||
12
.rustfmt.toml
Normal file
12
.rustfmt.toml
Normal file
@@ -0,0 +1,12 @@
|
||||
edition = "2021"
|
||||
newline_style = "Unix"
|
||||
|
||||
# Unstable options that help catching some mistakes in formatting and that we may want to enable
|
||||
# when they become stable.
|
||||
#
|
||||
# They are kept here since they are useful to run from time to time.
|
||||
#format_code_in_doc_comments = true
|
||||
#reorder_impl_items = true
|
||||
#comment_width = 100
|
||||
#wrap_comments = true
|
||||
#normalize_comments = true
|
||||
303
BUILD.bazel
303
BUILD.bazel
@@ -3,6 +3,10 @@
|
||||
|
||||
load("@bazel_skylib//rules:copy_file.bzl", "copy_file")
|
||||
load("@bazel_skylib//rules:write_file.bzl", "write_file")
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
load("@rules_cc//cc:defs.bzl", "cc_library")
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
load("@rules_pkg//pkg:install.bzl", "pkg_install")
|
||||
load(
|
||||
"@rules_pkg//pkg:mappings.bzl",
|
||||
@@ -27,7 +31,16 @@ load(
|
||||
"merged_kernel_uapi_headers",
|
||||
)
|
||||
load(":abi.bzl", "cc_binary_with_abi")
|
||||
<<<<<<< HEAD
|
||||
load(":modules.bzl", "get_gki_modules_list", "get_kunit_modules_list")
|
||||
=======
|
||||
load(
|
||||
":modules.bzl",
|
||||
"get_gki_modules_list",
|
||||
"get_gki_protected_modules_list",
|
||||
"get_kunit_modules_list",
|
||||
)
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
package(
|
||||
default_visibility = [
|
||||
@@ -93,11 +106,26 @@ write_file(
|
||||
],
|
||||
)
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
write_file(
|
||||
name = "gki_aarch64_protected_modules",
|
||||
out = "android/gki_aarch64_protected_modules",
|
||||
content = get_gki_protected_modules_list("arm64") + [
|
||||
"", # Ensure new line at the end.
|
||||
],
|
||||
)
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
filegroup(
|
||||
name = "aarch64_additional_kmi_symbol_lists",
|
||||
srcs = [
|
||||
# keep sorted
|
||||
"android/abi_gki_aarch64_amlogic",
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
"android/abi_gki_aarch64_asr",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
"android/abi_gki_aarch64_asus",
|
||||
"android/abi_gki_aarch64_db845c",
|
||||
"android/abi_gki_aarch64_exynos",
|
||||
@@ -106,6 +134,7 @@ filegroup(
|
||||
"android/abi_gki_aarch64_galaxy",
|
||||
"android/abi_gki_aarch64_honor",
|
||||
"android/abi_gki_aarch64_imx",
|
||||
<<<<<<< HEAD
|
||||
"android/abi_gki_aarch64_lenovo",
|
||||
"android/abi_gki_aarch64_mtk",
|
||||
"android/abi_gki_aarch64_nothing",
|
||||
@@ -114,12 +143,32 @@ filegroup(
|
||||
"android/abi_gki_aarch64_qcom",
|
||||
"android/abi_gki_aarch64_sunxi",
|
||||
"android/abi_gki_aarch64_tcl",
|
||||
=======
|
||||
"android/abi_gki_aarch64_kunit",
|
||||
"android/abi_gki_aarch64_lenovo",
|
||||
"android/abi_gki_aarch64_mtk",
|
||||
"android/abi_gki_aarch64_mtktv",
|
||||
"android/abi_gki_aarch64_nothing",
|
||||
"android/abi_gki_aarch64_nvidia",
|
||||
"android/abi_gki_aarch64_oplus",
|
||||
"android/abi_gki_aarch64_paragon",
|
||||
"android/abi_gki_aarch64_pixel",
|
||||
"android/abi_gki_aarch64_pixel_watch",
|
||||
"android/abi_gki_aarch64_qcom",
|
||||
"android/abi_gki_aarch64_sunxi",
|
||||
"android/abi_gki_aarch64_tcl",
|
||||
"android/abi_gki_aarch64_transsion",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
"android/abi_gki_aarch64_tuxera",
|
||||
"android/abi_gki_aarch64_type_visibility",
|
||||
"android/abi_gki_aarch64_unisoc",
|
||||
"android/abi_gki_aarch64_virtual_device",
|
||||
"android/abi_gki_aarch64_vivo",
|
||||
"android/abi_gki_aarch64_xiaomi",
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
"android/abi_gki_aarch64_xiaomi_xring",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
],
|
||||
visibility = ["//visibility:public"],
|
||||
)
|
||||
@@ -131,7 +180,11 @@ define_common_kernels(target_configs = {
|
||||
"additional_kmi_symbol_lists": [":aarch64_additional_kmi_symbol_lists"],
|
||||
"trim_nonlisted_kmi": True,
|
||||
"protected_exports_list": "android/abi_gki_protected_exports_aarch64",
|
||||
<<<<<<< HEAD
|
||||
"protected_modules_list": "android/gki_aarch64_protected_modules",
|
||||
=======
|
||||
"protected_modules_list": ":gki_aarch64_protected_modules",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
"module_implicit_outs": get_gki_modules_list("arm64") + get_kunit_modules_list("arm64"),
|
||||
"make_goals": _GKI_AARCH64_MAKE_GOALS,
|
||||
"ddk_headers_archive": ":kernel_aarch64_ddk_headers_archive",
|
||||
@@ -141,10 +194,43 @@ define_common_kernels(target_configs = {
|
||||
],
|
||||
},
|
||||
"kernel_aarch64_16k": {
|
||||
<<<<<<< HEAD
|
||||
"kmi_symbol_list_strict_mode": False,
|
||||
"module_implicit_outs": get_gki_modules_list("arm64") + get_kunit_modules_list("arm64"),
|
||||
"make_goals": _GKI_AARCH64_MAKE_GOALS,
|
||||
"extra_dist": [":test_mappings_zip"],
|
||||
=======
|
||||
"kmi_symbol_list_strict_mode": True,
|
||||
"kmi_symbol_list": "android/abi_gki_aarch64",
|
||||
"additional_kmi_symbol_lists": [":aarch64_additional_kmi_symbol_lists"],
|
||||
"trim_nonlisted_kmi": True,
|
||||
"protected_exports_list": "android/abi_gki_protected_exports_aarch64",
|
||||
"protected_modules_list": ":gki_aarch64_protected_modules",
|
||||
"module_implicit_outs": get_gki_modules_list("arm64") + get_kunit_modules_list("arm64"),
|
||||
"make_goals": _GKI_AARCH64_MAKE_GOALS,
|
||||
"ddk_headers_archive": ":kernel_aarch64_ddk_headers_archive",
|
||||
"extra_dist": [
|
||||
":test_mappings_zip",
|
||||
":tests_zip_arm64",
|
||||
],
|
||||
},
|
||||
"kernel_aarch64_autofdo": {
|
||||
"kmi_symbol_list_strict_mode": True,
|
||||
"kmi_symbol_list": "android/abi_gki_aarch64",
|
||||
"additional_kmi_symbol_lists": [":aarch64_additional_kmi_symbol_lists"],
|
||||
"trim_nonlisted_kmi": True,
|
||||
"protected_exports_list": "android/abi_gki_protected_exports_aarch64",
|
||||
"protected_modules_list": ":gki_aarch64_protected_modules",
|
||||
"module_implicit_outs": get_gki_modules_list("arm64") + get_kunit_modules_list("arm64"),
|
||||
"make_goals": _GKI_AARCH64_MAKE_GOALS,
|
||||
"clang_autofdo_profile": ":android/gki/aarch64/afdo/kernel.afdo",
|
||||
"defconfig_fragments": ["arch/arm64/configs/autofdo_gki.fragment"],
|
||||
"ddk_headers_archive": ":kernel_aarch64_ddk_headers_archive",
|
||||
"extra_dist": [
|
||||
":test_mappings_zip",
|
||||
":tests_zip_arm64",
|
||||
],
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
},
|
||||
"kernel_x86_64": {
|
||||
"kmi_symbol_list_strict_mode": False,
|
||||
@@ -176,6 +262,55 @@ kernel_build(
|
||||
],
|
||||
)
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
kernel_build(
|
||||
name = "kernel_aarch64_microdroid_16k",
|
||||
srcs = ["//common:kernel_aarch64_sources"],
|
||||
outs = [
|
||||
"Image",
|
||||
"System.map",
|
||||
"modules.builtin",
|
||||
"modules.builtin.modinfo",
|
||||
"vmlinux",
|
||||
"vmlinux.symvers",
|
||||
],
|
||||
build_config = "build.config.microdroid.aarch64",
|
||||
make_goals = [
|
||||
"Image",
|
||||
],
|
||||
page_size = "16k",
|
||||
)
|
||||
|
||||
kernel_build(
|
||||
name = "kernel_aarch64_microdroid_minimal",
|
||||
srcs = ["//common:kernel_aarch64_sources"],
|
||||
outs = [
|
||||
"Image",
|
||||
"System.map",
|
||||
"modules.builtin",
|
||||
"modules.builtin.modinfo",
|
||||
"vmlinux",
|
||||
"vmlinux.symvers",
|
||||
],
|
||||
build_config = "build.config.microdroid.aarch64",
|
||||
defconfig_fragments = ["arch/arm64/configs/microdroid_minimal.fragment"],
|
||||
make_goals = [
|
||||
"Image",
|
||||
],
|
||||
)
|
||||
|
||||
copy_to_dist_dir(
|
||||
name = "kernel_aarch64_microdroid_16k_dist",
|
||||
data = [
|
||||
":kernel_aarch64_microdroid_16k",
|
||||
],
|
||||
dist_dir = "out/kernel_aarch64_microdroid_16k/dist",
|
||||
flat = True,
|
||||
log = "info",
|
||||
)
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
copy_to_dist_dir(
|
||||
name = "kernel_aarch64_microdroid_dist",
|
||||
data = [
|
||||
@@ -186,6 +321,19 @@ copy_to_dist_dir(
|
||||
log = "info",
|
||||
)
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
copy_to_dist_dir(
|
||||
name = "kernel_aarch64_microdroid_minimal_dist",
|
||||
data = [
|
||||
":kernel_aarch64_microdroid_minimal",
|
||||
],
|
||||
dist_dir = "out/kernel_aarch64_microdroid_minimal/dist",
|
||||
flat = True,
|
||||
log = "info",
|
||||
)
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
# Microdroid is not a real device. The kernel image is built with special
|
||||
# configs to reduce the size. Hence, not using mixed build.
|
||||
kernel_build(
|
||||
@@ -530,12 +678,17 @@ copy_to_dist_dir(
|
||||
":kernel_aarch64",
|
||||
":kernel_aarch64_modules",
|
||||
":kernel_aarch64_additional_artifacts",
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
":tests_zip_arm64",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
],
|
||||
dist_dir = "out/db845/dist",
|
||||
flat = True,
|
||||
log = "info",
|
||||
)
|
||||
|
||||
<<<<<<< HEAD
|
||||
load(":consolidate.bzl", "define_consolidate")
|
||||
|
||||
define_consolidate()
|
||||
@@ -544,6 +697,8 @@ load(":msm_platforms.bzl", "define_msm_platforms")
|
||||
|
||||
define_msm_platforms()
|
||||
|
||||
=======
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
_ROCKPI4_MODULE_OUTS = [
|
||||
# keep sorted
|
||||
"drivers/char/hw_random/virtio-rng.ko",
|
||||
@@ -591,7 +746,10 @@ _ROCKPI4_MODULE_OUTS = [
|
||||
"drivers/thermal/rockchip_thermal.ko",
|
||||
"drivers/usb/host/ohci-hcd.ko",
|
||||
"drivers/usb/host/ohci-platform.ko",
|
||||
<<<<<<< HEAD
|
||||
"drivers/virtio/virtio_pci_legacy_dev.ko",
|
||||
=======
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
"net/core/failover.ko",
|
||||
]
|
||||
|
||||
@@ -686,6 +844,10 @@ kernel_build(
|
||||
build_config = "build.config.gki.aarch64.fips140",
|
||||
kmi_symbol_list = "android/abi_gki_aarch64_fips140",
|
||||
module_outs = ["crypto/fips140.ko"],
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
strip_modules = True,
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
)
|
||||
|
||||
kernel_abi(
|
||||
@@ -838,6 +1000,19 @@ pkg_install(
|
||||
visibility = ["//visibility:private"],
|
||||
)
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
py_library(
|
||||
name = "kunit_parser",
|
||||
srcs = [
|
||||
"tools/testing/kunit/kunit_parser.py",
|
||||
"tools/testing/kunit/kunit_printer.py",
|
||||
],
|
||||
imports = ["tools/testing/kunit"],
|
||||
visibility = ["//visibility:public"],
|
||||
)
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
# DDK Headers
|
||||
# All headers. These are the public targets for DDK modules to use.
|
||||
alias(
|
||||
@@ -881,18 +1056,70 @@ ddk_headers(
|
||||
visibility = ["//visibility:public"],
|
||||
)
|
||||
|
||||
<<<<<<< HEAD
|
||||
# Implementation details for DDK headers. The targets below cannot be directly
|
||||
# depended on by DDK modules.
|
||||
|
||||
=======
|
||||
ddk_headers_archive(
|
||||
name = "kernel_x86_64_ddk_headers_archive",
|
||||
srcs = [
|
||||
"all_headers_x86_64",
|
||||
],
|
||||
visibility = ["//visibility:private"],
|
||||
)
|
||||
|
||||
# Implementation details for DDK headers. The targets below cannot be directly
|
||||
# depended on by DDK modules.
|
||||
|
||||
# Headers needed to include drivers/usb/host/xhci.h.
|
||||
ddk_headers(
|
||||
name = "xhci_headers",
|
||||
hdrs = [
|
||||
"drivers/usb/core/hub.h",
|
||||
"drivers/usb/core/usb.h",
|
||||
"drivers/usb/host/pci-quirks.h",
|
||||
"drivers/usb/host/xhci.h",
|
||||
"drivers/usb/host/xhci-caps.h",
|
||||
"drivers/usb/host/xhci-ext-caps.h",
|
||||
"drivers/usb/host/xhci-plat.h",
|
||||
"drivers/usb/host/xhci-port.h",
|
||||
],
|
||||
linux_includes = [
|
||||
"drivers/usb",
|
||||
"drivers/usb/host",
|
||||
],
|
||||
visibility = ["//visibility:private"],
|
||||
)
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
# DDK headers allowlist. This is the list of all headers and include
|
||||
# directories that are safe to use in DDK modules.
|
||||
ddk_headers(
|
||||
name = "all_headers_allowlist_aarch64",
|
||||
hdrs = [
|
||||
<<<<<<< HEAD
|
||||
"drivers/thermal/thermal_core.h",
|
||||
"drivers/thermal/thermal_netlink.h",
|
||||
":all_headers_allowlist_aarch64_globs",
|
||||
":all_headers_allowlist_common_globs",
|
||||
=======
|
||||
"drivers/dma-buf/heaps/deferred-free-helper.h",
|
||||
"drivers/dma/dmaengine.h",
|
||||
"drivers/extcon/extcon.h",
|
||||
"drivers/pci/controller/dwc/pcie-designware.h",
|
||||
"drivers/thermal/thermal_core.h",
|
||||
"drivers/thermal/thermal_netlink.h",
|
||||
"drivers/ufs/core/ufshcd-crypto.h",
|
||||
"drivers/ufs/core/ufshcd-priv.h",
|
||||
"drivers/ufs/host/ufshcd-pltfrm.h",
|
||||
"drivers/usb/dwc3/core.h",
|
||||
"sound/usb/card.h",
|
||||
"sound/usb/usbaudio.h",
|
||||
":all_headers_allowlist_aarch64_globs",
|
||||
":all_headers_allowlist_common_globs",
|
||||
":xhci_headers",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
],
|
||||
# The list of include directories where source files can #include headers
|
||||
# from. In other words, these are the `-I` option to the C compiler.
|
||||
@@ -900,7 +1127,18 @@ ddk_headers(
|
||||
linux_includes = [
|
||||
"arch/arm64/include",
|
||||
"arch/arm64/include/uapi",
|
||||
<<<<<<< HEAD
|
||||
"drivers/thermal",
|
||||
=======
|
||||
"drivers/dma-buf",
|
||||
"drivers/dma",
|
||||
"drivers/extcon",
|
||||
"drivers/pci/controller/dwc",
|
||||
"drivers/thermal",
|
||||
"drivers/ufs",
|
||||
"drivers/usb",
|
||||
"sound/usb",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
"include",
|
||||
"include/uapi",
|
||||
],
|
||||
@@ -986,16 +1224,24 @@ filegroup(
|
||||
ddk_headers(
|
||||
name = "all_headers_unsafe",
|
||||
hdrs = [
|
||||
<<<<<<< HEAD
|
||||
"drivers/devfreq/governor.h",
|
||||
"drivers/gpu/drm/virtio/virtgpu_trace.h",
|
||||
"mm/slab.h",
|
||||
=======
|
||||
"drivers/gpu/drm/virtio/virtgpu_trace.h",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
],
|
||||
# The list of include directories where source files can #include headers
|
||||
# from. In other words, these are the `-I` option to the C compiler.
|
||||
# Unsafe include directories are appended to ccflags-y.
|
||||
<<<<<<< HEAD
|
||||
includes = [
|
||||
"drivers/devfreq",
|
||||
],
|
||||
=======
|
||||
includes = [],
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
visibility = ["//visibility:private"],
|
||||
)
|
||||
|
||||
@@ -1006,6 +1252,7 @@ _KSELFTEST_COPTS = [
|
||||
"-pthread",
|
||||
"-std=gnu99",
|
||||
] + select({
|
||||
<<<<<<< HEAD
|
||||
":arm": ["-mcpu=cortex-a8"],
|
||||
"//conditions:default": [],
|
||||
})
|
||||
@@ -1034,6 +1281,12 @@ config_setting(
|
||||
visibility = ["//visibility:private"],
|
||||
)
|
||||
|
||||
=======
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_arm": ["-mcpu=cortex-a8"],
|
||||
"//conditions:default": [],
|
||||
})
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
cc_library(
|
||||
name = "kselftest_headers_lib",
|
||||
hdrs = glob(["tools/testing/selftests/*.h"]),
|
||||
@@ -1057,9 +1310,15 @@ cc_binary_with_abi(
|
||||
cc_binary_with_abi(
|
||||
name = "kselftest_breakpoints_breakpoint_test",
|
||||
srcs = select({
|
||||
<<<<<<< HEAD
|
||||
":x86_64": ["tools/testing/selftests/breakpoints/breakpoint_test.c"],
|
||||
":i386": ["tools/testing/selftests/breakpoints/breakpoint_test.c"],
|
||||
":arm64": ["tools/testing/selftests/breakpoints/breakpoint_test_arm64.c"],
|
||||
=======
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_x86_64": ["tools/testing/selftests/breakpoints/breakpoint_test.c"],
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_i386": ["tools/testing/selftests/breakpoints/breakpoint_test.c"],
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_arm64": ["tools/testing/selftests/breakpoints/breakpoint_test_arm64.c"],
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
"//conditions:default": [],
|
||||
}),
|
||||
copts = _KSELFTEST_COPTS,
|
||||
@@ -1331,6 +1590,31 @@ cc_binary_with_abi(
|
||||
],
|
||||
)
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
cc_library(
|
||||
name = "kselftest_memfd",
|
||||
srcs = ["tools/testing/selftests/memfd/common.c"],
|
||||
hdrs = ["tools/testing/selftests/memfd/common.h"],
|
||||
copts = _KSELFTEST_COPTS,
|
||||
visibility = ["//visibility:private"],
|
||||
deps = [
|
||||
":kselftest_headers_lib",
|
||||
],
|
||||
)
|
||||
|
||||
cc_binary_with_abi(
|
||||
name = "kselftest_memfd_test",
|
||||
srcs = ["tools/testing/selftests/memfd/memfd_test.c"],
|
||||
copts = _KSELFTEST_COPTS,
|
||||
includes = ["tools/testing/selftests"],
|
||||
path_prefix = _KSELFTEST_DIR,
|
||||
target_compatible_with = ["@platforms//os:android"],
|
||||
visibility = ["//visibility:private"],
|
||||
deps = [":kselftest_memfd"],
|
||||
)
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
cc_binary_with_abi(
|
||||
name = "kselftest_mm_compaction_test",
|
||||
srcs = ["tools/testing/selftests/mm/compaction_test.c"],
|
||||
@@ -1573,7 +1857,11 @@ cc_binary_with_abi(
|
||||
name = "kselftest_size_test_get_size",
|
||||
srcs = ["tools/testing/selftests/size/get_size.c"],
|
||||
copts = _KSELFTEST_COPTS + select({
|
||||
<<<<<<< HEAD
|
||||
":x86_64": ["-mstackrealign"],
|
||||
=======
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_x86_64": ["-mstackrealign"],
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
"//conditions:default": [],
|
||||
}),
|
||||
includes = [
|
||||
@@ -2013,10 +2301,17 @@ cc_binary_with_abi(
|
||||
copy_file(
|
||||
name = "kselftest_gen_config",
|
||||
src = select({
|
||||
<<<<<<< HEAD
|
||||
":x86_64": "tools/testing/selftests/android/config_x86_64.xml",
|
||||
":i386": "tools/testing/selftests/android/config_x86.xml",
|
||||
":arm64": "tools/testing/selftests/android/config_arm64.xml",
|
||||
":arm": "tools/testing/selftests/android/config_arm.xml",
|
||||
=======
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_x86_64": "tools/testing/selftests/android/config_x86_64.xml",
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_i386": "tools/testing/selftests/android/config_x86.xml",
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_arm64": "tools/testing/selftests/android/config_arm64.xml",
|
||||
"//build/kernel/kleaf/platforms/config_settings:android_arm": "tools/testing/selftests/android/config_arm.xml",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
}),
|
||||
out = _KSELFTEST_DIR + "/selftests.config",
|
||||
visibility = ["//visibility:private"],
|
||||
@@ -2040,6 +2335,10 @@ android_filegroup(
|
||||
":kselftest_futex_futex_wait_x86_64",
|
||||
":kselftest_gen_config",
|
||||
":kselftest_kcmp_kcmp_test_x86_64",
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
":kselftest_memfd_test_x86_64",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
":kselftest_mm_compaction_test_x86_64",
|
||||
":kselftest_mm_hugepage_mmap_x86_64",
|
||||
":kselftest_mm_hugepage_shm_x86_64",
|
||||
@@ -2244,6 +2543,10 @@ android_filegroup(
|
||||
":kselftest_futex_futex_wait_wouldblock_arm64",
|
||||
":kselftest_gen_config",
|
||||
":kselftest_kcmp_kcmp_test_arm64",
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
":kselftest_memfd_test_arm64",
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
":kselftest_mm_compaction_test_arm64",
|
||||
":kselftest_mm_hugepage_mmap_arm64",
|
||||
":kselftest_mm_hugepage_shm_arm64",
|
||||
|
||||
3
Documentation/.gitignore
vendored
Normal file
3
Documentation/.gitignore
vendored
Normal file
@@ -0,0 +1,3 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
output
|
||||
*.pyc
|
||||
@@ -101,6 +101,19 @@ Description:
|
||||
devices that support receiving integrity metadata.
|
||||
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
What: /sys/block/<disk>/partscan
|
||||
Date: May 2024
|
||||
Contact: Christoph Hellwig <hch@lst.de>
|
||||
Description:
|
||||
The /sys/block/<disk>/partscan files reports if partition
|
||||
scanning is enabled for the disk. It returns "1" if partition
|
||||
scanning is enabled, or "0" if not. The value type is a 32-bit
|
||||
unsigned integer, but only "0" and "1" are valid values.
|
||||
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
What: /sys/block/<disk>/<partition>/alignment_offset
|
||||
Date: April 2009
|
||||
Contact: Martin K. Petersen <martin.petersen@oracle.com>
|
||||
|
||||
@@ -270,6 +270,15 @@ Description: Shows the operation capability bits displayed in bitmap format
|
||||
correlates to the operations allowed. It's visible only
|
||||
on platforms that support the capability.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
What: /sys/bus/dsa/devices/wq<m>.<n>/driver_name
|
||||
Date: Sept 8, 2023
|
||||
KernelVersion: 6.7.0
|
||||
Contact: dmaengine@vger.kernel.org
|
||||
Description: Name of driver to be bounded to the wq.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
What: /sys/bus/dsa/devices/engine<m>.<n>/group_id
|
||||
Date: Oct 25, 2019
|
||||
KernelVersion: 5.6.0
|
||||
|
||||
@@ -342,6 +342,73 @@ Description: Specific uncompressed frame descriptors
|
||||
support
|
||||
========================= =====================================
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased
|
||||
Date: Sept 2024
|
||||
KernelVersion: 5.15
|
||||
Description: Framebased format descriptors
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name
|
||||
Date: Sept 2024
|
||||
KernelVersion: 5.15
|
||||
Description: Specific framebased format descriptors
|
||||
|
||||
================== =======================================
|
||||
bFormatIndex unique id for this format descriptor;
|
||||
only defined after parent header is
|
||||
linked into the streaming class;
|
||||
read-only
|
||||
bmaControls this format's data for bmaControls in
|
||||
the streaming header
|
||||
bmInterlaceFlags specifies interlace information,
|
||||
read-only
|
||||
bAspectRatioY the X dimension of the picture aspect
|
||||
ratio, read-only
|
||||
bAspectRatioX the Y dimension of the picture aspect
|
||||
ratio, read-only
|
||||
bDefaultFrameIndex optimum frame index for this stream
|
||||
bBitsPerPixel number of bits per pixel used to
|
||||
specify color in the decoded video
|
||||
frame
|
||||
guidFormat globally unique id used to identify
|
||||
stream-encoding format
|
||||
================== =======================================
|
||||
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/framebased/name/name
|
||||
Date: Sept 2024
|
||||
KernelVersion: 5.15
|
||||
Description: Specific framebased frame descriptors
|
||||
|
||||
========================= =====================================
|
||||
bFrameIndex unique id for this framedescriptor;
|
||||
only defined after parent format is
|
||||
linked into the streaming header;
|
||||
read-only
|
||||
dwFrameInterval indicates how frame interval can be
|
||||
programmed; a number of values
|
||||
separated by newline can be specified
|
||||
dwDefaultFrameInterval the frame interval the device would
|
||||
like to use as default
|
||||
dwBytesPerLine Specifies the number of bytes per line
|
||||
of video for packed fixed frame size
|
||||
formats, allowing the receiver to
|
||||
perform stride alignment of the video.
|
||||
If the bVariableSize value (above) is
|
||||
TRUE (1), or if the format does not
|
||||
permit such alignment, this value shall
|
||||
be set to zero (0).
|
||||
dwMaxBitRate the maximum bit rate at the shortest
|
||||
frame interval in bps
|
||||
dwMinBitRate the minimum bit rate at the longest
|
||||
frame interval in bps
|
||||
wHeight height of decoded bitmap frame in px
|
||||
wWidth width of decoded bitmam frame in px
|
||||
bmCapabilities still image support, fixed frame-rate
|
||||
support
|
||||
========================= =====================================
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header
|
||||
Date: Dec 2014
|
||||
KernelVersion: 4.0
|
||||
|
||||
@@ -3,7 +3,11 @@ KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
|
||||
Reading this returns the valid values that can be written to the
|
||||
<<<<<<< HEAD
|
||||
on_altvoltage0_mode attribute:
|
||||
=======
|
||||
filter_mode attribute:
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
- auto -> Adjust bandpass filter to track changes in input clock rate.
|
||||
- manual -> disable/unregister the clock rate notifier / input clock tracking.
|
||||
|
||||
@@ -163,6 +163,20 @@ Description:
|
||||
will be present in sysfs. Writing 1 to this file
|
||||
will perform reset.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
What: /sys/bus/pci/devices/.../reset_subordinate
|
||||
Date: October 2024
|
||||
Contact: linux-pci@vger.kernel.org
|
||||
Description:
|
||||
This is visible only for bridge devices. If you want to reset
|
||||
all devices attached through the subordinate bus of a specific
|
||||
bridge device, writing 1 to this will try to do it. This will
|
||||
affect all devices attached to the system through this bridge
|
||||
similiar to writing 1 to their individual "reset" file, so use
|
||||
with caution.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
What: /sys/bus/pci/devices/.../vpd
|
||||
Date: February 2008
|
||||
Contact: Ben Hutchings <bwh@kernel.org>
|
||||
|
||||
@@ -514,6 +514,10 @@ Description: information about CPUs heterogeneity.
|
||||
|
||||
What: /sys/devices/system/cpu/vulnerabilities
|
||||
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
/sys/devices/system/cpu/vulnerabilities/indirect_target_selection
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
|
||||
/sys/devices/system/cpu/vulnerabilities/l1tf
|
||||
/sys/devices/system/cpu/vulnerabilities/mds
|
||||
@@ -525,6 +529,10 @@ What: /sys/devices/system/cpu/vulnerabilities
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v1
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v2
|
||||
/sys/devices/system/cpu/vulnerabilities/srbds
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
/sys/devices/system/cpu/vulnerabilities/tsa
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
|
||||
Date: January 2018
|
||||
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
|
||||
@@ -565,7 +573,12 @@ Description: Control Symmetric Multi Threading (SMT)
|
||||
================ =========================================
|
||||
|
||||
If control status is "forceoff" or "notsupported" writes
|
||||
<<<<<<< HEAD
|
||||
are rejected.
|
||||
=======
|
||||
are rejected. Note that enabling SMT on PowerPC skips
|
||||
offline cores.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
What: /sys/devices/system/cpu/cpuX/power/energy_perf_bias
|
||||
Date: March 2019
|
||||
|
||||
@@ -711,7 +711,11 @@ Description: This file shows the thin provisioning type. This is one of
|
||||
|
||||
The file is read only.
|
||||
|
||||
<<<<<<< HEAD
|
||||
What: /sys/class/scsi_device/*/device/unit_descriptor/physical_memory_resourse_count
|
||||
=======
|
||||
What: /sys/class/scsi_device/*/device/unit_descriptor/physical_memory_resource_count
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
Date: February 2018
|
||||
Contact: Stanislav Nijnikov <stanislav.nijnikov@wdc.com>
|
||||
Description: This file shows the total physical memory resources. This is
|
||||
@@ -920,6 +924,7 @@ Description: This file shows whether the configuration descriptor is locked.
|
||||
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/attributes/max_number_of_rtt
|
||||
What: /sys/bus/platform/devices/*.ufs/attributes/max_number_of_rtt
|
||||
<<<<<<< HEAD
|
||||
Date: February 2018
|
||||
Contact: Stanislav Nijnikov <stanislav.nijnikov@wdc.com>
|
||||
Description: This file provides the maximum current number of
|
||||
@@ -928,6 +933,18 @@ Description: This file provides the maximum current number of
|
||||
UFS specifications 2.1.
|
||||
|
||||
The file is read only.
|
||||
=======
|
||||
Date: May 2024
|
||||
Contact: Avri Altman <avri.altman@wdc.com>
|
||||
Description: This file provides the maximum current number of
|
||||
outstanding RTTs in device that is allowed. bMaxNumOfRTT is a
|
||||
read-write persistent attribute and is equal to two after device
|
||||
manufacturing. It shall not be set to a value greater than
|
||||
bDeviceRTTCap value, and it may be set only when the hw queues are
|
||||
empty.
|
||||
|
||||
The file is read write.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/attributes/exception_event_control
|
||||
What: /sys/bus/platform/devices/*.ufs/attributes/exception_event_control
|
||||
|
||||
@@ -270,7 +270,11 @@ Description: Shows all enabled kernel features.
|
||||
inode_checksum, flexible_inline_xattr, quota_ino,
|
||||
inode_crtime, lost_found, verity, sb_checksum,
|
||||
casefold, readonly, compression, test_dummy_encryption_v2,
|
||||
<<<<<<< HEAD
|
||||
atomic_write, pin_file, encrypted_casefold.
|
||||
=======
|
||||
atomic_write, pin_file, encrypted_casefold, linear_lookup.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/inject_rate
|
||||
Date: May 2016
|
||||
@@ -311,10 +315,20 @@ Description: Do background GC aggressively when set. Set to 0 by default.
|
||||
GC approach and turns SSR mode on.
|
||||
gc urgent low(2): lowers the bar of checking I/O idling in
|
||||
order to process outstanding discard commands and GC a
|
||||
<<<<<<< HEAD
|
||||
little bit aggressively. uses cost benefit GC approach.
|
||||
gc urgent mid(3): does GC forcibly in a period of given
|
||||
gc_urgent_sleep_time and executes a mid level of I/O idling check.
|
||||
uses cost benefit GC approach.
|
||||
=======
|
||||
little bit aggressively. always uses cost benefit GC approach,
|
||||
and will override age-threshold GC approach if ATGC is enabled
|
||||
at the same time.
|
||||
gc urgent mid(3): does GC forcibly in a period of given
|
||||
gc_urgent_sleep_time and executes a mid level of I/O idling check.
|
||||
always uses cost benefit GC approach, and will override
|
||||
age-threshold GC approach if ATGC is enabled at the same time.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/gc_urgent_sleep_time
|
||||
Date: August 2017
|
||||
@@ -579,6 +593,15 @@ Description: When ATGC is on, it controls age threshold to bypass GCing young
|
||||
candidates whose age is not beyond the threshold, by default it was
|
||||
initialized as 604800 seconds (equals to 7 days).
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
What: /sys/fs/f2fs/<disk>/atgc_enabled
|
||||
Date: Feb 2024
|
||||
Contact: "Jinbao Liu" <liujinbao1@xiaomi.com>
|
||||
Description: It represents whether ATGC is on or off. The value is 1 which
|
||||
indicates that ATGC is on, and 0 indicates that it is off.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
What: /sys/fs/f2fs/<disk>/gc_reclaimed_segments
|
||||
Date: July 2021
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
@@ -763,3 +786,101 @@ Date: November 2023
|
||||
Contact: "Chao Yu" <chao@kernel.org>
|
||||
Description: It controls to enable/disable IO aware feature for background discard.
|
||||
By default, the value is 1 which indicates IO aware is on.
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/blkzone_alloc_policy
|
||||
Date: July 2024
|
||||
Contact: "Yuanhong Liao" <liaoyuanhong@vivo.com>
|
||||
Description: The zone UFS we are currently using consists of two parts:
|
||||
conventional zones and sequential zones. It can be used to control which part
|
||||
to prioritize for writes, with a default value of 0.
|
||||
|
||||
======================== =========================================
|
||||
value description
|
||||
blkzone_alloc_policy = 0 Prioritize writing to sequential zones
|
||||
blkzone_alloc_policy = 1 Only allow writing to sequential zones
|
||||
blkzone_alloc_policy = 2 Prioritize writing to conventional zones
|
||||
======================== =========================================
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/migration_window_granularity
|
||||
Date: September 2024
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
Description: Controls migration window granularity of garbage collection on large
|
||||
section. it can control the scanning window granularity for GC migration
|
||||
in a unit of segment, while migration_granularity controls the number
|
||||
of segments which can be migrated at the same turn.
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/reserved_segments
|
||||
Date: September 2024
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
Description: In order to fine tune GC behavior, we can control the number of
|
||||
reserved segments.
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/gc_no_zoned_gc_percent
|
||||
Date: September 2024
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
Description: If the percentage of free sections over total sections is above this
|
||||
number, F2FS do not garbage collection for zoned devices through the
|
||||
background GC thread. the default number is "60".
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/gc_boost_zoned_gc_percent
|
||||
Date: September 2024
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
Description: If the percentage of free sections over total sections is under this
|
||||
number, F2FS boosts garbage collection for zoned devices through the
|
||||
background GC thread. the default number is "25".
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/gc_valid_thresh_ratio
|
||||
Date: September 2024
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
Description: It controls the valid block ratio threshold not to trigger excessive GC
|
||||
for zoned deivces. The initial value of it is 95(%). F2FS will stop the
|
||||
background GC thread from intiating GC for sections having valid blocks
|
||||
exceeding the ratio.
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/max_read_extent_count
|
||||
Date: November 2024
|
||||
Contact: "Chao Yu" <chao@kernel.org>
|
||||
Description: It controls max read extent count for per-inode, the value of threshold
|
||||
is 10240 by default.
|
||||
|
||||
What: /sys/fs/f2fs/tuning/reclaim_caches_kb
|
||||
Date: February 2025
|
||||
Contact: "Jaegeuk Kim" <jaegeuk@kernel.org>
|
||||
Description: It reclaims the given KBs of file-backed pages registered by
|
||||
ioctl(F2FS_IOC_DONATE_RANGE).
|
||||
For example, writing N tries to drop N KBs spaces in LRU.
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/carve_out
|
||||
Date: March 2025
|
||||
Contact: "Daeho Jeong" <daehojeong@google.com>
|
||||
Description: For several zoned storage devices, vendors will provide extra space which
|
||||
was used for device level GC than specs and F2FS can use this space for
|
||||
filesystem level GC. To do that, we can reserve the space using
|
||||
reserved_blocks. However, it is not enough, since this extra space should
|
||||
not be shown to users. So, with this new sysfs node, we can hide the space
|
||||
by substracting reserved_blocks from total bytes.
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/encoding_flags
|
||||
Date: April 2025
|
||||
Contact: "Chao Yu" <chao@kernel.org>
|
||||
Description: This is a read-only entry to show the value of sb.s_encoding_flags, the
|
||||
value is hexadecimal.
|
||||
|
||||
============================ ==========
|
||||
Flag_Name Flag_Value
|
||||
============================ ==========
|
||||
SB_ENC_STRICT_MODE_FL 0x00000001
|
||||
SB_ENC_NO_COMPAT_FALLBACK_FL 0x00000002
|
||||
============================ ==========
|
||||
|
||||
What: /sys/fs/f2fs/<disk>/reserved_pin_section
|
||||
Date: June 2025
|
||||
Contact: "Chao Yu" <chao@kernel.org>
|
||||
Description: This threshold is used to control triggering garbage collection while
|
||||
fallocating on pinned file, so, it can guarantee there is enough free
|
||||
reserved section before preallocating on pinned file.
|
||||
By default, the value is ovp_sections, especially, for zoned ufs, the
|
||||
value is 1.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
@@ -1,7 +1,11 @@
|
||||
What: /sys/fs/xfs/<disk>/log/log_head_lsn
|
||||
Date: July 2014
|
||||
KernelVersion: 3.17
|
||||
<<<<<<< HEAD
|
||||
Contact: xfs@oss.sgi.com
|
||||
=======
|
||||
Contact: linux-xfs@vger.kernel.org
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
Description:
|
||||
The log sequence number (LSN) of the current head of the
|
||||
log. The LSN is exported in "cycle:basic block" format.
|
||||
@@ -10,7 +14,11 @@ Users: xfstests
|
||||
What: /sys/fs/xfs/<disk>/log/log_tail_lsn
|
||||
Date: July 2014
|
||||
KernelVersion: 3.17
|
||||
<<<<<<< HEAD
|
||||
Contact: xfs@oss.sgi.com
|
||||
=======
|
||||
Contact: linux-xfs@vger.kernel.org
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
Description:
|
||||
The log sequence number (LSN) of the current tail of the
|
||||
log. The LSN is exported in "cycle:basic block" format.
|
||||
@@ -18,7 +26,11 @@ Description:
|
||||
What: /sys/fs/xfs/<disk>/log/reserve_grant_head
|
||||
Date: July 2014
|
||||
KernelVersion: 3.17
|
||||
<<<<<<< HEAD
|
||||
Contact: xfs@oss.sgi.com
|
||||
=======
|
||||
Contact: linux-xfs@vger.kernel.org
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
Description:
|
||||
The current state of the log reserve grant head. It
|
||||
represents the total log reservation of all currently
|
||||
@@ -29,7 +41,11 @@ Users: xfstests
|
||||
What: /sys/fs/xfs/<disk>/log/write_grant_head
|
||||
Date: July 2014
|
||||
KernelVersion: 3.17
|
||||
<<<<<<< HEAD
|
||||
Contact: xfs@oss.sgi.com
|
||||
=======
|
||||
Contact: linux-xfs@vger.kernel.org
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
Description:
|
||||
The current state of the log write grant head. It
|
||||
represents the total log reservation of all currently
|
||||
|
||||
@@ -249,7 +249,11 @@ ticks this GP)" indicates that this CPU has not taken any scheduling-clock
|
||||
interrupts during the current stalled grace period.
|
||||
|
||||
The "idle=" portion of the message prints the dyntick-idle state.
|
||||
<<<<<<< HEAD
|
||||
The hex number before the first "/" is the low-order 12 bits of the
|
||||
=======
|
||||
The hex number before the first "/" is the low-order 16 bits of the
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
dynticks counter, which will have an even-numbered value if the CPU
|
||||
is in dyntick-idle mode and an odd-numbered value otherwise. The hex
|
||||
number between the two "/"s is the value of the nesting, which will be
|
||||
|
||||
@@ -328,7 +328,11 @@ as idle::
|
||||
From now on, any pages on zram are idle pages. The idle mark
|
||||
will be removed until someone requests access of the block.
|
||||
IOW, unless there is access request, those pages are still idle pages.
|
||||
<<<<<<< HEAD
|
||||
Additionally, when CONFIG_ZRAM_MEMORY_TRACKING is enabled pages can be
|
||||
=======
|
||||
Additionally, when CONFIG_ZRAM_TRACK_ENTRY_ACTIME is enabled pages can be
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
marked as idle based on how long (in seconds) it's been since they were
|
||||
last accessed::
|
||||
|
||||
|
||||
@@ -722,11 +722,16 @@ Configuration pseudo-files:
|
||||
======================= =======================================================
|
||||
SecurityFlags Flags which control security negotiation and
|
||||
also packet signing. Authentication (may/must)
|
||||
<<<<<<< HEAD
|
||||
flags (e.g. for NTLM and/or NTLMv2) may be combined with
|
||||
=======
|
||||
flags (e.g. for NTLMv2) may be combined with
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
the signing flags. Specifying two different password
|
||||
hashing mechanisms (as "must use") on the other hand
|
||||
does not make much sense. Default flags are::
|
||||
|
||||
<<<<<<< HEAD
|
||||
0x07007
|
||||
|
||||
(NTLM, NTLMv2 and packet signing allowed). The maximum
|
||||
@@ -756,6 +761,23 @@ SecurityFlags Flags which control security negotiation and
|
||||
may use plaintext passwords 0x00020
|
||||
must use plaintext passwords 0x20020
|
||||
(reserved for future packet encryption) 0x00040
|
||||
=======
|
||||
0x00C5
|
||||
|
||||
(NTLMv2 and packet signing allowed). Some SecurityFlags
|
||||
may require enabling a corresponding menuconfig option.
|
||||
|
||||
may use packet signing 0x00001
|
||||
must use packet signing 0x01001
|
||||
may use NTLMv2 0x00004
|
||||
must use NTLMv2 0x04004
|
||||
may use Kerberos security (krb5) 0x00008
|
||||
must use Kerberos 0x08008
|
||||
may use NTLMSSP 0x00080
|
||||
must use NTLMSSP 0x80080
|
||||
seal (packet encryption) 0x00040
|
||||
must seal 0x40040
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
cifsFYI If set to non-zero value, additional debug information
|
||||
will be logged to the system error log. This field
|
||||
|
||||
@@ -142,8 +142,20 @@ root_hash_sig_key_desc <key_description>
|
||||
already in the secondary trusted keyring.
|
||||
|
||||
try_verify_in_tasklet
|
||||
<<<<<<< HEAD
|
||||
If verity hashes are in cache, verify data blocks in kernel tasklet instead
|
||||
of workqueue. This option can reduce IO latency.
|
||||
=======
|
||||
If verity hashes are in cache and the IO size does not exceed the limit,
|
||||
verify data blocks in bottom half instead of workqueue. This option can
|
||||
reduce IO latency. The size limits can be configured via
|
||||
/sys/module/dm_verity/parameters/use_bh_bytes. The four parameters
|
||||
correspond to limits for IOPRIO_CLASS_NONE,IOPRIO_CLASS_RT,
|
||||
IOPRIO_CLASS_BE and IOPRIO_CLASS_IDLE in turn.
|
||||
For example:
|
||||
<none>,<rt>,<be>,<idle>
|
||||
4096,4096,4096,4096
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
Theory of operation
|
||||
===================
|
||||
|
||||
@@ -67,8 +67,13 @@ arg4:
|
||||
will be performed for all tasks in the task group of ``pid``.
|
||||
|
||||
arg5:
|
||||
<<<<<<< HEAD
|
||||
userspace pointer to an unsigned long for storing the cookie returned by
|
||||
``PR_SCHED_CORE_GET`` command. Should be 0 for all other commands.
|
||||
=======
|
||||
userspace pointer to an unsigned long long for storing the cookie returned
|
||||
by ``PR_SCHED_CORE_GET`` command. Should be 0 for all other commands.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
In order for a process to push a cookie to, or pull a cookie from a process, it
|
||||
is required to have the ptrace access mode: `PTRACE_MODE_READ_REALCREDS` to the
|
||||
|
||||
@@ -22,3 +22,7 @@ are configurable at compile, boot or run time.
|
||||
srso
|
||||
gather_data_sampling
|
||||
reg-file-data-sampling
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
indirect-target-selection
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
168
Documentation/admin-guide/hw-vuln/indirect-target-selection.rst
Normal file
168
Documentation/admin-guide/hw-vuln/indirect-target-selection.rst
Normal file
@@ -0,0 +1,168 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
Indirect Target Selection (ITS)
|
||||
===============================
|
||||
|
||||
ITS is a vulnerability in some Intel CPUs that support Enhanced IBRS and were
|
||||
released before Alder Lake. ITS may allow an attacker to control the prediction
|
||||
of indirect branches and RETs located in the lower half of a cacheline.
|
||||
|
||||
ITS is assigned CVE-2024-28956 with a CVSS score of 4.7 (Medium).
|
||||
|
||||
Scope of Impact
|
||||
---------------
|
||||
- **eIBRS Guest/Host Isolation**: Indirect branches in KVM/kernel may still be
|
||||
predicted with unintended target corresponding to a branch in the guest.
|
||||
|
||||
- **Intra-Mode BTI**: In-kernel training such as through cBPF or other native
|
||||
gadgets.
|
||||
|
||||
- **Indirect Branch Prediction Barrier (IBPB)**: After an IBPB, indirect
|
||||
branches may still be predicted with targets corresponding to direct branches
|
||||
executed prior to the IBPB. This is fixed by the IPU 2025.1 microcode, which
|
||||
should be available via distro updates. Alternatively microcode can be
|
||||
obtained from Intel's github repository [#f1]_.
|
||||
|
||||
Affected CPUs
|
||||
-------------
|
||||
Below is the list of ITS affected CPUs [#f2]_ [#f3]_:
|
||||
|
||||
======================== ============ ==================== ===============
|
||||
Common name Family_Model eIBRS Intra-mode BTI
|
||||
Guest/Host Isolation
|
||||
======================== ============ ==================== ===============
|
||||
SKYLAKE_X (step >= 6) 06_55H Affected Affected
|
||||
ICELAKE_X 06_6AH Not affected Affected
|
||||
ICELAKE_D 06_6CH Not affected Affected
|
||||
ICELAKE_L 06_7EH Not affected Affected
|
||||
TIGERLAKE_L 06_8CH Not affected Affected
|
||||
TIGERLAKE 06_8DH Not affected Affected
|
||||
KABYLAKE_L (step >= 12) 06_8EH Affected Affected
|
||||
KABYLAKE (step >= 13) 06_9EH Affected Affected
|
||||
COMETLAKE 06_A5H Affected Affected
|
||||
COMETLAKE_L 06_A6H Affected Affected
|
||||
ROCKETLAKE 06_A7H Not affected Affected
|
||||
======================== ============ ==================== ===============
|
||||
|
||||
- All affected CPUs enumerate Enhanced IBRS feature.
|
||||
- IBPB isolation is affected on all ITS affected CPUs, and need a microcode
|
||||
update for mitigation.
|
||||
- None of the affected CPUs enumerate BHI_CTRL which was introduced in Golden
|
||||
Cove (Alder Lake and Sapphire Rapids). This can help guests to determine the
|
||||
host's affected status.
|
||||
- Intel Atom CPUs are not affected by ITS.
|
||||
|
||||
Mitigation
|
||||
----------
|
||||
As only the indirect branches and RETs that have their last byte of instruction
|
||||
in the lower half of the cacheline are vulnerable to ITS, the basic idea behind
|
||||
the mitigation is to not allow indirect branches in the lower half.
|
||||
|
||||
This is achieved by relying on existing retpoline support in the kernel, and in
|
||||
compilers. ITS-vulnerable retpoline sites are runtime patched to point to newly
|
||||
added ITS-safe thunks. These safe thunks consists of indirect branch in the
|
||||
second half of the cacheline. Not all retpoline sites are patched to thunks, if
|
||||
a retpoline site is evaluated to be ITS-safe, it is replaced with an inline
|
||||
indirect branch.
|
||||
|
||||
Dynamic thunks
|
||||
~~~~~~~~~~~~~~
|
||||
From a dynamically allocated pool of safe-thunks, each vulnerable site is
|
||||
replaced with a new thunk, such that they get a unique address. This could
|
||||
improve the branch prediction accuracy. Also, it is a defense-in-depth measure
|
||||
against aliasing.
|
||||
|
||||
Note, for simplicity, indirect branches in eBPF programs are always replaced
|
||||
with a jump to a static thunk in __x86_indirect_its_thunk_array. If required,
|
||||
in future this can be changed to use dynamic thunks.
|
||||
|
||||
All vulnerable RETs are replaced with a static thunk, they do not use dynamic
|
||||
thunks. This is because RETs get their prediction from RSB mostly that does not
|
||||
depend on source address. RETs that underflow RSB may benefit from dynamic
|
||||
thunks. But, RETs significantly outnumber indirect branches, and any benefit
|
||||
from a unique source address could be outweighed by the increased icache
|
||||
footprint and iTLB pressure.
|
||||
|
||||
Retpoline
|
||||
~~~~~~~~~
|
||||
Retpoline sequence also mitigates ITS-unsafe indirect branches. For this
|
||||
reason, when retpoline is enabled, ITS mitigation only relocates the RETs to
|
||||
safe thunks. Unless user requested the RSB-stuffing mitigation.
|
||||
|
||||
RSB Stuffing
|
||||
~~~~~~~~~~~~
|
||||
RSB-stuffing via Call Depth Tracking is a mitigation for Retbleed RSB-underflow
|
||||
attacks. And it also mitigates RETs that are vulnerable to ITS.
|
||||
|
||||
Mitigation in guests
|
||||
^^^^^^^^^^^^^^^^^^^^
|
||||
All guests deploy ITS mitigation by default, irrespective of eIBRS enumeration
|
||||
and Family/Model of the guest. This is because eIBRS feature could be hidden
|
||||
from a guest. One exception to this is when a guest enumerates BHI_DIS_S, which
|
||||
indicates that the guest is running on an unaffected host.
|
||||
|
||||
To prevent guests from unnecessarily deploying the mitigation on unaffected
|
||||
platforms, Intel has defined ITS_NO bit(62) in MSR IA32_ARCH_CAPABILITIES. When
|
||||
a guest sees this bit set, it should not enumerate the ITS bug. Note, this bit
|
||||
is not set by any hardware, but is **intended for VMMs to synthesize** it for
|
||||
guests as per the host's affected status.
|
||||
|
||||
Mitigation options
|
||||
^^^^^^^^^^^^^^^^^^
|
||||
The ITS mitigation can be controlled using the "indirect_target_selection"
|
||||
kernel parameter. The available options are:
|
||||
|
||||
======== ===================================================================
|
||||
on (default) Deploy the "Aligned branch/return thunks" mitigation.
|
||||
If spectre_v2 mitigation enables retpoline, aligned-thunks are only
|
||||
deployed for the affected RET instructions. Retpoline mitigates
|
||||
indirect branches.
|
||||
|
||||
off Disable ITS mitigation.
|
||||
|
||||
vmexit Equivalent to "=on" if the CPU is affected by guest/host isolation
|
||||
part of ITS. Otherwise, mitigation is not deployed. This option is
|
||||
useful when host userspace is not in the threat model, and only
|
||||
attacks from guest to host are considered.
|
||||
|
||||
stuff Deploy RSB-fill mitigation when retpoline is also deployed.
|
||||
Otherwise, deploy the default mitigation. When retpoline mitigation
|
||||
is enabled, RSB-stuffing via Call-Depth-Tracking also mitigates
|
||||
ITS.
|
||||
|
||||
force Force the ITS bug and deploy the default mitigation.
|
||||
======== ===================================================================
|
||||
|
||||
Sysfs reporting
|
||||
---------------
|
||||
|
||||
The sysfs file showing ITS mitigation status is:
|
||||
|
||||
/sys/devices/system/cpu/vulnerabilities/indirect_target_selection
|
||||
|
||||
Note, microcode mitigation status is not reported in this file.
|
||||
|
||||
The possible values in this file are:
|
||||
|
||||
.. list-table::
|
||||
|
||||
* - Not affected
|
||||
- The processor is not vulnerable.
|
||||
* - Vulnerable
|
||||
- System is vulnerable and no mitigation has been applied.
|
||||
* - Vulnerable, KVM: Not affected
|
||||
- System is vulnerable to intra-mode BTI, but not affected by eIBRS
|
||||
guest/host isolation.
|
||||
* - Mitigation: Aligned branch/return thunks
|
||||
- The mitigation is enabled, affected indirect branches and RETs are
|
||||
relocated to safe thunks.
|
||||
* - Mitigation: Retpolines, Stuffing RSB
|
||||
- The mitigation is enabled using retpoline and RSB stuffing.
|
||||
|
||||
References
|
||||
----------
|
||||
.. [#f1] Microcode repository - https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files
|
||||
|
||||
.. [#f2] Affected Processors list - https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html
|
||||
|
||||
.. [#f3] Affected Processors list (machine readable) - https://github.com/intel/Intel-affected-processor-list
|
||||
@@ -157,9 +157,13 @@ This is achieved by using the otherwise unused and obsolete VERW instruction in
|
||||
combination with a microcode update. The microcode clears the affected CPU
|
||||
buffers when the VERW instruction is executed.
|
||||
|
||||
<<<<<<< HEAD
|
||||
Kernel reuses the MDS function to invoke the buffer clearing:
|
||||
|
||||
mds_clear_cpu_buffers()
|
||||
=======
|
||||
Kernel does the buffer clearing with x86_clear_cpu_buffers().
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
On MDS affected CPUs, the kernel already invokes CPU buffer clear on
|
||||
kernel/userspace, hypervisor/guest and C-state (idle) transitions. No
|
||||
|
||||
@@ -500,6 +500,7 @@
|
||||
bgrt_disable [ACPI][X86]
|
||||
Disable BGRT to avoid flickering OEM logo.
|
||||
|
||||
<<<<<<< HEAD
|
||||
binder.impl= [KNL]
|
||||
Determines whether the Android Binder driver should use
|
||||
the C implementation or the Rust implementation. Valid
|
||||
@@ -507,6 +508,8 @@
|
||||
CONFIG_ANDROID_BINDER_IPC_DEFAULT_IS_RUST determines
|
||||
the default value.
|
||||
|
||||
=======
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
blkdevparts= Manual partition parsing of block device(s) for
|
||||
embedded devices based on command line input.
|
||||
See Documentation/block/cmdline-partition.rst
|
||||
@@ -671,12 +674,15 @@
|
||||
loops can be debugged more effectively on production
|
||||
systems.
|
||||
|
||||
<<<<<<< HEAD
|
||||
clocksource.max_cswd_read_retries= [KNL]
|
||||
Number of clocksource_watchdog() retries due to
|
||||
external delays before the clock will be marked
|
||||
unstable. Defaults to two retries, that is,
|
||||
three attempts to read the clock under test.
|
||||
|
||||
=======
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
clocksource.verify_n_cpus= [KNL]
|
||||
Limit the number of CPUs checked for clocksources
|
||||
marked with CLOCK_SOURCE_VERIFY_PERCPU that
|
||||
@@ -1578,12 +1584,37 @@
|
||||
The above will cause the "foo" tracing instance to trigger
|
||||
a snapshot at the end of boot up.
|
||||
|
||||
<<<<<<< HEAD
|
||||
ftrace_dump_on_oops[=orig_cpu]
|
||||
[FTRACE] will dump the trace buffers on oops.
|
||||
If no parameter is passed, ftrace will dump
|
||||
buffers of all CPUs, but if you pass orig_cpu, it will
|
||||
dump only the buffer of the CPU that triggered the
|
||||
oops.
|
||||
=======
|
||||
ftrace_dump_on_oops[=2(orig_cpu) | =<instance>][,<instance> |
|
||||
,<instance>=2(orig_cpu)]
|
||||
[FTRACE] will dump the trace buffers on oops.
|
||||
If no parameter is passed, ftrace will dump global
|
||||
buffers of all CPUs, if you pass 2 or orig_cpu, it
|
||||
will dump only the buffer of the CPU that triggered
|
||||
the oops, or the specific instance will be dumped if
|
||||
its name is passed. Multiple instance dump is also
|
||||
supported, and instances are separated by commas. Each
|
||||
instance supports only dump on CPU that triggered the
|
||||
oops by passing 2 or orig_cpu to it.
|
||||
|
||||
ftrace_dump_on_oops=foo=orig_cpu
|
||||
|
||||
The above will dump only the buffer of "foo" instance
|
||||
on CPU that triggered the oops.
|
||||
|
||||
ftrace_dump_on_oops,foo,bar=orig_cpu
|
||||
|
||||
The above will dump global buffer on all CPUs, the
|
||||
buffer of "foo" instance on all CPUs and the buffer
|
||||
of "bar" instance on CPU that triggered the oops.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
ftrace_filter=[function-list]
|
||||
[FTRACE] Limit the functions traced by the function
|
||||
@@ -2081,6 +2112,26 @@
|
||||
different crypto accelerators. This option can be used
|
||||
to achieve best performance for particular HW.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
indirect_target_selection= [X86,Intel] Mitigation control for Indirect
|
||||
Target Selection(ITS) bug in Intel CPUs. Updated
|
||||
microcode is also required for a fix in IBPB.
|
||||
|
||||
on: Enable mitigation (default).
|
||||
off: Disable mitigation.
|
||||
force: Force the ITS bug and deploy default
|
||||
mitigation.
|
||||
vmexit: Only deploy mitigation if CPU is affected by
|
||||
guest/host isolation part of ITS.
|
||||
stuff: Deploy RSB-fill mitigation when retpoline is
|
||||
also deployed. Otherwise, deploy the default
|
||||
mitigation.
|
||||
|
||||
For details see:
|
||||
Documentation/admin-guide/hw-vuln/indirect-target-selection.rst
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
init= [KNL]
|
||||
Format: <full_path>
|
||||
Run specified binary instead of /sbin/init as init
|
||||
@@ -3320,6 +3371,14 @@
|
||||
|
||||
mga= [HW,DRM]
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
microcode.force_minrev= [X86]
|
||||
Format: <bool>
|
||||
Enable or disable the microcode minimal revision
|
||||
enforcement for the runtime microcode loader.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
min_addr=nn[KMG] [KNL,BOOT,IA-64] All physical memory below this
|
||||
physical address is ignored.
|
||||
|
||||
@@ -3350,12 +3409,22 @@
|
||||
arch-independent options, each of which is an
|
||||
aggregation of existing arch-specific options.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
Note, "mitigations" is supported if and only if the
|
||||
kernel was built with CPU_MITIGATIONS=y.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
off
|
||||
Disable all optional CPU mitigations. This
|
||||
improves system performance, but it may also
|
||||
expose users to several CPU vulnerabilities.
|
||||
Equivalent to: if nokaslr then kpti=0 [ARM64]
|
||||
gather_data_sampling=off [X86]
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
indirect_target_selection=off [X86]
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
kvm.nx_huge_pages=off [X86]
|
||||
l1tf=off [X86]
|
||||
mds=off [X86]
|
||||
@@ -4679,6 +4748,19 @@
|
||||
printk.time= Show timing data prefixed to each printk message line
|
||||
Format: <bool> (1/Y/y=enable, 0/N/n=disable)
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
proc_mem.force_override= [KNL]
|
||||
Format: {always | ptrace | never}
|
||||
Traditionally /proc/pid/mem allows memory permissions to be
|
||||
overridden without restrictions. This option may be set to
|
||||
restrict that. Can be one of:
|
||||
- 'always': traditional behavior always allows mem overrides.
|
||||
- 'ptrace': only allow mem overrides for active ptracers.
|
||||
- 'never': never allow mem overrides.
|
||||
If not specified, default is the CONFIG_PROC_MEM_* choice.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
processor.max_cstate= [HW,ACPI]
|
||||
Limit processor to maximum C-state
|
||||
max_cstate=9 overrides any DMI blacklist limit.
|
||||
@@ -4689,11 +4771,17 @@
|
||||
|
||||
profile= [KNL] Enable kernel profiling via /proc/profile
|
||||
Format: [<profiletype>,]<number>
|
||||
<<<<<<< HEAD
|
||||
Param: <profiletype>: "schedule", "sleep", or "kvm"
|
||||
[defaults to kernel profiling]
|
||||
Param: "schedule" - profile schedule points.
|
||||
Param: "sleep" - profile D-state sleeping (millisecs).
|
||||
Requires CONFIG_SCHEDSTATS
|
||||
=======
|
||||
Param: <profiletype>: "schedule" or "kvm"
|
||||
[defaults to kernel profiling]
|
||||
Param: "schedule" - profile schedule points.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
Param: "kvm" - profile VM exits.
|
||||
Param: <number> - step/bucket size as a power of 2 for
|
||||
statistical time based profiling.
|
||||
@@ -6458,6 +6546,18 @@
|
||||
<deci-seconds>: poll all this frequency
|
||||
0: no polling (default)
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
thp_anon= [KNL]
|
||||
Format: <size>[KMG],<size>[KMG]:<state>;<size>[KMG]-<size>[KMG]:<state>
|
||||
state is one of "always", "madvise", "never" or "inherit".
|
||||
Control the default behavior of the system with respect
|
||||
to anonymous transparent hugepages.
|
||||
Can be used multiple times for multiple anon THP sizes.
|
||||
See Documentation/admin-guide/mm/transhuge.rst for more
|
||||
details.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
threadirqs [KNL]
|
||||
Force threading of all interrupt handlers except those
|
||||
marked explicitly IRQF_NO_THREAD.
|
||||
@@ -6674,6 +6774,22 @@
|
||||
If not specified, "default" is used. In this case,
|
||||
the RNG's choice is left to each individual trust source.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
tsa= [X86] Control mitigation for Transient Scheduler
|
||||
Attacks on AMD CPUs. Search the following in your
|
||||
favourite search engine for more details:
|
||||
|
||||
"Technical guidance for mitigating transient scheduler
|
||||
attacks".
|
||||
|
||||
off - disable the mitigation
|
||||
on - enable the mitigation (default)
|
||||
user - mitigate only user/kernel transitions
|
||||
vm - mitigate only guest/host transitions
|
||||
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
tsc= Disable clocksource stability checks for TSC.
|
||||
Format: <string>
|
||||
[x86] reliable: mark tsc clocksource as reliable, this
|
||||
|
||||
@@ -15,7 +15,11 @@ Please notice, however, that, if:
|
||||
|
||||
you should use the main media development tree ``master`` branch:
|
||||
|
||||
<<<<<<< HEAD
|
||||
https://git.linuxtv.org/media_tree.git/
|
||||
=======
|
||||
https://git.linuxtv.org/media.git/
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
In this case, you may find some useful information at the
|
||||
`LinuxTv wiki pages <https://linuxtv.org/wiki>`_:
|
||||
|
||||
@@ -67,7 +67,11 @@ Changes / Fixes
|
||||
Please mail to linux-media AT vger.kernel.org unified diffs against
|
||||
the linux media git tree:
|
||||
|
||||
<<<<<<< HEAD
|
||||
https://git.linuxtv.org/media_tree.git/
|
||||
=======
|
||||
https://git.linuxtv.org/media.git/
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
This is done by committing a patch at a clone of the git tree and
|
||||
submitting the patch using ``git send-email``. Don't forget to
|
||||
|
||||
@@ -389,7 +389,11 @@ pages of all memory cgroups except ``/having_care_already``.::
|
||||
# # further filter out all cgroups except one at '/having_care_already'
|
||||
echo memcg > 1/type
|
||||
echo /having_care_already > 1/memcg_path
|
||||
<<<<<<< HEAD
|
||||
echo N > 1/matching
|
||||
=======
|
||||
echo Y > 1/matching
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
Note that ``anon`` and ``memcg`` filters are currently supported only when
|
||||
``paddr`` `implementation <sysfs_contexts>` is being used.
|
||||
|
||||
@@ -202,6 +202,19 @@ PMD-mappable transparent hugepage::
|
||||
|
||||
cat /sys/kernel/mm/transparent_hugepage/hpage_pmd_size
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
All THPs at fault and collapse time will be added to _deferred_list,
|
||||
and will therefore be split under memory presure if they are considered
|
||||
"underused". A THP is underused if the number of zero-filled pages in
|
||||
the THP is above max_ptes_none (see below). It is possible to disable
|
||||
this behaviour by writing 0 to shrink_underused, and enable it by writing
|
||||
1 to it::
|
||||
|
||||
echo 0 > /sys/kernel/mm/transparent_hugepage/shrink_underused
|
||||
echo 1 > /sys/kernel/mm/transparent_hugepage/shrink_underused
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
khugepaged will be automatically started when one or more hugepage
|
||||
sizes are enabled (either by directly setting "always" or "madvise",
|
||||
or by setting "inherit" while the top-level enabled is set to "always"
|
||||
@@ -284,6 +297,7 @@ processes. Exceeding the number would block the collapse::
|
||||
|
||||
A higher value may increase memory footprint for some workloads.
|
||||
|
||||
<<<<<<< HEAD
|
||||
Boot parameter
|
||||
==============
|
||||
|
||||
@@ -291,6 +305,39 @@ You can change the sysfs boot time defaults of Transparent Hugepage
|
||||
Support by passing the parameter ``transparent_hugepage=always`` or
|
||||
``transparent_hugepage=madvise`` or ``transparent_hugepage=never``
|
||||
to the kernel command line.
|
||||
=======
|
||||
Boot parameters
|
||||
===============
|
||||
|
||||
You can change the sysfs boot time default for the top-level "enabled"
|
||||
control by passing the parameter ``transparent_hugepage=always`` or
|
||||
``transparent_hugepage=madvise`` or ``transparent_hugepage=never`` to the
|
||||
kernel command line.
|
||||
|
||||
Alternatively, each supported anonymous THP size can be controlled by
|
||||
passing ``thp_anon=<size>[KMG],<size>[KMG]:<state>;<size>[KMG]-<size>[KMG]:<state>``,
|
||||
where ``<size>`` is the THP size (must be a power of 2 of PAGE_SIZE and
|
||||
supported anonymous THP) and ``<state>`` is one of ``always``, ``madvise``,
|
||||
``never`` or ``inherit``.
|
||||
|
||||
For example, the following will set 16K, 32K, 64K THP to ``always``,
|
||||
set 128K, 512K to ``inherit``, set 256K to ``madvise`` and 1M, 2M
|
||||
to ``never``::
|
||||
|
||||
thp_anon=16K-64K:always;128K,512K:inherit;256K:madvise;1M-2M:never
|
||||
|
||||
``thp_anon=`` may be specified multiple times to configure all THP sizes as
|
||||
required. If ``thp_anon=`` is specified at least once, any anon THP sizes
|
||||
not explicitly configured on the command line are implicitly set to
|
||||
``never``.
|
||||
|
||||
``transparent_hugepage`` setting only affects the global toggle. If
|
||||
``thp_anon`` is not specified, PMD_ORDER THP will default to ``inherit``.
|
||||
However, if a valid ``thp_anon`` setting is provided by the user, the
|
||||
PMD_ORDER THP policy will be overridden. If the policy for PMD_ORDER
|
||||
is not defined within a valid ``thp_anon``, its policy will default to
|
||||
``never``.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
Hugepages in tmpfs/shmem
|
||||
========================
|
||||
@@ -343,10 +390,13 @@ also applies to the regions registered in khugepaged.
|
||||
Monitoring usage
|
||||
================
|
||||
|
||||
<<<<<<< HEAD
|
||||
.. note::
|
||||
Currently the below counters only record events relating to
|
||||
PMD-sized THP. Events relating to other THP sizes are not included.
|
||||
|
||||
=======
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
The number of PMD-sized anonymous transparent huge pages currently used by the
|
||||
system is available by reading the AnonHugePages field in ``/proc/meminfo``.
|
||||
To identify what applications are using PMD-sized anonymous transparent huge
|
||||
@@ -423,6 +473,15 @@ thp_deferred_split_page
|
||||
splitting it would free up some memory. Pages on split queue are
|
||||
going to be split under memory pressure.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
thp_underused_split_page
|
||||
is incremented when a huge page on the split queue was split
|
||||
because it was underused. A THP is underused if the number of
|
||||
zero pages in the THP is above a certain threshold
|
||||
(/sys/kernel/mm/transparent_hugepage/khugepaged/max_ptes_none).
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
thp_split_pmd
|
||||
is incremented every time a PMD split into table of PTEs.
|
||||
This can happen, for instance, when application calls mprotect() or
|
||||
@@ -475,6 +534,36 @@ swpout_fallback
|
||||
Usually because failed to allocate some continuous swap space
|
||||
for the huge page.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
split
|
||||
is incremented every time a huge page is successfully split into
|
||||
smaller orders. This can happen for a variety of reasons but a
|
||||
common reason is that a huge page is old and is being reclaimed.
|
||||
|
||||
split_failed
|
||||
is incremented if kernel fails to split huge
|
||||
page. This can happen if the page was pinned by somebody.
|
||||
|
||||
split_deferred
|
||||
is incremented when a huge page is put onto split queue.
|
||||
This happens when a huge page is partially unmapped and splitting
|
||||
it would free up some memory. Pages on split queue are going to
|
||||
be split under memory pressure, if splitting is possible.
|
||||
|
||||
nr_anon
|
||||
the number of anonymous THP we have in the whole system. These THPs
|
||||
might be currently entirely mapped or have partially unmapped/unused
|
||||
subpages.
|
||||
|
||||
nr_anon_partially_mapped
|
||||
the number of anonymous THP which are likely partially mapped, possibly
|
||||
wasting memory, and have been queued for deferred memory reclamation.
|
||||
Note that in corner some cases (e.g., failed migration), we might detect
|
||||
an anonymous THP as "partially mapped" and count it here, even though it
|
||||
is not actually partially mapped anymore.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
As the system ages, allocating huge pages may be expensive as the
|
||||
system uses memory compaction to copy data around memory to free a
|
||||
huge page for use. There are some counters in ``/proc/vmstat`` to help
|
||||
|
||||
@@ -296,12 +296,39 @@ kernel panic). This will output the contents of the ftrace buffers to
|
||||
the console. This is very useful for capturing traces that lead to
|
||||
crashes and outputting them to a serial console.
|
||||
|
||||
<<<<<<< HEAD
|
||||
= ===================================================
|
||||
0 Disabled (default).
|
||||
1 Dump buffers of all CPUs.
|
||||
2 Dump the buffer of the CPU that triggered the oops.
|
||||
= ===================================================
|
||||
|
||||
=======
|
||||
======================= ===========================================
|
||||
0 Disabled (default).
|
||||
1 Dump buffers of all CPUs.
|
||||
2(orig_cpu) Dump the buffer of the CPU that triggered the
|
||||
oops.
|
||||
<instance> Dump the specific instance buffer on all CPUs.
|
||||
<instance>=2(orig_cpu) Dump the specific instance buffer on the CPU
|
||||
that triggered the oops.
|
||||
======================= ===========================================
|
||||
|
||||
Multiple instance dump is also supported, and instances are separated
|
||||
by commas. If global buffer also needs to be dumped, please specify
|
||||
the dump mode (1/2/orig_cpu) first for global buffer.
|
||||
|
||||
So for example to dump "foo" and "bar" instance buffer on all CPUs,
|
||||
user can::
|
||||
|
||||
echo "foo,bar" > /proc/sys/kernel/ftrace_dump_on_oops
|
||||
|
||||
To dump global buffer and "foo" instance buffer on all
|
||||
CPUs along with the "bar" instance buffer on CPU that triggered the
|
||||
oops, user can::
|
||||
|
||||
echo "1,foo,bar=2" > /proc/sys/kernel/ftrace_dump_on_oops
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
ftrace_enabled, stack_tracer_enabled
|
||||
====================================
|
||||
|
||||
@@ -174,6 +174,7 @@ HWCAP2_DCPODP
|
||||
Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
|
||||
|
||||
HWCAP2_SVE2
|
||||
<<<<<<< HEAD
|
||||
Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.
|
||||
|
||||
HWCAP2_SVEAES
|
||||
@@ -190,6 +191,30 @@ HWCAP2_SVESHA3
|
||||
|
||||
HWCAP2_SVESM4
|
||||
Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.
|
||||
=======
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.SVEver == 0b0001.
|
||||
|
||||
HWCAP2_SVEAES
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.AES == 0b0001.
|
||||
|
||||
HWCAP2_SVEPMULL
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.AES == 0b0010.
|
||||
|
||||
HWCAP2_SVEBITPERM
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.BitPerm == 0b0001.
|
||||
|
||||
HWCAP2_SVESHA3
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.SHA3 == 0b0001.
|
||||
|
||||
HWCAP2_SVESM4
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.SM4 == 0b0001.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
HWCAP2_FLAGM2
|
||||
Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.
|
||||
@@ -198,6 +223,7 @@ HWCAP2_FRINT
|
||||
Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.
|
||||
|
||||
HWCAP2_SVEI8MM
|
||||
<<<<<<< HEAD
|
||||
Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.
|
||||
|
||||
HWCAP2_SVEF32MM
|
||||
@@ -208,6 +234,22 @@ HWCAP2_SVEF64MM
|
||||
|
||||
HWCAP2_SVEBF16
|
||||
Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.
|
||||
=======
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.I8MM == 0b0001.
|
||||
|
||||
HWCAP2_SVEF32MM
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.F32MM == 0b0001.
|
||||
|
||||
HWCAP2_SVEF64MM
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.F64MM == 0b0001.
|
||||
|
||||
HWCAP2_SVEBF16
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.BF16 == 0b0001.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
HWCAP2_I8MM
|
||||
Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.
|
||||
@@ -273,7 +315,12 @@ HWCAP2_EBF16
|
||||
Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010.
|
||||
|
||||
HWCAP2_SVE_EBF16
|
||||
<<<<<<< HEAD
|
||||
Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010.
|
||||
=======
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.BF16 == 0b0010.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
HWCAP2_CSSC
|
||||
Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0001.
|
||||
@@ -282,7 +329,12 @@ HWCAP2_RPRFM
|
||||
Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.
|
||||
|
||||
HWCAP2_SVE2P1
|
||||
<<<<<<< HEAD
|
||||
Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.
|
||||
=======
|
||||
Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001 and
|
||||
ID_AA64ZFR0_EL1.SVEver == 0b0010.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
HWCAP2_SME2
|
||||
Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0001.
|
||||
|
||||
@@ -54,6 +54,11 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Ampere | AmpereOne | AC03_CPU_38 | AMPERE_ERRATUM_AC03_CPU_38 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
| Ampere | AmpereOne AC04 | AC04_CPU_10 | AMPERE_ERRATUM_AC03_CPU_38 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A510 | #2457168 | ARM64_ERRATUM_2457168 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
@@ -119,32 +124,91 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
=======
|
||||
| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
| ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
=======
|
||||
| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A715 | #2645198 | ARM64_ERRATUM_2645198 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A715 | #3456084 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
| ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
| ARM | Cortex-X2 | #3324338 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X3 | #3324335 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X4 | #3194386 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-N1 | #1349291 | N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
| ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-N2 | #2253138 | ARM64_ERRATUM_2253138 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-N3 | #3456111 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
| ARM | MMU-500 | #841119,826419 | N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | MMU-600 | #1076982,1209401| N/A |
|
||||
@@ -202,8 +266,14 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
| Hisilicon | Hip08 SMMU PMCG | #162001900 | N/A |
|
||||
| | Hip09 SMMU PMCG | | |
|
||||
=======
|
||||
| Hisilicon | Hip{08,09,09A,10| #162001900 | N/A |
|
||||
| | ,10C,11} | | |
|
||||
| | SMMU PMCG | | |
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
|
||||
@@ -242,3 +312,8 @@ stable kernels.
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Microsoft | Azure Cobalt 100| #2253138 | ARM64_ERRATUM_2253138 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
@@ -93,7 +93,11 @@ enters a C-state.
|
||||
|
||||
The kernel provides a function to invoke the buffer clearing:
|
||||
|
||||
<<<<<<< HEAD
|
||||
mds_clear_cpu_buffers()
|
||||
=======
|
||||
x86_clear_cpu_buffers()
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
Also macro CLEAR_CPU_BUFFERS can be used in ASM late in exit-to-user path.
|
||||
Other than CFLAGS.ZF, this macro doesn't clobber any registers.
|
||||
@@ -185,9 +189,15 @@ Mitigation points
|
||||
idle clearing would be a window dressing exercise and is therefore not
|
||||
activated.
|
||||
|
||||
<<<<<<< HEAD
|
||||
The invocation is controlled by the static key mds_idle_clear which is
|
||||
switched depending on the chosen mitigation mode and the SMT state of
|
||||
the system.
|
||||
=======
|
||||
The invocation is controlled by the static key cpu_buf_idle_clear which is
|
||||
switched depending on the chosen mitigation mode and the SMT state of the
|
||||
system.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
The buffer clear is only invoked before entering the C-State to prevent
|
||||
that stale data from the idling CPU from spilling to the Hyper-Thread
|
||||
|
||||
@@ -233,10 +233,23 @@ attempts in order to enforce the LRU property which have increasing impacts on
|
||||
other CPUs involved in the following operation attempts:
|
||||
|
||||
- Attempt to use CPU-local state to batch operations
|
||||
<<<<<<< HEAD
|
||||
- Attempt to fetch free nodes from global lists
|
||||
- Attempt to pull any node from a global list and remove it from the hashmap
|
||||
- Attempt to pull any node from any CPU's list and remove it from the hashmap
|
||||
|
||||
=======
|
||||
- Attempt to fetch ``target_free`` free nodes from global lists
|
||||
- Attempt to pull any node from a global list and remove it from the hashmap
|
||||
- Attempt to pull any node from any CPU's list and remove it from the hashmap
|
||||
|
||||
The number of nodes to borrow from the global list in a batch, ``target_free``,
|
||||
depends on the size of the map. Larger batch size reduces lock contention, but
|
||||
may also exhaust the global structure. The value is computed at map init to
|
||||
avoid exhaustion, by limiting aggregate reservation by all CPUs to half the map
|
||||
size. With a minimum of a single element and maximum budget of 128 at a time.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
This algorithm is described visually in the following diagram. See the
|
||||
description in commit 3a08c2fd7634 ("bpf: LRU List") for a full explanation of
|
||||
the corresponding operations:
|
||||
|
||||
@@ -17,7 +17,11 @@ significant byte.
|
||||
|
||||
LPM tries may be created with a maximum prefix length that is a multiple
|
||||
of 8, in the range from 8 to 2048. The key used for lookup and update
|
||||
<<<<<<< HEAD
|
||||
operations is a ``struct bpf_lpm_trie_key``, extended by
|
||||
=======
|
||||
operations is a ``struct bpf_lpm_trie_key_u8``, extended by
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
``max_prefixlen/8`` bytes.
|
||||
|
||||
- For IPv4 addresses the data length is 4 bytes
|
||||
|
||||
@@ -35,18 +35,30 @@ digraph {
|
||||
fn_bpf_lru_list_pop_free_to_local [shape=rectangle,fillcolor=2,
|
||||
label="Flush local pending,
|
||||
Rotate Global list, move
|
||||
<<<<<<< HEAD
|
||||
LOCAL_FREE_TARGET
|
||||
=======
|
||||
target_free
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
from global -> local"]
|
||||
// Also corresponds to:
|
||||
// fn__local_list_flush()
|
||||
// fn_bpf_lru_list_rotate()
|
||||
fn___bpf_lru_node_move_to_free[shape=diamond,fillcolor=2,
|
||||
<<<<<<< HEAD
|
||||
label="Able to free\nLOCAL_FREE_TARGET\nnodes?"]
|
||||
=======
|
||||
label="Able to free\ntarget_free\nnodes?"]
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
fn___bpf_lru_list_shrink_inactive [shape=rectangle,fillcolor=3,
|
||||
label="Shrink inactive list
|
||||
up to remaining
|
||||
<<<<<<< HEAD
|
||||
LOCAL_FREE_TARGET
|
||||
=======
|
||||
target_free
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
(global LRU -> local)"]
|
||||
fn___bpf_lru_list_shrink [shape=diamond,fillcolor=2,
|
||||
label="> 0 entries in\nlocal free list?"]
|
||||
|
||||
@@ -217,7 +217,11 @@ current *struct* is::
|
||||
int (*media_changed)(struct cdrom_device_info *, int);
|
||||
int (*tray_move)(struct cdrom_device_info *, int);
|
||||
int (*lock_door)(struct cdrom_device_info *, int);
|
||||
<<<<<<< HEAD
|
||||
int (*select_speed)(struct cdrom_device_info *, int);
|
||||
=======
|
||||
int (*select_speed)(struct cdrom_device_info *, unsigned long);
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
int (*get_last_session) (struct cdrom_device_info *,
|
||||
struct cdrom_multisession *);
|
||||
int (*get_mcn)(struct cdrom_device_info *, struct cdrom_mcn *);
|
||||
@@ -396,7 +400,11 @@ action need be taken, and the return value should be 0.
|
||||
|
||||
::
|
||||
|
||||
<<<<<<< HEAD
|
||||
int select_speed(struct cdrom_device_info *cdi, int speed)
|
||||
=======
|
||||
int select_speed(struct cdrom_device_info *cdi, unsigned long speed)
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
Some CD-ROM drives are capable of changing their head-speed. There
|
||||
are several reasons for changing the speed of a CD-ROM drive. Badly
|
||||
|
||||
@@ -28,6 +28,12 @@ kernel. As of today, modules that make use of symbols exported into namespaces,
|
||||
are required to import the namespace. Otherwise the kernel will, depending on
|
||||
its configuration, reject loading the module or warn about a missing import.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
Additionally, it is possible to put symbols into a module namespace, strictly
|
||||
limiting which modules are allowed to use these symbols.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
2. How to define Symbol Namespaces
|
||||
==================================
|
||||
|
||||
@@ -84,6 +90,25 @@ unit as preprocessor statement. The above example would then read::
|
||||
within the corresponding compilation unit before any EXPORT_SYMBOL macro is
|
||||
used.
|
||||
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
2.3 Using the EXPORT_SYMBOL_GPL_FOR_MODULES() macro
|
||||
===================================================
|
||||
|
||||
Symbols exported using this macro are put into a module namespace. This
|
||||
namespace cannot be imported.
|
||||
|
||||
The macro takes a comma separated list of module names, allowing only those
|
||||
modules to access this symbol. Simple tail-globs are supported.
|
||||
|
||||
For example:
|
||||
|
||||
EXPORT_SYMBOL_GPL_FOR_MODULES(preempt_notifier_inc, "kvm,kvm-*")
|
||||
|
||||
will limit usage of this symbol to modules whoes name matches the given
|
||||
patterns.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
3. How to use Symbols exported in Namespaces
|
||||
============================================
|
||||
|
||||
@@ -155,3 +180,9 @@ in-tree modules::
|
||||
You can also run nsdeps for external module builds. A typical usage is::
|
||||
|
||||
$ make -C <path_to_kernel_src> M=$PWD nsdeps
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
|
||||
Note: it will happily generate an import statement for the module namespace;
|
||||
which will not work and generates build and runtime failures.
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
168
Documentation/dev-tools/autofdo.rst
Normal file
168
Documentation/dev-tools/autofdo.rst
Normal file
@@ -0,0 +1,168 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
===================================
|
||||
Using AutoFDO with the Linux kernel
|
||||
===================================
|
||||
|
||||
This enables AutoFDO build support for the kernel when using
|
||||
the Clang compiler. AutoFDO (Auto-Feedback-Directed Optimization)
|
||||
is a type of profile-guided optimization (PGO) used to enhance the
|
||||
performance of binary executables. It gathers information about the
|
||||
frequency of execution of various code paths within a binary using
|
||||
hardware sampling. This data is then used to guide the compiler's
|
||||
optimization decisions, resulting in a more efficient binary. AutoFDO
|
||||
is a powerful optimization technique, and data indicates that it can
|
||||
significantly improve kernel performance. It's especially beneficial
|
||||
for workloads affected by front-end stalls.
|
||||
|
||||
For AutoFDO builds, unlike non-FDO builds, the user must supply a
|
||||
profile. Acquiring an AutoFDO profile can be done in several ways.
|
||||
AutoFDO profiles are created by converting hardware sampling using
|
||||
the "perf" tool. It is crucial that the workload used to create these
|
||||
perf files is representative; they must exhibit runtime
|
||||
characteristics similar to the workloads that are intended to be
|
||||
optimized. Failure to do so will result in the compiler optimizing
|
||||
for the wrong objective.
|
||||
|
||||
The AutoFDO profile often encapsulates the program's behavior. If the
|
||||
performance-critical codes are architecture-independent, the profile
|
||||
can be applied across platforms to achieve performance gains. For
|
||||
instance, using the profile generated on Intel architecture to build
|
||||
a kernel for AMD architecture can also yield performance improvements.
|
||||
|
||||
There are two methods for acquiring a representative profile:
|
||||
(1) Sample real workloads using a production environment.
|
||||
(2) Generate the profile using a representative load test.
|
||||
When enabling the AutoFDO build configuration without providing an
|
||||
AutoFDO profile, the compiler only modifies the dwarf information in
|
||||
the kernel without impacting runtime performance. It's advisable to
|
||||
use a kernel binary built with the same AutoFDO configuration to
|
||||
collect the perf profile. While it's possible to use a kernel built
|
||||
with different options, it may result in inferior performance.
|
||||
|
||||
One can collect profiles using AutoFDO build for the previous kernel.
|
||||
AutoFDO employs relative line numbers to match the profiles, offering
|
||||
some tolerance for source changes. This mode is commonly used in a
|
||||
production environment for profile collection.
|
||||
|
||||
In a profile collection based on a load test, the AutoFDO collection
|
||||
process consists of the following steps:
|
||||
|
||||
#. Initial build: The kernel is built with AutoFDO options
|
||||
without a profile.
|
||||
|
||||
#. Profiling: The above kernel is then run with a representative
|
||||
workload to gather execution frequency data. This data is
|
||||
collected using hardware sampling, via perf. AutoFDO is most
|
||||
effective on platforms supporting advanced PMU features like
|
||||
LBR on Intel machines.
|
||||
|
||||
#. AutoFDO profile generation: Perf output file is converted to
|
||||
the AutoFDO profile via offline tools.
|
||||
|
||||
The support requires a Clang compiler LLVM 17 or later.
|
||||
|
||||
Preparation
|
||||
===========
|
||||
|
||||
Configure the kernel with::
|
||||
|
||||
CONFIG_AUTOFDO_CLANG=y
|
||||
|
||||
Customization
|
||||
=============
|
||||
|
||||
The default CONFIG_AUTOFDO_CLANG setting covers kernel space objects for
|
||||
AutoFDO builds. One can, however, enable or disable AutoFDO build for
|
||||
individual files and directories by adding a line similar to the following
|
||||
to the respective kernel Makefile:
|
||||
|
||||
- For enabling a single file (e.g. foo.o) ::
|
||||
|
||||
AUTOFDO_PROFILE_foo.o := y
|
||||
|
||||
- For enabling all files in one directory ::
|
||||
|
||||
AUTOFDO_PROFILE := y
|
||||
|
||||
- For disabling one file ::
|
||||
|
||||
AUTOFDO_PROFILE_foo.o := n
|
||||
|
||||
- For disabling all files in one directory ::
|
||||
|
||||
AUTOFDO_PROFILE := n
|
||||
|
||||
Workflow
|
||||
========
|
||||
|
||||
Here is an example workflow for AutoFDO kernel:
|
||||
|
||||
1) Build the kernel on the host machine with LLVM enabled,
|
||||
for example, ::
|
||||
|
||||
$ make menuconfig LLVM=1
|
||||
|
||||
Turn on AutoFDO build config::
|
||||
|
||||
CONFIG_AUTOFDO_CLANG=y
|
||||
|
||||
With a configuration that with LLVM enabled, use the following command::
|
||||
|
||||
$ scripts/config -e AUTOFDO_CLANG
|
||||
|
||||
After getting the config, build with ::
|
||||
|
||||
$ make LLVM=1
|
||||
|
||||
2) Install the kernel on the test machine.
|
||||
|
||||
3) Run the load tests. The '-c' option in perf specifies the sample
|
||||
event period. We suggest using a suitable prime number, like 500009,
|
||||
for this purpose.
|
||||
|
||||
- For Intel platforms::
|
||||
|
||||
$ perf record -e BR_INST_RETIRED.NEAR_TAKEN:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
|
||||
|
||||
- For AMD platforms:
|
||||
|
||||
The supported systems are: Zen3 with BRS, or Zen4 with amd_lbr_v2. To check,
|
||||
|
||||
For Zen3::
|
||||
|
||||
$ cat proc/cpuinfo | grep " brs"
|
||||
|
||||
For Zen4::
|
||||
|
||||
$ cat proc/cpuinfo | grep amd_lbr_v2
|
||||
|
||||
The following command generated the perf data file::
|
||||
|
||||
$ perf record --pfm-events RETIRED_TAKEN_BRANCH_INSTRUCTIONS:k -a -N -b -c <count> -o <perf_file> -- <loadtest>
|
||||
|
||||
4) (Optional) Download the raw perf file to the host machine.
|
||||
|
||||
5) To generate an AutoFDO profile, two offline tools are available:
|
||||
create_llvm_prof and llvm_profgen. The create_llvm_prof tool is part
|
||||
of the AutoFDO project and can be found on GitHub
|
||||
(https://github.com/google/autofdo), version v0.30.1 or later.
|
||||
The llvm_profgen tool is included in the LLVM compiler itself. It's
|
||||
important to note that the version of llvm_profgen doesn't need to match
|
||||
the version of Clang. It needs to be the LLVM 19 release of Clang
|
||||
or later, or just from the LLVM trunk. ::
|
||||
|
||||
$ llvm-profgen --kernel --binary=<vmlinux> --perfdata=<perf_file> -o <profile_file>
|
||||
|
||||
or ::
|
||||
|
||||
$ create_llvm_prof --binary=<vmlinux> --profile=<perf_file> --format=extbinary --out=<profile_file>
|
||||
|
||||
Note that multiple AutoFDO profile files can be merged into one via::
|
||||
|
||||
$ llvm-profdata merge -o <profile_file> <profile_1> <profile_2> ... <profile_n>
|
||||
|
||||
6) Rebuild the kernel using the AutoFDO profile file with the same config as step 1,
|
||||
(Note CONFIG_AUTOFDO_CLANG needs to be enabled)::
|
||||
|
||||
$ make LLVM=1 CLANG_AUTOFDO_PROFILE=<profile_file>
|
||||
@@ -34,6 +34,10 @@ Documentation/dev-tools/testing-overview.rst
|
||||
kselftest
|
||||
kunit/index
|
||||
ktap
|
||||
<<<<<<< HEAD
|
||||
=======
|
||||
autofdo
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
|
||||
|
||||
.. only:: subproject and html
|
||||
|
||||
@@ -255,9 +255,27 @@ Contributing new tests (details)
|
||||
|
||||
TEST_PROGS_EXTENDED, TEST_GEN_PROGS_EXTENDED mean it is the
|
||||
executable which is not tested by default.
|
||||
<<<<<<< HEAD
|
||||
TEST_FILES, TEST_GEN_FILES mean it is the file which is used by
|
||||
test.
|
||||
|
||||
=======
|
||||
|
||||
TEST_FILES, TEST_GEN_FILES mean it is the file which is used by
|
||||
test.
|
||||
|
||||
TEST_INCLUDES is similar to TEST_FILES, it lists files which should be
|
||||
included when exporting or installing the tests, with the following
|
||||
differences:
|
||||
|
||||
* symlinks to files in other directories are preserved
|
||||
* the part of paths below tools/testing/selftests/ is preserved when
|
||||
copying the files to the output directory
|
||||
|
||||
TEST_INCLUDES is meant to list dependencies located in other directories of
|
||||
the selftests hierarchy.
|
||||
|
||||
>>>>>>> 855d69318a5c29daa3c0e5d5dc80496dbfad8789
|
||||
* First use the headers inside the kernel source and/or git repo, and then the
|
||||
system headers. Headers for the kernel release as opposed to headers
|
||||
installed by the distro on the system should be the primary focus to be able
|
||||
|
||||
99
Documentation/device-mapper/dm-bow.txt
Normal file
99
Documentation/device-mapper/dm-bow.txt
Normal file
@@ -0,0 +1,99 @@
|
||||
dm_bow (backup on write)
|
||||
========================
|
||||
|
||||
dm_bow is a device mapper driver that uses the free space on a device to back up
|
||||
data that is overwritten. The changes can then be committed by a simple state
|
||||
change, or rolled back by removing the dm_bow device and running a command line
|
||||
utility over the underlying device.
|
||||
|
||||
dm_bow has three states, set by writing ‘1’ or ‘2’ to /sys/block/dm-?/bow/state.
|
||||
It is only possible to go from state 0 (initial state) to state 1, and then from
|
||||
state 1 to state 2.
|
||||
|
||||
State 0: dm_bow collects all trims to the device and assumes that these mark
|
||||
free space on the overlying file system that can be safely used. Typically the
|
||||
mount code would create the dm_bow device, mount the file system, call the
|
||||
FITRIM ioctl on the file system then switch to state 1. These trims are not
|
||||
propagated to the underlying device.
|
||||
|
||||
State 1: All writes to the device cause the underlying data to be backed up to
|
||||
the free (trimmed) area as needed in such a way as they can be restored.
|
||||
However, the writes, with one exception, then happen exactly as they would
|
||||
without dm_bow, so the device is always in a good final state. The exception is
|
||||
that sector 0 is used to keep a log of the latest changes, both to indicate that
|
||||
we are in this state and to allow rollback. See below for all details. If there
|
||||
isn't enough free space, writes are failed with -ENOSPC.
|
||||
|
||||
State 2: The transition to state 2 triggers replacing the special sector 0 with
|
||||
the normal sector 0, and the freeing of all state information. dm_bow then
|
||||
becomes a pass-through driver, allowing the device to continue to be used with
|
||||
minimal performance impact.
|
||||
|
||||
Usage
|
||||
=====
|
||||
dm-bow takes one command line parameter, the name of the underlying device.
|
||||
|
||||
dm-bow will typically be used in the following way. dm-bow will be loaded with a
|
||||
suitable underlying device and the resultant device will be mounted. A file
|
||||
system trim will be issued via the FITRIM ioctl, then the device will be
|
||||
switched to state 1. The file system will now be used as normal. At some point,
|
||||
the changes can either be committed by switching to state 2, or rolled back by
|
||||
unmounting the file system, removing the dm-bow device and running the command
|
||||
line utility. Note that rebooting the device will be equivalent to unmounting
|
||||
and removing, but the command line utility must still be run
|
||||
|
||||
Details of operation in state 1
|
||||
===============================
|
||||
|
||||
dm_bow maintains a type for all sectors. A sector can be any of:
|
||||
|
||||
SECTOR0
|
||||
SECTOR0_CURRENT
|
||||
UNCHANGED
|
||||
FREE
|
||||
CHANGED
|
||||
BACKUP
|
||||
|
||||
SECTOR0 is the first sector on the device, and is used to hold the log of
|
||||
changes. This is the one exception.
|
||||
|
||||
SECTOR0_CURRENT is a sector picked from the FREE sectors, and is where reads and
|
||||
writes from the true sector zero are redirected to. Note that like any backup
|
||||
sector, if the sector is written to directly, it must be moved again.
|
||||
|
||||
UNCHANGED means that the sector has not been changed since we entered state 1.
|
||||
Thus if it is written to or trimmed, the contents must first be backed up.
|
||||
|
||||
FREE means that the sector was trimmed in state 0 and has not yet been written
|
||||
to or used for backup. On being written to, a FREE sector is changed to CHANGED.
|
||||
|
||||
CHANGED means that the sector has been modified, and can be further modified
|
||||
without further backup.
|
||||
|
||||
BACKUP means that this is a free sector being used as a backup. On being written
|
||||
to, the contents must first be backed up again.
|
||||
|
||||
All backup operations are logged to the first sector. The log sector has the
|
||||
format:
|
||||
--------------------------------------------------------
|
||||
| Magic | Count | Sequence | Log entry | Log entry | …
|
||||
--------------------------------------------------------
|
||||
|
||||
Magic is a magic number. Count is the number of log entries. Sequence is 0
|
||||
initially. A log entry is
|
||||
|
||||
-----------------------------------
|
||||
| Source | Dest | Size | Checksum |
|
||||
-----------------------------------
|
||||
|
||||
When SECTOR0 is full, the log sector is backed up and another empty log sector
|
||||
created with sequence number one higher. The first entry in any log entry with
|
||||
sequence > 0 therefore must be the log of the backing up of the previous log
|
||||
sector. Note that sequence is not strictly needed, but is a useful sanity check
|
||||
and potentially limits the time spent trying to restore a corrupted snapshot.
|
||||
|
||||
On entering state 1, dm_bow has a list of free sectors. All other sectors are
|
||||
unchanged. Sector0_current is selected from the free sectors and the contents of
|
||||
sector 0 are copied there. The sector 0 is backed up, which triggers the first
|
||||
log entry to be written.
|
||||
|
||||
9
Documentation/devicetree/bindings/.gitignore
vendored
Normal file
9
Documentation/devicetree/bindings/.gitignore
vendored
Normal file
@@ -0,0 +1,9 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
*.example.dts
|
||||
/processed-schema*.yaml
|
||||
/processed-schema*.json
|
||||
|
||||
#
|
||||
# We don't want to ignore the following even if they are dot-files
|
||||
#
|
||||
!.yamllint
|
||||
44
Documentation/devicetree/bindings/.yamllint
Normal file
44
Documentation/devicetree/bindings/.yamllint
Normal file
@@ -0,0 +1,44 @@
|
||||
extends: relaxed
|
||||
|
||||
rules:
|
||||
quoted-strings:
|
||||
required: only-when-needed
|
||||
extra-allowed:
|
||||
- '[$^,[]'
|
||||
- '^/$'
|
||||
line-length:
|
||||
# 80 chars should be enough, but don't fail if a line is longer
|
||||
max: 110
|
||||
allow-non-breakable-words: true
|
||||
level: warning
|
||||
braces:
|
||||
min-spaces-inside: 0
|
||||
max-spaces-inside: 1
|
||||
min-spaces-inside-empty: 0
|
||||
max-spaces-inside-empty: 0
|
||||
brackets:
|
||||
min-spaces-inside: 0
|
||||
max-spaces-inside: 1
|
||||
min-spaces-inside-empty: 0
|
||||
max-spaces-inside-empty: 0
|
||||
colons: {max-spaces-before: 0, max-spaces-after: 1}
|
||||
commas: {min-spaces-after: 1, max-spaces-after: 1}
|
||||
comments:
|
||||
require-starting-space: true
|
||||
min-spaces-from-content: 1
|
||||
comments-indentation: disable
|
||||
document-start:
|
||||
present: true
|
||||
empty-lines:
|
||||
max: 3
|
||||
max-end: 1
|
||||
empty-values:
|
||||
forbid-in-block-mappings: true
|
||||
forbid-in-flow-mappings: true
|
||||
hyphens:
|
||||
max-spaces-after: 1
|
||||
indentation:
|
||||
spaces: 2
|
||||
indent-sequences: true
|
||||
check-multi-line-strings: false
|
||||
trailing-spaces: false
|
||||
42
Documentation/devicetree/bindings/ABI.rst
Normal file
42
Documentation/devicetree/bindings/ABI.rst
Normal file
@@ -0,0 +1,42 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
===================
|
||||
Devicetree (DT) ABI
|
||||
===================
|
||||
|
||||
I. Regarding stable bindings/ABI, we quote from the 2013 ARM mini-summit
|
||||
summary document:
|
||||
|
||||
"That still leaves the question of, what does a stable binding look
|
||||
like? Certainly a stable binding means that a newer kernel will not
|
||||
break on an older device tree, but that doesn't mean the binding is
|
||||
frozen for all time. Grant said there are ways to change bindings that
|
||||
don't result in breakage. For instance, if a new property is added,
|
||||
then default to the previous behaviour if it is missing. If a binding
|
||||
truly needs an incompatible change, then change the compatible string
|
||||
at the same time. The driver can bind against both the old and the
|
||||
new. These guidelines aren't new, but they desperately need to be
|
||||
documented."
|
||||
|
||||
II. General binding rules
|
||||
|
||||
1) Maintainers, don't let perfect be the enemy of good. Don't hold up a
|
||||
binding because it isn't perfect.
|
||||
|
||||
2) Use specific compatible strings so that if we need to add a feature (DMA)
|
||||
in the future, we can create a new compatible string. See I.
|
||||
|
||||
3) Bindings can be augmented, but the driver shouldn't break when given
|
||||
the old binding. ie. add additional properties, but don't change the
|
||||
meaning of an existing property. For drivers, default to the original
|
||||
behaviour when a newly added property is missing.
|
||||
|
||||
4) Don't submit bindings for staging or unstable. That will be decided by
|
||||
the devicetree maintainers *after* discussion on the mailinglist.
|
||||
|
||||
III. Notes
|
||||
|
||||
1) This document is intended as a general familiarization with the process as
|
||||
decided at the 2013 Kernel Summit. When in doubt, the current word of the
|
||||
devicetree maintainers overrules this document. In that situation, a patch
|
||||
updating this document would be appreciated.
|
||||
80
Documentation/devicetree/bindings/Makefile
Normal file
80
Documentation/devicetree/bindings/Makefile
Normal file
@@ -0,0 +1,80 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
DT_DOC_CHECKER ?= dt-doc-validate
|
||||
DT_EXTRACT_EX ?= dt-extract-example
|
||||
DT_MK_SCHEMA ?= dt-mk-schema
|
||||
|
||||
DT_SCHEMA_LINT = $(shell which yamllint || \
|
||||
echo "warning: python package 'yamllint' not installed, skipping" >&2)
|
||||
|
||||
DT_SCHEMA_MIN_VERSION = 2022.3
|
||||
|
||||
PHONY += check_dtschema_version
|
||||
check_dtschema_version:
|
||||
@which $(DT_DOC_CHECKER) >/dev/null || \
|
||||
{ echo "Error: '$(DT_DOC_CHECKER)' not found!" >&2; \
|
||||
echo "Ensure dtschema python package is installed and in your PATH." >&2; \
|
||||
echo "Current PATH is:" >&2; \
|
||||
echo "$$PATH" >&2; false; }
|
||||
@{ echo $(DT_SCHEMA_MIN_VERSION); \
|
||||
$(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -Vc >/dev/null || \
|
||||
{ echo "ERROR: dtschema minimum version is v$(DT_SCHEMA_MIN_VERSION)" >&2; false; }
|
||||
|
||||
quiet_cmd_extract_ex = DTEX $@
|
||||
cmd_extract_ex = $(DT_EXTRACT_EX) $< > $@
|
||||
|
||||
$(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE
|
||||
$(call if_changed,extract_ex)
|
||||
|
||||
find_all_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \
|
||||
-name 'processed-schema*' \)
|
||||
|
||||
find_cmd = $(find_all_cmd) | grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))"
|
||||
CHK_DT_DOCS := $(shell $(find_cmd))
|
||||
|
||||
quiet_cmd_yamllint = LINT $(src)
|
||||
cmd_yamllint = ($(find_cmd) | \
|
||||
xargs -n200 -P$$(nproc) \
|
||||
$(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint >&2) || true
|
||||
|
||||
quiet_cmd_chk_bindings = CHKDT $@
|
||||
cmd_chk_bindings = ($(find_cmd) | \
|
||||
xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src)) || true
|
||||
|
||||
quiet_cmd_mk_schema = SCHEMA $@
|
||||
cmd_mk_schema = f=$$(mktemp) ; \
|
||||
$(find_all_cmd) > $$f ; \
|
||||
$(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f > $@ ; \
|
||||
rm -f $$f
|
||||
|
||||
define rule_chkdt
|
||||
$(if $(DT_SCHEMA_LINT),$(call cmd,yamllint),)
|
||||
$(call cmd,chk_bindings)
|
||||
$(call cmd,mk_schema)
|
||||
endef
|
||||
|
||||
DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_all_cmd)))
|
||||
|
||||
override DTC_FLAGS := \
|
||||
-Wno-avoid_unnecessary_addr_size \
|
||||
-Wno-graph_child_address \
|
||||
-Wno-interrupt_provider \
|
||||
-Wno-unique_unit_address \
|
||||
-Wunique_unit_address_if_enabled
|
||||
|
||||
# Disable undocumented compatible checks until warning free
|
||||
override DT_CHECKER_FLAGS ?=
|
||||
|
||||
$(obj)/processed-schema.json: $(DT_DOCS) $(src)/.yamllint check_dtschema_version FORCE
|
||||
$(call if_changed_rule,chkdt)
|
||||
|
||||
always-y += processed-schema.json
|
||||
always-$(CHECK_DT_BINDING) += $(patsubst $(srctree)/$(src)/%.yaml,%.example.dts, $(CHK_DT_DOCS))
|
||||
always-$(CHECK_DT_BINDING) += $(patsubst $(srctree)/$(src)/%.yaml,%.example.dtb, $(CHK_DT_DOCS))
|
||||
|
||||
# Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of
|
||||
# build artifacts here before they are processed by scripts/Makefile.clean
|
||||
clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \
|
||||
-name '*.example.dtb' \) -delete 2>/dev/null)
|
||||
|
||||
dt_compatible_check: $(obj)/processed-schema.json
|
||||
$(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<
|
||||
17
Documentation/devicetree/bindings/arc/archs-pct.txt
Normal file
17
Documentation/devicetree/bindings/arc/archs-pct.txt
Normal file
@@ -0,0 +1,17 @@
|
||||
* ARC HS Performance Counters
|
||||
|
||||
The ARC HS can be configured with a pipeline performance monitor for counting
|
||||
CPU and cache events like cache misses and hits. Like conventional PCT there
|
||||
are 100+ hardware conditions dynamically mapped to up to 32 counters.
|
||||
It also supports overflow interrupts.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should contain
|
||||
"snps,archs-pct"
|
||||
|
||||
Example:
|
||||
|
||||
pmu {
|
||||
compatible = "snps,archs-pct";
|
||||
};
|
||||
7
Documentation/devicetree/bindings/arc/axs101.txt
Normal file
7
Documentation/devicetree/bindings/arc/axs101.txt
Normal file
@@ -0,0 +1,7 @@
|
||||
Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
|
||||
---------------------------------------------------------------------------
|
||||
|
||||
SDP Main Board with an AXC001 CPU Card hoisting ARC700 core in silicon
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "snps,axs101", "snps,arc-sdp";
|
||||
8
Documentation/devicetree/bindings/arc/axs103.txt
Normal file
8
Documentation/devicetree/bindings/arc/axs103.txt
Normal file
@@ -0,0 +1,8 @@
|
||||
Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
|
||||
---------------------------------------------------------------------------
|
||||
|
||||
SDP Main Board with an AXC003 FPGA Card which can contain various flavours of
|
||||
HS38x cores.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "snps,axs103", "snps,arc-sdp";
|
||||
7
Documentation/devicetree/bindings/arc/eznps.txt
Normal file
7
Documentation/devicetree/bindings/arc/eznps.txt
Normal file
@@ -0,0 +1,7 @@
|
||||
EZchip NPS Network Processor Platforms Device Tree Bindings
|
||||
---------------------------------------------------------------------------
|
||||
|
||||
Appliance main board with NPS400 ASIC.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "ezchip,arc-nps";
|
||||
7
Documentation/devicetree/bindings/arc/hsdk.txt
Normal file
7
Documentation/devicetree/bindings/arc/hsdk.txt
Normal file
@@ -0,0 +1,7 @@
|
||||
Synopsys DesignWare ARC HS Development Kit Device Tree Bindings
|
||||
---------------------------------------------------------------------------
|
||||
|
||||
ARC HSDK Board with quad-core ARC HS38x4 in silicon.
|
||||
|
||||
Required root node properties:
|
||||
- compatible = "snps,hsdk";
|
||||
20
Documentation/devicetree/bindings/arc/pct.txt
Normal file
20
Documentation/devicetree/bindings/arc/pct.txt
Normal file
@@ -0,0 +1,20 @@
|
||||
* ARC Performance Counters
|
||||
|
||||
The ARC700 can be configured with a pipeline performance monitor for counting
|
||||
CPU and cache events like cache misses and hits. Like conventional PCT there
|
||||
are 100+ hardware conditions dynamically mapped to up to 32 counters
|
||||
|
||||
Note that:
|
||||
* The ARC 700 PCT does not support interrupts; although HW events may be
|
||||
counted, the HW events themselves cannot serve as a trigger for a sample.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : should contain
|
||||
"snps,arc700-pct"
|
||||
|
||||
Example:
|
||||
|
||||
pmu {
|
||||
compatible = "snps,arc700-pct";
|
||||
};
|
||||
53
Documentation/devicetree/bindings/arm/actions.yaml
Normal file
53
Documentation/devicetree/bindings/arm/actions.yaml
Normal file
@@ -0,0 +1,53 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/actions.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Actions Semi platforms
|
||||
|
||||
maintainers:
|
||||
- Andreas Färber <afaerber@suse.de>
|
||||
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
# The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC.
|
||||
- items:
|
||||
- enum:
|
||||
- allo,sparky # Allo.com Sparky
|
||||
- cubietech,cubieboard6 # Cubietech CubieBoard6
|
||||
- roseapplepi,roseapplepi # RoseapplePi.org RoseapplePi
|
||||
- const: actions,s500
|
||||
- items:
|
||||
- enum:
|
||||
- caninos,labrador-base-m # Labrador Base Board M v1
|
||||
- const: caninos,labrador-v2 # Labrador Core v2
|
||||
- const: actions,s500
|
||||
- items:
|
||||
- enum:
|
||||
- lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B
|
||||
- const: lemaker,guitar
|
||||
- const: actions,s500
|
||||
|
||||
# The Actions Semi S700 is a quad-core ARM Cortex-A53 SoC.
|
||||
- items:
|
||||
- enum:
|
||||
- caninos,labrador-base-m2 # Labrador Base Board M v2
|
||||
- const: caninos,labrador-v3 # Labrador Core v3
|
||||
- const: actions,s700
|
||||
- items:
|
||||
- enum:
|
||||
- cubietech,cubieboard7 # Cubietech CubieBoard7
|
||||
- const: actions,s700
|
||||
|
||||
# The Actions Semi S900 is a quad-core ARM Cortex-A53 SoC.
|
||||
- items:
|
||||
- enum:
|
||||
- ucrobotics,bubblegum-96 # uCRobotics Bubblegum-96
|
||||
- const: actions,s900
|
||||
|
||||
additionalProperties: true
|
||||
28
Documentation/devicetree/bindings/arm/airoha.yaml
Normal file
28
Documentation/devicetree/bindings/arm/airoha.yaml
Normal file
@@ -0,0 +1,28 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/airoha.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Airoha SoC based Platforms
|
||||
|
||||
maintainers:
|
||||
- Felix Fietkau <nbd@nbd.name>
|
||||
- John Crispin <john@phrozen.org>
|
||||
|
||||
description:
|
||||
Boards with an Airoha SoC shall have the following properties.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- airoha,en7523-evb
|
||||
- const: airoha,en7523
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
68
Documentation/devicetree/bindings/arm/altera.yaml
Normal file
68
Documentation/devicetree/bindings/arm/altera.yaml
Normal file
@@ -0,0 +1,68 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/altera.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Altera's SoCFPGA platform
|
||||
|
||||
maintainers:
|
||||
- Dinh Nguyen <dinguyen@kernel.org>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Arria 5 boards
|
||||
items:
|
||||
- enum:
|
||||
- altr,socfpga-arria5-socdk
|
||||
- const: altr,socfpga-arria5
|
||||
- const: altr,socfpga
|
||||
|
||||
- description: Arria 10 boards
|
||||
items:
|
||||
- enum:
|
||||
- altr,socfpga-arria10-socdk
|
||||
- const: altr,socfpga-arria10
|
||||
- const: altr,socfpga
|
||||
|
||||
- description: Mercury+ AA1 boards
|
||||
items:
|
||||
- enum:
|
||||
- enclustra,mercury-pe1
|
||||
- google,chameleon-v3
|
||||
- const: enclustra,mercury-aa1
|
||||
- const: altr,socfpga-arria10
|
||||
- const: altr,socfpga
|
||||
|
||||
- description: Cyclone 5 boards
|
||||
items:
|
||||
- enum:
|
||||
- altr,socfpga-cyclone5-socdk
|
||||
- denx,mcvevk
|
||||
- ebv,socrates
|
||||
- macnica,sodia
|
||||
- novtech,chameleon96
|
||||
- samtec,vining
|
||||
- terasic,de0-atlas
|
||||
- terasic,socfpga-cyclone5-sockit
|
||||
- const: altr,socfpga-cyclone5
|
||||
- const: altr,socfpga
|
||||
|
||||
- description: Stratix 10 boards
|
||||
items:
|
||||
- enum:
|
||||
- altr,socfpga-stratix10-socdk
|
||||
- altr,socfpga-stratix10-swvp
|
||||
- const: altr,socfpga-stratix10
|
||||
|
||||
- description: SoCFPGA VT
|
||||
items:
|
||||
- const: altr,socfpga-vt
|
||||
- const: altr,socfpga
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
@@ -0,0 +1,33 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Altera SOCFPGA Clock Manager
|
||||
|
||||
maintainers:
|
||||
- Dinh Nguyen <dinguyen@kernel.org>
|
||||
|
||||
description: test
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: altr,clk-mgr
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clkmgr@ffd04000 {
|
||||
compatible = "altr,clk-mgr";
|
||||
reg = <0xffd04000 0x1000>;
|
||||
};
|
||||
|
||||
...
|
||||
@@ -0,0 +1,12 @@
|
||||
Altera SOCFPGA SDRAM Controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should contain "altr,sdr-ctl" and "syscon".
|
||||
syscon is required by the Altera SOCFPGA SDRAM EDAC.
|
||||
- reg : Should contain 1 register range (address and length)
|
||||
|
||||
Example:
|
||||
sdr: sdr@ffc25000 {
|
||||
compatible = "altr,sdr-ctl", "syscon";
|
||||
reg = <0xffc25000 0x1000>;
|
||||
};
|
||||
@@ -0,0 +1,15 @@
|
||||
Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
|
||||
The EDAC accesses a range of registers in the SDRAM controller.
|
||||
|
||||
Required properties:
|
||||
- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
|
||||
- altr,sdr-syscon : phandle of the sdr module
|
||||
- interrupts : Should contain the SDRAM ECC IRQ in the
|
||||
appropriate format for the IRQ controller.
|
||||
|
||||
Example:
|
||||
sdramedac {
|
||||
compatible = "altr,sdram-edac";
|
||||
altr,sdr-syscon = <&sdr>;
|
||||
interrupts = <0 39 4>;
|
||||
};
|
||||
@@ -0,0 +1,25 @@
|
||||
Altera SOCFPGA System Manager
|
||||
|
||||
Required properties:
|
||||
- compatible : "altr,sys-mgr"
|
||||
- reg : Should contain 1 register ranges(address and length)
|
||||
- cpu1-start-addr : CPU1 start address in hex.
|
||||
|
||||
Example:
|
||||
sysmgr@ffd08000 {
|
||||
compatible = "altr,sys-mgr";
|
||||
reg = <0xffd08000 0x1000>;
|
||||
cpu1-start-addr = <0xffd080c4>;
|
||||
};
|
||||
|
||||
ARM64 - Stratix10
|
||||
Required properties:
|
||||
- compatible : "altr,sys-mgr-s10"
|
||||
- reg : Should contain 1 register range(address and length)
|
||||
for system manager register.
|
||||
|
||||
Example:
|
||||
sysmgr@ffd12000 {
|
||||
compatible = "altr,sys-mgr-s10";
|
||||
reg = <0xffd12000 0x228>;
|
||||
};
|
||||
35
Documentation/devicetree/bindings/arm/amazon,al.yaml
Normal file
35
Documentation/devicetree/bindings/arm/amazon,al.yaml
Normal file
@@ -0,0 +1,35 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/amazon,al.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Amazon's Annapurna Labs Alpine Platform
|
||||
|
||||
maintainers:
|
||||
- Hanna Hawa <hhhawa@amazon.com>
|
||||
- Talel Shenhar <talel@amazon.com>, <talelshenhar@gmail.com>
|
||||
- Ronen Krupnik <ronenk@amazon.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Boards with Alpine V1 SoC
|
||||
items:
|
||||
- const: al,alpine
|
||||
|
||||
- description: Boards with Alpine V2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- al,alpine-v2-evp
|
||||
- const: al,alpine-v2
|
||||
|
||||
- description: Boards with Alpine V3 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amazon,al-alpine-v3-evp
|
||||
- const: amazon,al-alpine-v3
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
231
Documentation/devicetree/bindings/arm/amlogic.yaml
Normal file
231
Documentation/devicetree/bindings/arm/amlogic.yaml
Normal file
@@ -0,0 +1,231 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/amlogic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Amlogic SoC based Platforms
|
||||
|
||||
maintainers:
|
||||
- Kevin Hilman <khilman@baylibre.com>
|
||||
|
||||
description: |+
|
||||
Work in progress statement:
|
||||
|
||||
Device tree files and bindings applying to Amlogic SoCs and boards are
|
||||
considered "unstable". Any Amlogic device tree binding may change at
|
||||
any time. Be sure to use a device tree binary and a kernel image
|
||||
generated from the same source tree.
|
||||
|
||||
Please refer to Documentation/devicetree/bindings/ABI.rst for a definition of a
|
||||
stable binding/ABI.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Boards with the Amlogic Meson6 SoC
|
||||
items:
|
||||
- enum:
|
||||
- geniatech,atv1200
|
||||
- const: amlogic,meson6
|
||||
|
||||
- description: Boards with the Amlogic Meson8 SoC
|
||||
items:
|
||||
- enum:
|
||||
- minix,neo-x8
|
||||
- const: amlogic,meson8
|
||||
|
||||
- description: Boards with the Amlogic Meson8m2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- tronsmart,mxiii-plus
|
||||
- const: amlogic,meson8m2
|
||||
|
||||
- description: Boards with the Amlogic Meson8b SoC
|
||||
items:
|
||||
- enum:
|
||||
- endless,ec100
|
||||
- hardkernel,odroid-c1
|
||||
- tronfy,mxq
|
||||
- const: amlogic,meson8b
|
||||
|
||||
- description: Boards with the Amlogic Meson GXBaby SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,p200
|
||||
- amlogic,p201
|
||||
- friendlyarm,nanopi-k2
|
||||
- hardkernel,odroid-c2
|
||||
- nexbox,a95x
|
||||
- videostrong,kii-pro
|
||||
- wetek,hub
|
||||
- wetek,play2
|
||||
- const: amlogic,meson-gxbb
|
||||
|
||||
- description: Tronsmart Vega S95 devices
|
||||
items:
|
||||
- enum:
|
||||
- tronsmart,vega-s95-pro
|
||||
- tronsmart,vega-s95-meta
|
||||
- tronsmart,vega-s95-telos
|
||||
- const: tronsmart,vega-s95
|
||||
- const: amlogic,meson-gxbb
|
||||
|
||||
- description: Boards with the Amlogic Meson GXL S805X SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,p241
|
||||
- libretech,aml-s805x-ac
|
||||
- const: amlogic,s805x
|
||||
- const: amlogic,meson-gxl
|
||||
|
||||
- description: Boards with the Amlogic Meson GXL S905W SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,p281
|
||||
- oranth,tx3-mini
|
||||
- jethome,jethub-j80
|
||||
- const: amlogic,s905w
|
||||
- const: amlogic,meson-gxl
|
||||
|
||||
- description: Boards with the Amlogic Meson GXL S905X SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,p212
|
||||
- hwacom,amazetv
|
||||
- khadas,vim
|
||||
- libretech,aml-s905x-cc
|
||||
- libretech,aml-s905x-cc-v2
|
||||
- nexbox,a95x
|
||||
- const: amlogic,s905x
|
||||
- const: amlogic,meson-gxl
|
||||
|
||||
- description: Boards with the Amlogic Meson GXL S905D SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,p230
|
||||
- amlogic,p231
|
||||
- libretech,aml-s905d-pc
|
||||
- osmc,vero4k-plus
|
||||
- phicomm,n1
|
||||
- smartlabs,sml5442tw
|
||||
- videostrong,gxl-kii-pro
|
||||
- const: amlogic,s905d
|
||||
- const: amlogic,meson-gxl
|
||||
|
||||
- description: Boards with the Amlogic Meson GXM S912 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,q200
|
||||
- amlogic,q201
|
||||
- azw,gt1-ultimate
|
||||
- khadas,vim2
|
||||
- kingnovel,r-box-pro
|
||||
- libretech,aml-s912-pc
|
||||
- minix,neo-u9h
|
||||
- nexbox,a1
|
||||
- tronsmart,vega-s96
|
||||
- videostrong,gxm-kiii-pro
|
||||
- wetek,core2
|
||||
- const: amlogic,s912
|
||||
- const: amlogic,meson-gxm
|
||||
|
||||
- description: Boards with the Amlogic Meson AXG A113D SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,s400
|
||||
- jethome,jethub-j100
|
||||
- jethome,jethub-j110
|
||||
- const: amlogic,a113d
|
||||
- const: amlogic,meson-axg
|
||||
|
||||
- description: Boards with the Amlogic Meson G12A S905D2/X2/Y2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amediatech,x96-max
|
||||
- amlogic,u200
|
||||
- radxa,zero
|
||||
- seirobotics,sei510
|
||||
- const: amlogic,g12a
|
||||
|
||||
- description: Boards with the Amlogic Meson G12B A311D SoC
|
||||
items:
|
||||
- enum:
|
||||
- bananapi,bpi-m2s
|
||||
- khadas,vim3
|
||||
- radxa,zero2
|
||||
- const: amlogic,a311d
|
||||
- const: amlogic,g12b
|
||||
|
||||
- description: Boards using the BPI-CM4 module with Amlogic Meson G12B A311D SoC
|
||||
items:
|
||||
- enum:
|
||||
- bananapi,bpi-cm4io
|
||||
- const: bananapi,bpi-cm4
|
||||
- const: amlogic,a311d
|
||||
- const: amlogic,g12b
|
||||
|
||||
- description: Boards with the Amlogic Meson G12B S922X SoC
|
||||
items:
|
||||
- enum:
|
||||
- azw,gsking-x
|
||||
- azw,gtking
|
||||
- azw,gtking-pro
|
||||
- bananapi,bpi-m2s
|
||||
- hardkernel,odroid-go-ultra
|
||||
- hardkernel,odroid-n2
|
||||
- hardkernel,odroid-n2l
|
||||
- hardkernel,odroid-n2-plus
|
||||
- khadas,vim3
|
||||
- ugoos,am6
|
||||
- const: amlogic,s922x
|
||||
- const: amlogic,g12b
|
||||
|
||||
- description: Boards with the Amlogic Meson SM1 S905X3/D3/Y3 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amediatech,x96-air
|
||||
- amediatech,x96-air-gbit
|
||||
- bananapi,bpi-m2-pro
|
||||
- bananapi,bpi-m5
|
||||
- cyx,a95xf3-air
|
||||
- cyx,a95xf3-air-gbit
|
||||
- hardkernel,odroid-c4
|
||||
- hardkernel,odroid-hc4
|
||||
- haochuangyi,h96-max
|
||||
- khadas,vim3l
|
||||
- seirobotics,sei610
|
||||
- const: amlogic,sm1
|
||||
|
||||
- description: Boards with the Amlogic Meson A1 A113L SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,ad401
|
||||
- const: amlogic,a1
|
||||
|
||||
- description: Boards with the Amlogic C3 C302X/C308L SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,aw409
|
||||
- amlogic,aw419
|
||||
- const: amlogic,c3
|
||||
|
||||
- description: Boards with the Amlogic Meson S4 S805X2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,aq222
|
||||
- const: amlogic,s4
|
||||
|
||||
- description: Boards with the Amlogic T7 A311D2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,an400
|
||||
- khadas,vim4
|
||||
- const: amlogic,a311d2
|
||||
- const: amlogic,t7
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
@@ -0,0 +1,54 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2019 BayLibre, SAS
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Amlogic Meson Firmware registers Interface
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Meson SoCs have a register bank with status and data shared with the
|
||||
secure firmware.
|
||||
|
||||
# We need a select here so we don't match all nodes with 'syscon'
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: amlogic,meson-gx-ao-secure
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: amlogic,meson-gx-ao-secure
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
amlogic,has-chip-id:
|
||||
description: |
|
||||
A firmware register encodes the SoC type, package and revision
|
||||
information on the Meson GX SoCs. If present, the interface gives
|
||||
the current SoC version.
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
ao-secure@140 {
|
||||
compatible = "amlogic,meson-gx-ao-secure", "syscon";
|
||||
reg = <0x140 0x140>;
|
||||
amlogic,has-chip-id;
|
||||
};
|
||||
@@ -0,0 +1,42 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface
|
||||
|
||||
maintainers:
|
||||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
||||
description: |
|
||||
The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which
|
||||
contains registers for various IP blocks such as pin-controller bits for
|
||||
the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits.
|
||||
The registers can be accessed directly when not running in "secure mode".
|
||||
When "secure mode" is enabled then these registers have to be accessed
|
||||
through secure monitor calls.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,meson8-secbus2
|
||||
- amlogic,meson8b-secbus2
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
secbus2: system-controller@4000 {
|
||||
compatible = "amlogic,meson8-secbus2", "syscon";
|
||||
reg = <0x4000 0x2000>;
|
||||
};
|
||||
20
Documentation/devicetree/bindings/arm/amlogic/analog-top.txt
Normal file
20
Documentation/devicetree/bindings/arm/amlogic/analog-top.txt
Normal file
@@ -0,0 +1,20 @@
|
||||
Amlogic Meson8 and Meson8b "analog top" registers:
|
||||
--------------------------------------------------
|
||||
|
||||
The analog top registers contain information about the so-called
|
||||
"metal revision" (which encodes the "minor version") of the SoC.
|
||||
|
||||
Required properties:
|
||||
- reg: the register range of the analog top registers
|
||||
- compatible: depending on the SoC this should be one of:
|
||||
- "amlogic,meson8-analog-top"
|
||||
- "amlogic,meson8b-analog-top"
|
||||
along with "syscon"
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
analog_top: analog-top@81a8 {
|
||||
compatible = "amlogic,meson8-analog-top", "syscon";
|
||||
reg = <0x81a8 0x14>;
|
||||
};
|
||||
17
Documentation/devicetree/bindings/arm/amlogic/assist.txt
Normal file
17
Documentation/devicetree/bindings/arm/amlogic/assist.txt
Normal file
@@ -0,0 +1,17 @@
|
||||
Amlogic Meson6/Meson8/Meson8b assist registers:
|
||||
-----------------------------------------------
|
||||
|
||||
The assist registers contain basic information about the SoC,
|
||||
for example the encoded SoC part number.
|
||||
|
||||
Required properties:
|
||||
- reg: the register range of the assist registers
|
||||
- compatible: should be "amlogic,meson-mx-assist" along with "syscon"
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
assist: assist@7c00 {
|
||||
compatible = "amlogic,meson-mx-assist", "syscon";
|
||||
reg = <0x7c00 0x200>;
|
||||
};
|
||||
17
Documentation/devicetree/bindings/arm/amlogic/bootrom.txt
Normal file
17
Documentation/devicetree/bindings/arm/amlogic/bootrom.txt
Normal file
@@ -0,0 +1,17 @@
|
||||
Amlogic Meson6/Meson8/Meson8b bootrom:
|
||||
--------------------------------------
|
||||
|
||||
The bootrom register area can be used to access SoC specific
|
||||
information, such as the "misc version".
|
||||
|
||||
Required properties:
|
||||
- reg: the register range of the bootrom registers
|
||||
- compatible: should be "amlogic,meson-mx-bootrom" along with "syscon"
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
bootrom: bootrom@d9040000 {
|
||||
compatible = "amlogic,meson-mx-bootrom", "syscon";
|
||||
reg = <0xd9040000 0x10000>;
|
||||
};
|
||||
18
Documentation/devicetree/bindings/arm/amlogic/pmu.txt
Normal file
18
Documentation/devicetree/bindings/arm/amlogic/pmu.txt
Normal file
@@ -0,0 +1,18 @@
|
||||
Amlogic Meson8 and Meson8b power-management-unit:
|
||||
-------------------------------------------------
|
||||
|
||||
The pmu is used to turn off and on different power domains of the SoCs
|
||||
This includes the power to the CPU cores.
|
||||
|
||||
Required node properties:
|
||||
- compatible value : depending on the SoC this should be one of:
|
||||
"amlogic,meson8-pmu"
|
||||
"amlogic,meson8b-pmu"
|
||||
- reg : physical base address and the size of the registers window
|
||||
|
||||
Example:
|
||||
|
||||
pmu@c81000e4 {
|
||||
compatible = "amlogic,meson8b-pmu", "syscon";
|
||||
reg = <0xc81000e0 0x18>;
|
||||
};
|
||||
17
Documentation/devicetree/bindings/arm/apm/scu.txt
Normal file
17
Documentation/devicetree/bindings/arm/apm/scu.txt
Normal file
@@ -0,0 +1,17 @@
|
||||
APM X-GENE SoC series SCU Registers
|
||||
|
||||
This system clock unit contain various register that control block resets,
|
||||
clock enable/disables, clock divisors and other deepsleep registers.
|
||||
|
||||
Properties:
|
||||
- compatible : should contain two values. First value must be:
|
||||
- "apm,xgene-scu"
|
||||
second value must be always "syscon".
|
||||
|
||||
- reg : offset and length of the register set.
|
||||
|
||||
Example :
|
||||
scu: system-clk-controller@17000000 {
|
||||
compatible = "apm,xgene-scu","syscon";
|
||||
reg = <0x0 0x17000000 0x0 0x400>;
|
||||
};
|
||||
114
Documentation/devicetree/bindings/arm/apple.yaml
Normal file
114
Documentation/devicetree/bindings/arm/apple.yaml
Normal file
@@ -0,0 +1,114 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/apple.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Apple ARM Machine
|
||||
|
||||
maintainers:
|
||||
- Hector Martin <marcan@marcan.st>
|
||||
|
||||
description: |
|
||||
ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon".
|
||||
|
||||
This currently includes devices based on the "M1" SoC:
|
||||
|
||||
- Mac mini (M1, 2020)
|
||||
- MacBook Pro (13-inch, M1, 2020)
|
||||
- MacBook Air (M1, 2020)
|
||||
- iMac (24-inch, M1, 2021)
|
||||
|
||||
Devices based on the "M2" SoC:
|
||||
|
||||
- MacBook Air (M2, 2022)
|
||||
- MacBook Pro (13-inch, M2, 2022)
|
||||
- Mac mini (M2, 2023)
|
||||
|
||||
And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:
|
||||
|
||||
- MacBook Pro (14-inch, M1 Pro, 2021)
|
||||
- MacBook Pro (14-inch, M1 Max, 2021)
|
||||
- MacBook Pro (16-inch, M1 Pro, 2021)
|
||||
- MacBook Pro (16-inch, M1 Max, 2021)
|
||||
- Mac Studio (M1 Max, 2022)
|
||||
- Mac Studio (M1 Ultra, 2022)
|
||||
|
||||
The compatible property should follow this format:
|
||||
|
||||
compatible = "apple,<targettype>", "apple,<socid>", "apple,arm-platform";
|
||||
|
||||
<targettype> represents the board/device and comes from the `target-type`
|
||||
property of the root node of the Apple Device Tree, lowercased. It can be
|
||||
queried on macOS using the following command:
|
||||
|
||||
$ ioreg -d2 -l | grep target-type
|
||||
|
||||
<socid> is the lowercased SoC ID. Apple uses at least *five* different
|
||||
names for their SoCs:
|
||||
|
||||
- Marketing name ("M1")
|
||||
- Internal name ("H13G")
|
||||
- Codename ("Tonga")
|
||||
- SoC ID ("T8103")
|
||||
- Package/IC part number ("APL1102")
|
||||
|
||||
Devicetrees should use the lowercased SoC ID, to avoid confusion if
|
||||
multiple SoCs share the same marketing name. This can be obtained from
|
||||
the `compatible` property of the arm-io node of the Apple Device Tree,
|
||||
which can be queried as follows on macOS:
|
||||
|
||||
$ ioreg -n arm-io | grep compatible
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Apple M1 SoC based platforms
|
||||
items:
|
||||
- enum:
|
||||
- apple,j274 # Mac mini (M1, 2020)
|
||||
- apple,j293 # MacBook Pro (13-inch, M1, 2020)
|
||||
- apple,j313 # MacBook Air (M1, 2020)
|
||||
- apple,j456 # iMac (24-inch, 4x USB-C, M1, 2021)
|
||||
- apple,j457 # iMac (24-inch, 2x USB-C, M1, 2021)
|
||||
- const: apple,t8103
|
||||
- const: apple,arm-platform
|
||||
|
||||
- description: Apple M2 SoC based platforms
|
||||
items:
|
||||
- enum:
|
||||
- apple,j413 # MacBook Air (M2, 2022)
|
||||
- apple,j473 # Mac mini (M2, 2023)
|
||||
- apple,j493 # MacBook Pro (13-inch, M2, 2022)
|
||||
- const: apple,t8112
|
||||
- const: apple,arm-platform
|
||||
|
||||
- description: Apple M1 Pro SoC based platforms
|
||||
items:
|
||||
- enum:
|
||||
- apple,j314s # MacBook Pro (14-inch, M1 Pro, 2021)
|
||||
- apple,j316s # MacBook Pro (16-inch, M1 Pro, 2021)
|
||||
- const: apple,t6000
|
||||
- const: apple,arm-platform
|
||||
|
||||
- description: Apple M1 Max SoC based platforms
|
||||
items:
|
||||
- enum:
|
||||
- apple,j314c # MacBook Pro (14-inch, M1 Max, 2021)
|
||||
- apple,j316c # MacBook Pro (16-inch, M1 Max, 2021)
|
||||
- apple,j375c # Mac Studio (M1 Max, 2022)
|
||||
- const: apple,t6001
|
||||
- const: apple,arm-platform
|
||||
|
||||
- description: Apple M1 Ultra SoC based platforms
|
||||
items:
|
||||
- enum:
|
||||
- apple,j375d # Mac Studio (M1 Ultra, 2022)
|
||||
- const: apple,t6002
|
||||
- const: apple,arm-platform
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
135
Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
Normal file
135
Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
Normal file
@@ -0,0 +1,135 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/apple/apple,pmgr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Apple SoC Power Manager (PMGR)
|
||||
|
||||
maintainers:
|
||||
- Hector Martin <marcan@marcan.st>
|
||||
|
||||
description: |
|
||||
Apple SoCs include PMGR blocks responsible for power management,
|
||||
which can control various clocks, resets, power states, and
|
||||
performance features. This node represents the PMGR as a syscon,
|
||||
with sub-nodes representing individual features.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^power-management@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- apple,t8103-pmgr
|
||||
- apple,t8112-pmgr
|
||||
- apple,t6000-pmgr
|
||||
- const: apple,pmgr
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
"power-controller@[0-9a-f]+$":
|
||||
description:
|
||||
The individual power management domains within this controller
|
||||
type: object
|
||||
$ref: /schemas/power/apple,pmgr-pwrstate.yaml#
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
power-management@23b700000 {
|
||||
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x2 0x3b700000 0x0 0x14000>;
|
||||
|
||||
ps_sio: power-controller@1c0 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x1c0 8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "sio";
|
||||
apple,always-on;
|
||||
};
|
||||
|
||||
ps_uart_p: power-controller@220 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x220 8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart_p";
|
||||
power-domains = <&ps_sio>;
|
||||
};
|
||||
|
||||
ps_uart0: power-controller@270 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x270 8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "uart0";
|
||||
power-domains = <&ps_uart_p>;
|
||||
};
|
||||
};
|
||||
|
||||
power-management@23d280000 {
|
||||
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x2 0x3d280000 0x0 0xc000>;
|
||||
|
||||
ps_aop_filter: power-controller@4000 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x4000 8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_filter";
|
||||
};
|
||||
|
||||
ps_aop_base: power-controller@4010 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x4010 8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_base";
|
||||
power-domains = <&ps_aop_filter>;
|
||||
};
|
||||
|
||||
ps_aop_shim: power-controller@4038 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x4038 8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_shim";
|
||||
power-domains = <&ps_aop_base>;
|
||||
};
|
||||
|
||||
ps_aop_uart0: power-controller@4048 {
|
||||
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
|
||||
reg = <0x4048 8>;
|
||||
#power-domain-cells = <0>;
|
||||
#reset-cells = <0>;
|
||||
label = "aop_uart0";
|
||||
power-domains = <&ps_aop_shim>;
|
||||
};
|
||||
};
|
||||
};
|
||||
211
Documentation/devicetree/bindings/arm/arm,cci-400.yaml
Normal file
211
Documentation/devicetree/bindings/arm/arm,cci-400.yaml
Normal file
@@ -0,0 +1,211 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM CCI Cache Coherent Interconnect
|
||||
|
||||
maintainers:
|
||||
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
|
||||
description: >
|
||||
ARM multi-cluster systems maintain intra-cluster coherency through a cache
|
||||
coherent interconnect (CCI) that is capable of monitoring bus transactions
|
||||
and manage coherency, TLB invalidations and memory barriers.
|
||||
|
||||
It allows snooping and distributed virtual memory message broadcast across
|
||||
clusters, through memory mapped interface, with a global control register
|
||||
space and multiple sets of interface control registers, one per slave
|
||||
interface.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^cci(@[0-9a-f]+)?$"
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- arm,cci-400
|
||||
- arm,cci-500
|
||||
- arm,cci-550
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: >
|
||||
Specifies base physical address of CCI control registers common to all
|
||||
interfaces.
|
||||
|
||||
"#address-cells": true
|
||||
"#size-cells": true
|
||||
ranges: true
|
||||
|
||||
patternProperties:
|
||||
"^slave-if@[0-9a-f]+$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,cci-400-ctrl-if
|
||||
|
||||
interface-type:
|
||||
enum:
|
||||
- ace
|
||||
- ace-lite
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interface-type
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
"^pmu@[0-9a-f]+$":
|
||||
type: object
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: arm,cci-400-pmu,r0
|
||||
- const: arm,cci-400-pmu,r1
|
||||
- const: arm,cci-400-pmu
|
||||
deprecated: true
|
||||
description: >
|
||||
Permitted only where OS has secure access to CCI registers
|
||||
- const: arm,cci-500-pmu,r0
|
||||
- const: arm,cci-550-pmu,r0
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
description: >
|
||||
List of counter overflow interrupts, one per counter. The interrupts
|
||||
must be specified starting with the cycle counter overflow interrupt,
|
||||
followed by counter0 overflow interrupt, counter1 overflow
|
||||
interrupt,... ,counterN overflow interrupt.
|
||||
|
||||
The CCI PMU has an interrupt signal for each counter. The number of
|
||||
interrupts must be equal to the number of counters.
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- compatible
|
||||
- ranges
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
/ {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
|
||||
model = "V2P-CA15_CA7";
|
||||
arm,hbi = <0x249>;
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
gic: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
/*
|
||||
* This CCI node corresponds to a CCI component whose control
|
||||
* registers sits at address 0x000000002c090000.
|
||||
*
|
||||
* CCI slave interface @0x000000002c091000 is connected to dma
|
||||
* controller dma0.
|
||||
*
|
||||
* CCI slave interface @0x000000002c094000 is connected to CPUs
|
||||
* {CPU0, CPU1};
|
||||
*
|
||||
* CCI slave interface @0x000000002c095000 is connected to CPUs
|
||||
* {CPU2, CPU3};
|
||||
*/
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
CPU0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
cci-control-port = <&cci_control1>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
cci-control-port = <&cci_control1>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
CPU2: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
cci-control-port = <&cci_control2>;
|
||||
reg = <0x100>;
|
||||
};
|
||||
|
||||
CPU3: cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
cci-control-port = <&cci_control2>;
|
||||
reg = <0x101>;
|
||||
};
|
||||
};
|
||||
|
||||
cci@2c090000 {
|
||||
compatible = "arm,cci-400";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x0 0x2c090000 0 0x1000>;
|
||||
ranges = <0x0 0x0 0x2c090000 0x10000>;
|
||||
|
||||
cci_control0: slave-if@1000 {
|
||||
compatible = "arm,cci-400-ctrl-if";
|
||||
interface-type = "ace-lite";
|
||||
reg = <0x1000 0x1000>;
|
||||
};
|
||||
|
||||
cci_control1: slave-if@4000 {
|
||||
compatible = "arm,cci-400-ctrl-if";
|
||||
interface-type = "ace";
|
||||
reg = <0x4000 0x1000>;
|
||||
};
|
||||
|
||||
cci_control2: slave-if@5000 {
|
||||
compatible = "arm,cci-400-ctrl-if";
|
||||
interface-type = "ace";
|
||||
reg = <0x5000 0x1000>;
|
||||
};
|
||||
|
||||
pmu@9000 {
|
||||
compatible = "arm,cci-400-pmu";
|
||||
reg = <0x9000 0x5000>;
|
||||
interrupts = <0 101 4>,
|
||||
<0 102 4>,
|
||||
<0 103 4>,
|
||||
<0 104 4>,
|
||||
<0 105 4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
104
Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml
Normal file
104
Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml
Normal file
@@ -0,0 +1,104 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-catu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm Coresight Address Translation Unit (CATU)
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The CoreSight Address Translation Unit (CATU) translates addresses between an
|
||||
AXI master and system memory. The CATU is normally used along with the TMC to
|
||||
implement scattering of virtual trace buffers in physical memory. The CATU
|
||||
translates contiguous Virtual Addresses (VAs) from an AXI master into
|
||||
non-contiguous Physical Addresses (PAs) that are intended for system memory.
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-catu
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-catu
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: Address translation error interrupt
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: AXI Slave connected to another Coresight component
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- in-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
catu@207e0000 {
|
||||
compatible = "arm,coresight-catu", "arm,primecell";
|
||||
reg = <0x207e0000 0x1000>;
|
||||
|
||||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
in-ports {
|
||||
port {
|
||||
catu_in_port: endpoint {
|
||||
remote-endpoint = <&etr_out_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,81 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-cpu-debug.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: CoreSight CPU Debug Component
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight CPU debug component are compliant with the ARMv8 architecture
|
||||
reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
|
||||
external debug module is mainly used for two modes: self-hosted debug and
|
||||
external debug, and it can be accessed from mmio region from Coresight and
|
||||
eventually the debug module connects with CPU for debugging. And the debug
|
||||
module provides sample-based profiling extension, which can be used to sample
|
||||
CPU program counter, secure state and exception level, etc; usually every CPU
|
||||
has one dedicated debug module to be connected.
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-cpu-debug
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-cpu-debug
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
|
||||
cpu:
|
||||
description:
|
||||
A phandle to the cpu this debug component is bound to.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
description:
|
||||
A phandle to the debug power domain if the debug logic has its own
|
||||
dedicated power domain. CPU idle states may also need to be separately
|
||||
constrained to keep CPU cores powered.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- cpu
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
debug@f6590000 {
|
||||
compatible = "arm,coresight-cpu-debug", "arm,primecell";
|
||||
reg = <0xf6590000 0x1000>;
|
||||
clocks = <&sys_ctrl 1>;
|
||||
clock-names = "apb_pclk";
|
||||
cpu = <&cpu0>;
|
||||
};
|
||||
...
|
||||
334
Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
Normal file
334
Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml
Normal file
@@ -0,0 +1,334 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
# Copyright 2019 Linaro Ltd.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Coresight Cross Trigger Interface (CTI) device.
|
||||
|
||||
description: |
|
||||
The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected
|
||||
to one or more CoreSight components and/or a CPU, with CTIs interconnected in
|
||||
a star topology via the Cross Trigger Matrix (CTM), which is not programmable.
|
||||
The ECT components are not part of the trace generation data path and are thus
|
||||
not part of the CoreSight graph.
|
||||
|
||||
The CTI component properties define the connections between the individual
|
||||
CTI and the components it is directly connected to, consisting of input and
|
||||
output hardware trigger signals. CTIs can have a maximum number of input and
|
||||
output hardware trigger signals (8 each for v1 CTI, 32 each for v2 CTI). The
|
||||
number is defined at design time, the maximum of each defined in the DEVID
|
||||
register.
|
||||
|
||||
CTIs are interconnected in a star topology via the CTM, using a number of
|
||||
programmable channels, usually 4, but again implementation defined and
|
||||
described in the DEVID register. The star topology is not required to be
|
||||
described in the bindings as the actual connections are software
|
||||
programmable.
|
||||
|
||||
In general the connections between CTI and components via the trigger signals
|
||||
are implementation defined, except when the CTI is connected to an ARM v8
|
||||
architecture core and optional ETM.
|
||||
|
||||
In this case the ARM v8 architecture defines the required signal connections
|
||||
between CTI and the CPU core and ETM if present. In the case of a v8
|
||||
architecturally connected CTI an additional compatible string is used to
|
||||
indicate this feature (arm,coresight-cti-v8-arch).
|
||||
|
||||
When CTI trigger connection information is unavailable then a minimal driver
|
||||
binding can be declared with no explicit trigger signals. This will result
|
||||
the driver detecting the maximum available triggers and channels from the
|
||||
DEVID register and make them all available for use as a single default
|
||||
connection. Any user / client application will require additional information
|
||||
on the connections between the CTI and other components for correct operation.
|
||||
This information might be found by enabling the Integration Test registers in
|
||||
the driver (set CONFIG_CORESIGHT_CTI_INTEGRATION_TEST in Kernel
|
||||
configuration). These registers may be used to explore the trigger connections
|
||||
between CTI and other CoreSight components.
|
||||
|
||||
Certain triggers between CoreSight devices and the CTI have specific types
|
||||
and usages. These can be defined along with the signal indexes with the
|
||||
constants defined in <dt-bindings/arm/coresight-cti-dt.h>
|
||||
|
||||
For example a CTI connected to a core will usually have a DBGREQ signal. This
|
||||
is defined in the binding as type PE_EDBGREQ. These types will appear in an
|
||||
optional array alongside the signal indexes. Omitting types will default all
|
||||
signals to GEN_IO.
|
||||
|
||||
Note that some hardware trigger signals can be connected to non-CoreSight
|
||||
components (e.g. UART etc) depending on hardware implementation.
|
||||
|
||||
maintainers:
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- arm,coresight-cti
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^cti(@[0-9a-f]+)$"
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: arm,coresight-cti
|
||||
- const: arm,primecell
|
||||
- items:
|
||||
- const: arm,coresight-cti-v8-arch
|
||||
- const: arm,coresight-cti
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
cpu:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Handle to cpu this device is associated with. This must appear in the
|
||||
base cti node if compatible string arm,coresight-cti-v8-arch is used,
|
||||
or may appear in a trig-conns child node when appropriate.
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
arm,cti-ctm-id:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
Defines the CTM this CTI is connected to, in large systems with multiple
|
||||
separate CTI/CTM nets. Typically multi-socket systems where the CTM is
|
||||
propagated between sockets.
|
||||
|
||||
arm,cs-dev-assoc:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
defines a phandle reference to an associated CoreSight trace device.
|
||||
When the associated trace device is enabled, then the respective CTI
|
||||
will be enabled. Use in a trig-conns node, or in CTI base node when
|
||||
compatible string arm,coresight-cti-v8-arch used. If the associated
|
||||
device has not been registered then the node name will be stored as
|
||||
the connection name for later resolution. If the associated device is
|
||||
not a CoreSight device or not registered then the node name will remain
|
||||
the connection name and automatic enabling will not occur.
|
||||
|
||||
# size cells and address cells required if trig-conns node present.
|
||||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
'^trig-conns@([0-9]+)$':
|
||||
type: object
|
||||
description:
|
||||
A trigger connections child node which describes the trigger signals
|
||||
between this CTI and another hardware device. This device may be a CPU,
|
||||
CoreSight device, any other hardware device or simple external IO lines.
|
||||
The connection may have both input and output triggers, or only one or the
|
||||
other.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
arm,trig-in-sigs:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
description:
|
||||
List of CTI trigger in signal numbers in use by a trig-conns node.
|
||||
|
||||
arm,trig-in-types:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
description:
|
||||
List of constants representing the types for the CTI trigger in
|
||||
signals. Types in this array match to the corresponding signal in the
|
||||
arm,trig-in-sigs array. If the -types array is smaller, or omitted
|
||||
completely, then the types will default to GEN_IO.
|
||||
|
||||
arm,trig-out-sigs:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
description:
|
||||
List of CTI trigger out signal numbers in use by a trig-conns node.
|
||||
|
||||
arm,trig-out-types:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
description:
|
||||
List of constants representing the types for the CTI trigger out
|
||||
signals. Types in this array match to the corresponding signal
|
||||
in the arm,trig-out-sigs array. If the "-types" array is smaller,
|
||||
or omitted completely, then the types will default to GEN_IO.
|
||||
|
||||
arm,trig-filters:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
description:
|
||||
List of CTI trigger out signals that will be blocked from becoming
|
||||
active, unless filtering is disabled on the driver.
|
||||
|
||||
arm,trig-conn-name:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description:
|
||||
Defines a connection name that will be displayed, if the cpu or
|
||||
arm,cs-dev-assoc properties are not being used in this connection.
|
||||
Principle use for CTI that are connected to non-CoreSight devices, or
|
||||
external IO.
|
||||
|
||||
anyOf:
|
||||
- required:
|
||||
- arm,trig-in-sigs
|
||||
- required:
|
||||
- arm,trig-out-sigs
|
||||
oneOf:
|
||||
- required:
|
||||
- arm,trig-conn-name
|
||||
- required:
|
||||
- cpu
|
||||
- required:
|
||||
- arm,cs-dev-assoc
|
||||
required:
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-cti-v8-arch
|
||||
|
||||
then:
|
||||
required:
|
||||
- cpu
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
# minimum CTI definition. DEVID register used to set number of triggers.
|
||||
- |
|
||||
cti@20020000 {
|
||||
compatible = "arm,coresight-cti", "arm,primecell";
|
||||
reg = <0x20020000 0x1000>;
|
||||
|
||||
clocks = <&soc_smc50mhz>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
# v8 architecturally defined CTI - CPU + ETM connections generated by the
|
||||
# driver according to the v8 architecture specification.
|
||||
- |
|
||||
cti@859000 {
|
||||
compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
|
||||
"arm,primecell";
|
||||
reg = <0x859000 0x1000>;
|
||||
|
||||
clocks = <&soc_smc50mhz>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
cpu = <&CPU1>;
|
||||
arm,cs-dev-assoc = <&etm1>;
|
||||
};
|
||||
# Implementation defined CTI - CPU + ETM connections explicitly defined..
|
||||
# Shows use of type constants from dt-bindings/arm/coresight-cti-dt.h
|
||||
# #size-cells and #address-cells are required if trig-conns@ nodes present.
|
||||
- |
|
||||
#include <dt-bindings/arm/coresight-cti-dt.h>
|
||||
|
||||
cti@858000 {
|
||||
compatible = "arm,coresight-cti", "arm,primecell";
|
||||
reg = <0x858000 0x1000>;
|
||||
|
||||
clocks = <&soc_smc50mhz>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
arm,cti-ctm-id = <1>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
trig-conns@0 {
|
||||
reg = <0>;
|
||||
arm,trig-in-sigs = <4 5 6 7>;
|
||||
arm,trig-in-types = <ETM_EXTOUT
|
||||
ETM_EXTOUT
|
||||
ETM_EXTOUT
|
||||
ETM_EXTOUT>;
|
||||
arm,trig-out-sigs = <4 5 6 7>;
|
||||
arm,trig-out-types = <ETM_EXTIN
|
||||
ETM_EXTIN
|
||||
ETM_EXTIN
|
||||
ETM_EXTIN>;
|
||||
arm,cs-dev-assoc = <&etm0>;
|
||||
};
|
||||
|
||||
trig-conns@1 {
|
||||
reg = <1>;
|
||||
cpu = <&CPU0>;
|
||||
arm,trig-in-sigs = <0 1>;
|
||||
arm,trig-in-types = <PE_DBGTRIGGER
|
||||
PE_PMUIRQ>;
|
||||
arm,trig-out-sigs = <0 1 2 >;
|
||||
arm,trig-out-types = <PE_EDBGREQ
|
||||
PE_DBGRESTART
|
||||
PE_CTIIRQ>;
|
||||
|
||||
arm,trig-filters = <0>;
|
||||
};
|
||||
};
|
||||
# Implementation defined CTI - non CoreSight component connections.
|
||||
- |
|
||||
cti@20110000 {
|
||||
compatible = "arm,coresight-cti", "arm,primecell";
|
||||
reg = <0x20110000 0x1000>;
|
||||
|
||||
clocks = <&soc_smc50mhz>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
trig-conns@0 {
|
||||
reg = <0>;
|
||||
arm,trig-in-sigs = <0>;
|
||||
arm,trig-in-types = <GEN_INTREQ>;
|
||||
arm,trig-out-sigs = <0>;
|
||||
arm,trig-out-types = <GEN_HALTREQ>;
|
||||
arm,trig-conn-name = "sys_profiler";
|
||||
};
|
||||
|
||||
trig-conns@1 {
|
||||
reg = <1>;
|
||||
arm,trig-out-sigs = <2 3>;
|
||||
arm,trig-out-types = <GEN_HALTREQ GEN_RESTARTREQ>;
|
||||
arm,trig-conn-name = "watchdog";
|
||||
};
|
||||
|
||||
trig-conns@2 {
|
||||
reg = <2>;
|
||||
arm,trig-in-sigs = <1 6>;
|
||||
arm,trig-in-types = <GEN_HALTREQ GEN_RESTARTREQ>;
|
||||
arm,trig-conn-name = "g_counter";
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@@ -0,0 +1,73 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Coresight Dummy sink component
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The Coresight dummy sink component is for the specific coresight sink devices
|
||||
kernel don't have permission to access or configure, e.g., CoreSight EUD on
|
||||
Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
|
||||
debug and trace capabilities. For this device, a dummy driver is needed to
|
||||
register it as Coresight sink device in kernel side, so that path can be
|
||||
created in the driver. Then the trace flow would be transferred to EUD via
|
||||
coresight link of AP processor. It provides Coresight API for operations on
|
||||
dummy source devices, such as enabling and disabling them. It also provides
|
||||
the Coresight dummy source paths for debugging.
|
||||
|
||||
The primary use case of the coresight dummy sink is to build path in kernel
|
||||
side for dummy sink component.
|
||||
|
||||
maintainers:
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
- James Clark <james.clark@arm.com>
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Hao Zhang <quic_hazha@quicinc.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- arm,coresight-dummy-sink
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Input connection from the Coresight Trace bus to
|
||||
dummy sink, such as Embedded USB debugger(EUD).
|
||||
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- in-ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# Minimum dummy sink definition. Dummy sink connect to coresight replicator.
|
||||
- |
|
||||
sink {
|
||||
compatible = "arm,coresight-dummy-sink";
|
||||
|
||||
in-ports {
|
||||
port {
|
||||
eud_in_replicator_swao: endpoint {
|
||||
remote-endpoint = <&replicator_swao_out_eud>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@@ -0,0 +1,71 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Coresight Dummy source component
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The Coresight dummy source component is for the specific coresight source
|
||||
devices kernel don't have permission to access or configure. For some SOCs,
|
||||
there would be Coresight source trace components on sub-processor which
|
||||
are conneted to AP processor via debug bus. For these devices, a dummy driver
|
||||
is needed to register them as Coresight source devices, so that paths can be
|
||||
created in the driver. It provides Coresight API for operations on dummy
|
||||
source devices, such as enabling and disabling them. It also provides the
|
||||
Coresight dummy source paths for debugging.
|
||||
|
||||
The primary use case of the coresight dummy source is to build path in kernel
|
||||
side for dummy source component.
|
||||
|
||||
maintainers:
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
- James Clark <james.clark@arm.com>
|
||||
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||
- Hao Zhang <quic_hazha@quicinc.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- arm,coresight-dummy-source
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Output connection from the source to Coresight
|
||||
Trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- out-ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
# Minimum dummy source definition. Dummy source connect to coresight funnel.
|
||||
- |
|
||||
source {
|
||||
compatible = "arm,coresight-dummy-source";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
dummy_riscv_out_funnel_swao: endpoint {
|
||||
remote-endpoint = <&funnel_swao_in_dummy_riscv>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
@@ -0,0 +1,129 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight Programmable Trace Bus Funnel
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The Coresight funnel merges 2-8 trace sources into a single trace
|
||||
stream with programmable enable and priority of input ports.
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-dynamic-funnel
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-dynamic-funnel
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
'^port(@[0-7])?$':
|
||||
description: Input connections from CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Output connection to CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- in-ports
|
||||
- out-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
funnel@20040000 {
|
||||
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
|
||||
reg = <0x20040000 0x1000>;
|
||||
|
||||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
out-ports {
|
||||
port {
|
||||
funnel_out_port0: endpoint {
|
||||
remote-endpoint = <&replicator_in_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
funnel_in_port0: endpoint {
|
||||
remote-endpoint = <&ptm0_out_port>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
funnel_in_port1: endpoint {
|
||||
remote-endpoint = <&ptm1_out_port>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
funnel_in_port2: endpoint {
|
||||
remote-endpoint = <&etm0_out_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,129 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm Coresight Programmable Trace Bus Replicator
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The Coresight replicator splits a single trace stream into two trace streams
|
||||
for systems that have more than one trace sink component.
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-dynamic-replicator
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-dynamic-replicator
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
qcom,replicator-loses-context:
|
||||
type: boolean
|
||||
description:
|
||||
Indicates that the replicator will lose register context when AMBA clock
|
||||
is removed which is observed in some replicator designs.
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Input connection from CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
'^port(@[01])?$':
|
||||
description: Output connections to CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- in-ports
|
||||
- out-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
replicator@20120000 {
|
||||
compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
|
||||
reg = <0x20120000 0x1000>;
|
||||
|
||||
clocks = <&soc_smc50mhz>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
out-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* replicator output ports */
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
replicator_out_port0: endpoint {
|
||||
remote-endpoint = <&tpiu_in_port>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
replicator_out_port1: endpoint {
|
||||
remote-endpoint = <&etr_in_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
in-ports {
|
||||
port {
|
||||
replicator_in_port0: endpoint {
|
||||
remote-endpoint = <&csys2_funnel_out_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,95 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-etb10.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight Embedded Trace Buffer
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The CoreSight Embedded Trace Buffer stores traces in a dedicated SRAM that is
|
||||
used as a circular buffer.
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-etb10
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-etb10
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Input connection from CoreSight Trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- in-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
etb@20010000 {
|
||||
compatible = "arm,coresight-etb10", "arm,primecell";
|
||||
reg = <0x20010000 0x1000>;
|
||||
|
||||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
in-ports {
|
||||
port {
|
||||
etb_in_port: endpoint {
|
||||
remote-endpoint = <&replicator_out_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
159
Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml
Normal file
159
Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml
Normal file
@@ -0,0 +1,159 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-etm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight Embedded Trace MacroCell
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The Embedded Trace Macrocell (ETM) is a real-time trace module providing
|
||||
instruction and data tracing of a processor.
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- arm,coresight-etm3x
|
||||
- arm,coresight-etm4x
|
||||
- arm,coresight-etm4x-sysreg
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-etm4x-sysreg
|
||||
then:
|
||||
$ref: /schemas/arm/primecell.yaml#
|
||||
required:
|
||||
- reg
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- description:
|
||||
Embedded Trace Macrocell with memory mapped access.
|
||||
items:
|
||||
- enum:
|
||||
- arm,coresight-etm3x
|
||||
- arm,coresight-etm4x
|
||||
- const: arm,primecell
|
||||
- description:
|
||||
Embedded Trace Macrocell (version 4.x), with system register access only
|
||||
const: arm,coresight-etm4x-sysreg
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
arm,coresight-loses-context-with-cpu:
|
||||
type: boolean
|
||||
description:
|
||||
Indicates that the hardware will lose register context on CPU power down
|
||||
(e.g. CPUIdle). An example of where this may be needed are systems which
|
||||
contain a coresight component and CPU in the same power domain. When the
|
||||
CPU powers down the coresight component also powers down and loses its
|
||||
context.
|
||||
|
||||
arm,cp14:
|
||||
type: boolean
|
||||
description:
|
||||
Must be present if the system accesses ETM/PTM management registers via
|
||||
co-processor 14.
|
||||
|
||||
qcom,skip-power-up:
|
||||
type: boolean
|
||||
description:
|
||||
Indicates that an implementation can skip powering up the trace unit.
|
||||
TRCPDCR.PU does not have to be set on Qualcomm Technologies Inc. systems
|
||||
since ETMs are in the same power domain as their CPU cores. This property
|
||||
is required to identify such systems with hardware errata where the CPU
|
||||
watchdog counter is stopped when TRCPDCR.PU is set.
|
||||
|
||||
cpu:
|
||||
description:
|
||||
phandle to the cpu this ETM is bound to.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Output connection from the ETM to CoreSight Trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- clock-names
|
||||
- cpu
|
||||
- out-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
ptm@2201c000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0x2201c000 0x1000>;
|
||||
|
||||
cpu = <&cpu0>;
|
||||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
out-ports {
|
||||
port {
|
||||
ptm0_out_port: endpoint {
|
||||
remote-endpoint = <&funnel_in_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ptm@2201d000 {
|
||||
compatible = "arm,coresight-etm3x", "arm,primecell";
|
||||
reg = <0x2201d000 0x1000>;
|
||||
|
||||
cpu = <&cpu1>;
|
||||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
out-ports {
|
||||
port {
|
||||
ptm1_out_port: endpoint {
|
||||
remote-endpoint = <&funnel_in_port1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,93 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-static-funnel.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight Static Trace Bus Funnel
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The Coresight static funnel merges 2-8 trace sources into a single trace
|
||||
stream.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,coresight-static-funnel
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
'^port@[0-7]$':
|
||||
description: Input connections from CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Output connection to CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- in-ports
|
||||
- out-ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
funnel {
|
||||
/*
|
||||
* non-configurable replicators don't show up on the
|
||||
* AMBA bus. As such no need to add "arm,primecell".
|
||||
*/
|
||||
compatible = "arm,coresight-static-funnel";
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
combo_funnel_out: endpoint {
|
||||
remote-endpoint = <&top_funnel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
combo_funnel_in0: endpoint {
|
||||
remote-endpoint = <&cluster0_etf_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
combo_funnel_in1: endpoint {
|
||||
remote-endpoint = <&cluster1_etf_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,94 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-static-replicator.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight Static Trace Bus Replicator
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The Coresight replicator splits a single trace stream into two trace streams
|
||||
for systems that have more than one trace sink component.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,coresight-static-replicator
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Input connection from CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
patternProperties:
|
||||
'^port@[01]$':
|
||||
description: Output connections to CoreSight Trace bus
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- in-ports
|
||||
- out-ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
replicator {
|
||||
/*
|
||||
* non-configurable replicators don't show up on the
|
||||
* AMBA bus. As such no need to add "arm,primecell".
|
||||
*/
|
||||
compatible = "arm,coresight-static-replicator";
|
||||
|
||||
out-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* replicator output ports */
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
replicator_out_port0: endpoint {
|
||||
remote-endpoint = <&etb_in_port>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
replicator_out_port1: endpoint {
|
||||
remote-endpoint = <&tpiu_in_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
in-ports {
|
||||
port {
|
||||
replicator_in_port0: endpoint {
|
||||
remote-endpoint = <&funnel_out_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
104
Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml
Normal file
104
Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml
Normal file
@@ -0,0 +1,104 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight System Trace MacroCell
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The STM is a trace source that is integrated into a CoreSight system, designed
|
||||
primarily for high-bandwidth trace of instrumentation embedded into software.
|
||||
This instrumentation is made up of memory-mapped writes to the STM Advanced
|
||||
eXtensible Interface (AXI) slave, which carry information about the behavior
|
||||
of the software.
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-stm
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-stm
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: stm-base
|
||||
- const: stm-stimulus-base
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Output connection to the CoreSight Trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- out-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
stm@20100000 {
|
||||
compatible = "arm,coresight-stm", "arm,primecell";
|
||||
reg = <0x20100000 0x1000>,
|
||||
<0x28000000 0x180000>;
|
||||
reg-names = "stm-base", "stm-stimulus-base";
|
||||
|
||||
clocks = <&soc_smc50mhz>;
|
||||
clock-names = "apb_pclk";
|
||||
out-ports {
|
||||
port {
|
||||
stm_out_port: endpoint {
|
||||
remote-endpoint = <&main_funnel_in_port2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
137
Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
Normal file
137
Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
Normal file
@@ -0,0 +1,137 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight Trace Memory Controller
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
Trace Memory Controller is used for Embedded Trace Buffer(ETB), Embedded Trace
|
||||
FIFO(ETF) and Embedded Trace Router(ETR) configurations. The configuration
|
||||
mode (ETB, ETF, ETR) is discovered at boot time when the device is probed.
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-tmc
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-tmc
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
arm,buffer-size:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
deprecated: true
|
||||
description:
|
||||
Size of contiguous buffer space for TMC ETR (embedded trace router). The
|
||||
buffer size can be configured dynamically via buffer_size property in
|
||||
sysfs instead.
|
||||
|
||||
arm,scatter-gather:
|
||||
type: boolean
|
||||
description:
|
||||
Indicates that the TMC-ETR can safely use the SG mode on this system.
|
||||
|
||||
arm,max-burst-size:
|
||||
description:
|
||||
The maximum burst size initiated by TMC on the AXI master interface. The
|
||||
burst size can be in the range [0..15], the setting supports one data
|
||||
transfer per burst up to a maximum of 16 data transfers per burst.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 15
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Input connection from the CoreSight Trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
out-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: AXI or ATB Master output connection. Used for ETR
|
||||
and ETF configurations.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- in-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
etr@20070000 {
|
||||
compatible = "arm,coresight-tmc", "arm,primecell";
|
||||
reg = <0x20070000 0x1000>;
|
||||
|
||||
clocks = <&oscclk6a>;
|
||||
clock-names = "apb_pclk";
|
||||
in-ports {
|
||||
port {
|
||||
etr_in_port: endpoint {
|
||||
remote-endpoint = <&replicator2_out_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
etr_out_port: endpoint {
|
||||
remote-endpoint = <&catu_in_port>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,94 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,coresight-tpiu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm CoreSight Trace Port Interface Unit
|
||||
|
||||
maintainers:
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
- Mike Leach <mike.leach@linaro.org>
|
||||
- Leo Yan <leo.yan@linaro.org>
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
|
||||
description: |
|
||||
CoreSight components are compliant with the ARM CoreSight architecture
|
||||
specification and can be connected in various topologies to suit a particular
|
||||
SoCs tracing needs. These trace components can generally be classified as
|
||||
sinks, links and sources. Trace data produced by one or more sources flows
|
||||
through the intermediate links connecting the source to the currently selected
|
||||
sink.
|
||||
|
||||
The CoreSight Trace Port Interface Unit captures trace data from the trace bus
|
||||
and outputs it to an external trace port.
|
||||
|
||||
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,coresight-tpiu
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/arm/primecell.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,coresight-tpiu
|
||||
- const: arm,primecell
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: apb_pclk
|
||||
- const: atclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
in-ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port:
|
||||
description: Input connection from the CoreSight Trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- in-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
tpiu@e3c05000 {
|
||||
compatible = "arm,coresight-tpiu", "arm,primecell";
|
||||
reg = <0xe3c05000 0x1000>;
|
||||
|
||||
clocks = <&clk_375m>;
|
||||
clock-names = "apb_pclk";
|
||||
in-ports {
|
||||
port {
|
||||
tpiu_in_port: endpoint {
|
||||
remote-endpoint = <&funnel4_out_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
45
Documentation/devicetree/bindings/arm/arm,corstone1000.yaml
Normal file
45
Documentation/devicetree/bindings/arm/arm,corstone1000.yaml
Normal file
@@ -0,0 +1,45 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,corstone1000.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Corstone1000
|
||||
|
||||
maintainers:
|
||||
- Vishnu Banavath <vishnu.banavath@arm.com>
|
||||
- Rui Miguel Silva <rui.silva@linaro.org>
|
||||
|
||||
description: |+
|
||||
ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that
|
||||
provides a flexible compute architecture that combines Cortex‑A and Cortex‑M
|
||||
processors.
|
||||
|
||||
Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion
|
||||
systems for M-Class (or other) processors for adding sensors, connectivity,
|
||||
video, audio and machine learning at the edge System and security IPs to build
|
||||
a secure SoC for a range of rich IoT applications, for example gateways, smart
|
||||
cameras and embedded systems.
|
||||
|
||||
Integrated Secure Enclave providing hardware Root of Trust and supporting
|
||||
seamless integration of the optional CryptoCell™-312 cryptographic
|
||||
accelerator.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: Corstone1000 MPS3 it has 1 Cortex-A35 CPU core in a FPGA
|
||||
implementation of the Corstone1000 in the MPS3 prototyping board. See
|
||||
ARM document DAI0550.
|
||||
items:
|
||||
- const: arm,corstone1000-mps3
|
||||
- description: Corstone1000 FVP is the Fixed Virtual Platform
|
||||
implementation of this system. See ARM ecosystems FVP's.
|
||||
items:
|
||||
- const: arm,corstone1000-fvp
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
@@ -0,0 +1,77 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
# Copyright 2021, Arm Ltd
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Embedded Trace Extensions
|
||||
|
||||
maintainers:
|
||||
- Suzuki K Poulose <suzuki.poulose@arm.com>
|
||||
- Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
|
||||
description: |
|
||||
Arm Embedded Trace Extension(ETE) is a per CPU trace component that
|
||||
allows tracing the CPU execution. It overlaps with the CoreSight ETMv4
|
||||
architecture and has extended support for future architecture changes.
|
||||
The trace generated by the ETE could be stored via legacy CoreSight
|
||||
components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer
|
||||
Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to
|
||||
legacy CoreSight components, a node must be listed per instance, along
|
||||
with any optional connection graph as per the coresight bindings.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^ete([0-9a-f]+)$"
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,embedded-trace-extension
|
||||
|
||||
cpu:
|
||||
description: |
|
||||
Handle to the cpu this ETE is bound to.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
out-ports:
|
||||
description: |
|
||||
Output connections from the ETE to legacy CoreSight trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
properties:
|
||||
port:
|
||||
description: Output connection from the ETE to legacy CoreSight Trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- cpu
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
# An ETE node without legacy CoreSight connections
|
||||
- |
|
||||
ete0 {
|
||||
compatible = "arm,embedded-trace-extension";
|
||||
cpu = <&cpu_0>;
|
||||
};
|
||||
# An ETE node with legacy CoreSight connections
|
||||
- |
|
||||
ete1 {
|
||||
compatible = "arm,embedded-trace-extension";
|
||||
cpu = <&cpu_1>;
|
||||
|
||||
out-ports { /* legacy coresight connection */
|
||||
port {
|
||||
ete1_out_port: endpoint {
|
||||
remote-endpoint = <&funnel_in_port0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
88
Documentation/devicetree/bindings/arm/arm,integrator.yaml
Normal file
88
Documentation/devicetree/bindings/arm/arm,integrator.yaml
Normal file
@@ -0,0 +1,88 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,integrator.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Integrator Boards
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description: |+
|
||||
These were the first ARM platforms officially supported by ARM Ltd.
|
||||
They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
|
||||
so the system is modular and can host a variety of CPU tiles called
|
||||
"core tiles" and referred to in the device tree as "core modules".
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: ARM Integrator Application Platform, this board has a PCI
|
||||
host and several PCI slots, as well as a number of slots for logical
|
||||
expansion modules, it is referred to as an "ASIC Development
|
||||
Motherboard" and is extended with custom FPGA and is intended for
|
||||
rapid prototyping. See ARM DUI 0098B. This board can physically come
|
||||
pre-packaged in a PC Tower form factor called Integrator/PP1 or a
|
||||
special metal fixture called Integrator/PP2, see ARM DUI 0169A.
|
||||
items:
|
||||
- const: arm,integrator-ap
|
||||
- description: ARM Integrator Compact Platform (HBI-0086), this board has
|
||||
a compact form factor and mainly consists of the bare minimum
|
||||
peripherals to make use of the core module. See ARM DUI 0159B.
|
||||
items:
|
||||
- const: arm,integrator-cp
|
||||
- description: ARM Integrator Standard Development Board (SDB) Platform,
|
||||
this board is a PCI-based board conforming to the Microsoft SDB
|
||||
(HARP) specification. See ARM DUI 0099A.
|
||||
items:
|
||||
- const: arm,integrator-sp
|
||||
|
||||
core-module@10000000:
|
||||
type: object
|
||||
description: the root node in the Integrator platforms must contain
|
||||
a core module child node. They are always at physical address
|
||||
0x10000000 in all the Integrator variants.
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,core-module-integrator
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
patternProperties:
|
||||
"^syscon@[0-9a-f]+$":
|
||||
description: All Integrator boards must provide a system controller as a
|
||||
node in the root of the device tree.
|
||||
type: object
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- arm,integrator-ap-syscon
|
||||
- arm,integrator-cp-syscon
|
||||
- arm,integrator-sp-syscon
|
||||
- const: syscon
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- core-module@10000000
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
125
Documentation/devicetree/bindings/arm/arm,realview.yaml
Normal file
125
Documentation/devicetree/bindings/arm/arm,realview.yaml
Normal file
@@ -0,0 +1,125 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,realview.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM RealView Boards
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description: |+
|
||||
The ARM RealView series of reference designs were built to explore the ARM
|
||||
11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to
|
||||
the earlier CPUs such as TrustZone and multicore (MPCore).
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: ARM RealView Emulation Baseboard (HBI-0140) was created
|
||||
as a generic platform to test different FPGA designs, and has
|
||||
pluggable CPU modules, see ARM DUI 0303E.
|
||||
items:
|
||||
- const: arm,realview-eb
|
||||
- description: ARM RealView Platform Baseboard for ARM1176JZF-S
|
||||
(HBI-0147) was created as a development board to test ARM TrustZone,
|
||||
CoreSight and Intelligent Energy Management (IEM) see ARM DUI 0425F.
|
||||
items:
|
||||
- const: arm,realview-pb1176
|
||||
- description: ARM RealView Platform Baseboard for ARM 11 MPCore
|
||||
(HBI-0159, HBI-0175 and HBI-0176) was created to showcase
|
||||
multiprocessing with ARM11 using MPCore using symmetric
|
||||
multiprocessing (SMP). See ARM DUI 0351E.
|
||||
items:
|
||||
- const: arm,realview-pb11mp
|
||||
- description: ARM RealView Platform Baseboard for Cortex-A8 (HBI-0178,
|
||||
HBI-0176 and HBI-0175) was the first reference platform for the
|
||||
Cortex CPU family, including a Cortex-A8 test chip.
|
||||
items:
|
||||
- const: arm,realview-pba8
|
||||
- description: ARM RealView Platform Baseboard Explore for Cortex-A9
|
||||
(HBI-0182 and HBI-0183) was the reference platform for the Cortex-A9
|
||||
CPU.
|
||||
items:
|
||||
- const: arm,realview-pbx
|
||||
|
||||
soc:
|
||||
description: All RealView boards must provide a soc node in the root of the
|
||||
device tree, representing the System-on-Chip since these test chips are
|
||||
rather complex.
|
||||
type: object
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: arm,realview-eb-soc
|
||||
- const: simple-bus
|
||||
- items:
|
||||
- const: arm,realview-pb1176-soc
|
||||
- const: simple-bus
|
||||
- items:
|
||||
- const: arm,realview-pb11mp-soc
|
||||
- const: simple-bus
|
||||
- items:
|
||||
- const: arm,realview-pba8-soc
|
||||
- const: simple-bus
|
||||
- items:
|
||||
- const: arm,realview-pbx-soc
|
||||
- const: simple-bus
|
||||
|
||||
patternProperties:
|
||||
"^.*syscon@[0-9a-f]+$":
|
||||
type: object
|
||||
description: All RealView boards must provide a syscon system controller
|
||||
node inside the soc node.
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: arm,realview-eb11mp-revb-syscon
|
||||
- const: arm,realview-eb-syscon
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
- items:
|
||||
- const: arm,realview-eb11mp-revc-syscon
|
||||
- const: arm,realview-eb-syscon
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
- items:
|
||||
- const: arm,realview-eb-syscon
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
- items:
|
||||
- const: arm,realview-pb1176-syscon
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
- items:
|
||||
- const: arm,realview-pb11mp-syscon
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
- items:
|
||||
- const: arm,realview-pba8-syscon
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
- items:
|
||||
- const: arm,realview-pbx-syscon
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- soc
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
46
Documentation/devicetree/bindings/arm/arm,scu.yaml
Normal file
46
Documentation/devicetree/bindings/arm/arm,scu.yaml
Normal file
@@ -0,0 +1,46 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,scu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Snoop Control Unit (SCU)
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description: |
|
||||
As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
|
||||
with a Snoop Control Unit. The register range is usually 256 (0x100)
|
||||
bytes.
|
||||
|
||||
References:
|
||||
- Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
|
||||
Revision r2p0
|
||||
- Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual
|
||||
Revision r0p1
|
||||
- ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference
|
||||
Manial Revision r2p0
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- arm,cortex-a9-scu
|
||||
- arm,cortex-a5-scu
|
||||
- arm,arm11mp-scu
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
scu@a0410000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0xa0410000 0x100>;
|
||||
};
|
||||
@@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
# Copyright 2021, Arm Ltd
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,trace-buffer-extension.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Trace Buffer Extensions
|
||||
|
||||
maintainers:
|
||||
- Anshuman Khandual <anshuman.khandual@arm.com>
|
||||
|
||||
description: |
|
||||
Arm Trace Buffer Extension (TRBE) is a per CPU component
|
||||
for storing trace generated on the CPU to memory. It is
|
||||
accessed via CPU system registers. The software can verify
|
||||
if it is permitted to use the component by checking the
|
||||
TRBIDR register.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: trbe
|
||||
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,trace-buffer-extension
|
||||
|
||||
interrupts:
|
||||
description: |
|
||||
Exactly 1 PPI must be listed. For heterogeneous systems where
|
||||
TRBE is only supported on a subset of the CPUs, please consult
|
||||
the arm,gic-v3 binding for details on describing a PPI partition.
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
trbe {
|
||||
compatible = "arm,trace-buffer-extension";
|
||||
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
...
|
||||
@@ -0,0 +1,35 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,versatile-sysreg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arm Versatile system registers
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description:
|
||||
This is a system control registers block, providing multiple low level
|
||||
platform functions like board detection and identification, software
|
||||
interrupt generation, MMC and NOR Flash control, etc.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,versatile-sysreg
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
panel:
|
||||
type: object
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
...
|
||||
73
Documentation/devicetree/bindings/arm/arm,versatile.yaml
Normal file
73
Documentation/devicetree/bindings/arm/arm,versatile.yaml
Normal file
@@ -0,0 +1,73 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,versatile.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Versatile Boards
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description: |+
|
||||
The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
|
||||
with various pluggable interface boards, in essence the Versatile PB version
|
||||
is a superset of the Versatile AB version.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: The ARM Versatile Application Baseboard (HBI-0118) is an
|
||||
evaluation board specifically for the ARM926EJ-S. It can be connected
|
||||
to an IB1 interface board for a touchscreen-type use case or an IB2
|
||||
for a candybar phone-type use case. See ARM DUI 0225D.
|
||||
items:
|
||||
- const: arm,versatile-ab
|
||||
- description: The ARM Versatile Platform Baseboard (HBI-0117) is an
|
||||
extension of the Versatile Application Baseboard that includes a
|
||||
PCI host controller. Like the sibling board, it is done specifically
|
||||
for ARM926EJ-S. See ARM DUI 0224B.
|
||||
items:
|
||||
- const: arm,versatile-pb
|
||||
|
||||
core-module@10000000:
|
||||
type: object
|
||||
description: the root node in the Versatile platforms must contain
|
||||
a core module child node. They are always at physical address
|
||||
0x10000000 in all the Versatile variants.
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: arm,core-module-versatile
|
||||
- const: syscon
|
||||
- const: simple-mfd
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
patternProperties:
|
||||
"^syscon@[0-9a-f]+$":
|
||||
type: object
|
||||
description: When fitted with the IB2 Interface Board, the Versatile
|
||||
AB will present an optional system controller node which controls the
|
||||
extra peripherals on the interface board.
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: arm,versatile-ib2-syscon
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- core-module@10000000
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
230
Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
Normal file
230
Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
Normal file
@@ -0,0 +1,230 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM Versatile Express and Juno Boards
|
||||
|
||||
maintainers:
|
||||
- Sudeep Holla <sudeep.holla@arm.com>
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
||||
description: |+
|
||||
ARM's Versatile Express platform were built as reference designs for exploring
|
||||
multicore Cortex-A class systems. The Versatile Express family contains both
|
||||
32 bit (Aarch32) and 64 bit (Aarch64) systems.
|
||||
|
||||
The board consist of a motherboard and one or more daughterboards (tiles). The
|
||||
motherboard provides a set of peripherals. Processor and RAM "live" on the
|
||||
tiles.
|
||||
|
||||
The motherboard and each core tile should be described by a separate Device
|
||||
Tree source file, with the tile's description including the motherboard file
|
||||
using an include directive. As the motherboard can be initialized in one of
|
||||
two different configurations ("memory maps"), care must be taken to include
|
||||
the correct one.
|
||||
|
||||
When a new generation of boards were introduced under the name "Juno", these
|
||||
shared to many common characteristics with the Versatile Express that the
|
||||
"arm,vexpress" compatible was retained in the root node, and these are
|
||||
included in this binding schema as well.
|
||||
|
||||
The root node indicates the CPU SoC on the core tile, and this
|
||||
is a daughterboard to the main motherboard. The name used in the compatible
|
||||
string shall match the name given in the core tile's technical reference
|
||||
manual, followed by "arm,vexpress" as an additional compatible value. If
|
||||
further subvariants are released of the core tile, even more fine-granular
|
||||
compatible strings with up to three compatible strings are used.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
|
||||
in MPCore configuration in a test chip on the core tile. See ARM
|
||||
DUI 0448I. This was the first Versatile Express platform.
|
||||
items:
|
||||
- const: arm,vexpress,v2p-ca9
|
||||
- const: arm,vexpress
|
||||
- description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores
|
||||
in a test chip on the core tile. It is intended to evaluate NEON, FPU
|
||||
and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
|
||||
items:
|
||||
- const: arm,vexpress,v2p-ca5s
|
||||
- const: arm,vexpress
|
||||
- description: Coretile Express A15x2 (V2P-CA15) has 2 Cortex A15 CPU
|
||||
cores in a MPCore configuration in a test chip on the core tile. See
|
||||
ARM DUI 0604F.
|
||||
items:
|
||||
- const: arm,vexpress,v2p-ca15
|
||||
- const: arm,vexpress
|
||||
- description: CoreTile Express A15x4 (V2P-CA15, HBI-0237A) has 4 Cortex
|
||||
A15 CPU cores in a test chip on the core tile. This is the first test
|
||||
chip called "TC1".
|
||||
items:
|
||||
- const: arm,vexpress,v2p-ca15,tc1
|
||||
- const: arm,vexpress,v2p-ca15
|
||||
- const: arm,vexpress
|
||||
- description: Coretile Express A15x2 A7x3 (V2P-CA15_A7) has 2 Cortex A15
|
||||
CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
|
||||
in a test chip on the core tile. See ARM DDI 0503I.
|
||||
items:
|
||||
- const: arm,vexpress,v2p-ca15_a7
|
||||
- const: arm,vexpress
|
||||
- description: LogicTile Express 20MG (V2F-1XV7) has 2 Cortex A53 CPU
|
||||
cores in a test chip on the core tile. See ARM DDI 0498D.
|
||||
items:
|
||||
- const: arm,vexpress,v2f-1xv7,ca53x2
|
||||
- const: arm,vexpress,v2f-1xv7
|
||||
- const: arm,vexpress
|
||||
- description: Arm Versatile Express Juno "r0" (the first Juno board,
|
||||
V2M-Juno) was introduced as a vehicle for evaluating big.LITTLE on
|
||||
AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53
|
||||
cores in a big.LITTLE configuration. It also features the MALI T624
|
||||
GPU. See ARM document 100113_0000_07_en.
|
||||
items:
|
||||
- const: arm,juno
|
||||
- const: arm,vexpress
|
||||
- description: Arm Versatile Express Juno r1 Development Platform
|
||||
(V2M-Juno r1) was introduced mainly aimed at development of PCIe
|
||||
based systems. Juno r1 also has support for AXI masters placed on
|
||||
the TLX connectors to join the coherency domain. Otherwise it is the
|
||||
same configuration as Juno r0. See ARM document 100122_0100_06_en.
|
||||
items:
|
||||
- const: arm,juno-r1
|
||||
- const: arm,juno
|
||||
- const: arm,vexpress
|
||||
- description: Arm Versatile Express Juno r2 Development Platform
|
||||
(V2M-Juno r2). It has the same feature set as Juno r0 and r1. See
|
||||
ARM document 100114_0200_04_en.
|
||||
items:
|
||||
- const: arm,juno-r2
|
||||
- const: arm,juno
|
||||
- const: arm,vexpress
|
||||
- description: Arm AEMv8a Versatile Express Real-Time System Model
|
||||
(VE RTSM) is a programmers view of the Versatile Express with Arm
|
||||
v8A hardware. See ARM DUI 0575D.
|
||||
items:
|
||||
- const: arm,rtsm_ve,aemv8a
|
||||
- const: arm,vexpress
|
||||
- description: Arm FVP (Fixed Virtual Platform) base model revision C
|
||||
See ARM Document 100964_1190_00_en.
|
||||
items:
|
||||
- const: arm,fvp-base-revc
|
||||
- const: arm,vexpress
|
||||
- description: Arm Foundation model for Aarch64
|
||||
items:
|
||||
- const: arm,foundation-aarch64
|
||||
- const: arm,vexpress
|
||||
|
||||
arm,vexpress,position:
|
||||
description: When daughterboards are stacked on one site, their position
|
||||
in the stack be be described this attribute.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
|
||||
arm,vexpress,dcc:
|
||||
description: When describing tiles consisting of more than one DCC, its
|
||||
number can be specified with this attribute.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
|
||||
patternProperties:
|
||||
"^bus@[0-9a-f]+$":
|
||||
description: Static Memory Bus (SMB) node, if this exists it describes
|
||||
the connection between the motherboard and any tiles. Sometimes the
|
||||
compatible is placed directly under this node, sometimes it is placed
|
||||
in a subnode named "motherboard-bus". Sometimes the compatible includes
|
||||
"arm,vexpress,v2?-p1" sometimes (on software models) is is just
|
||||
"simple-bus". If the compatible is placed in the "motherboard-bus" node,
|
||||
it is stricter and always has two compatibles.
|
||||
type: object
|
||||
$ref: /schemas/simple-bus.yaml
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- arm,vexpress,v2m-p1
|
||||
- arm,vexpress,v2p-p1
|
||||
- const: simple-bus
|
||||
- const: simple-bus
|
||||
|
||||
patternProperties:
|
||||
'^motherboard-bus@':
|
||||
type: object
|
||||
description: The motherboard description provides a single "motherboard"
|
||||
node using 2 address cells corresponding to the Static Memory Bus
|
||||
used between the motherboard and the tile. The first cell defines the
|
||||
Chip Select (CS) line number, the second cell address offset within
|
||||
the CS. All interrupt lines between the motherboard and the tile
|
||||
are active high and are described using single cell.
|
||||
properties:
|
||||
"#address-cells":
|
||||
const: 2
|
||||
"#size-cells":
|
||||
const: 1
|
||||
ranges: true
|
||||
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- arm,vexpress,v2m-p1
|
||||
- arm,vexpress,v2p-p1
|
||||
- const: simple-bus
|
||||
arm,v2m-memory-map:
|
||||
description: This describes the memory map type.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum:
|
||||
- rs1
|
||||
- rs2
|
||||
|
||||
arm,hbi:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: This indicates the ARM HBI (Hardware Board ID), this is
|
||||
ARM's unique board model ID, visible on the PCB's silkscreen.
|
||||
|
||||
arm,vexpress,site:
|
||||
description: As Versatile Express can be configured in number of physically
|
||||
different setups, the device tree should describe platform topology.
|
||||
For this reason the root node and main motherboard node must define this
|
||||
property, describing the physical location of the children nodes.
|
||||
0 means motherboard site, while 1 and 2 are daughterboard sites, and
|
||||
0xf means "sisterboard" which is the site containing the main CPU tile.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties:
|
||||
type: object
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- arm,vexpress,v2p-ca9
|
||||
- arm,vexpress,v2p-ca5s
|
||||
- arm,vexpress,v2p-ca15
|
||||
- arm,vexpress,v2p-ca15_a7
|
||||
- arm,vexpress,v2f-1xv7,ca53x2
|
||||
then:
|
||||
required:
|
||||
- arm,hbi
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
37
Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml
Normal file
37
Documentation/devicetree/bindings/arm/aspeed/aspeed,sbc.yaml
Normal file
@@ -0,0 +1,37 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
|
||||
# Copyright 2021 Joel Stanley, IBM Corp.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/aspeed/aspeed,sbc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ASPEED Secure Boot Controller
|
||||
|
||||
maintainers:
|
||||
- Joel Stanley <joel@jms.id.au>
|
||||
- Andrew Jeffery <andrew@aj.id.au>
|
||||
|
||||
description: |
|
||||
The ASPEED SoCs have a register bank for interacting with the secure boot
|
||||
controller.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: aspeed,ast2600-sbc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sbc: secure-boot-controller@1e6f2000 {
|
||||
compatible = "aspeed,ast2600-sbc";
|
||||
reg = <0x1e6f2000 0x1000>;
|
||||
};
|
||||
94
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
Normal file
94
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml
Normal file
@@ -0,0 +1,94 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/aspeed/aspeed.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Aspeed SoC based boards
|
||||
|
||||
maintainers:
|
||||
- Joel Stanley <joel@jms.id.au>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: AST2400 based boards
|
||||
items:
|
||||
- enum:
|
||||
- delta,ahe50dc-bmc
|
||||
- facebook,galaxy100-bmc
|
||||
- facebook,wedge100-bmc
|
||||
- facebook,wedge40-bmc
|
||||
- microsoft,olympus-bmc
|
||||
- quanta,q71l-bmc
|
||||
- tyan,palmetto-bmc
|
||||
- yadro,vesnin-bmc
|
||||
- const: aspeed,ast2400
|
||||
|
||||
- description: AST2500 based boards
|
||||
items:
|
||||
- enum:
|
||||
- amd,daytonax-bmc
|
||||
- amd,ethanolx-bmc
|
||||
- ampere,mtjade-bmc
|
||||
- aspeed,ast2500-evb
|
||||
- asrock,e3c246d4i-bmc
|
||||
- asrock,romed8hm3-bmc
|
||||
- bytedance,g220a-bmc
|
||||
- facebook,cmm-bmc
|
||||
- facebook,minipack-bmc
|
||||
- facebook,tiogapass-bmc
|
||||
- facebook,yamp-bmc
|
||||
- facebook,yosemitev2-bmc
|
||||
- facebook,wedge400-bmc
|
||||
- hxt,stardragon4800-rep2-bmc
|
||||
- ibm,mihawk-bmc
|
||||
- ibm,mowgli-bmc
|
||||
- ibm,romulus-bmc
|
||||
- ibm,swift-bmc
|
||||
- ibm,witherspoon-bmc
|
||||
- ingrasys,zaius-bmc
|
||||
- inspur,fp5280g2-bmc
|
||||
- inspur,nf5280m6-bmc
|
||||
- inspur,on5263m5-bmc
|
||||
- intel,s2600wf-bmc
|
||||
- inventec,lanyang-bmc
|
||||
- lenovo,hr630-bmc
|
||||
- lenovo,hr855xg2-bmc
|
||||
- portwell,neptune-bmc
|
||||
- qcom,centriq2400-rep-bmc
|
||||
- supermicro,x11spi-bmc
|
||||
- tyan,s7106-bmc
|
||||
- tyan,s8036-bmc
|
||||
- yadro,nicole-bmc
|
||||
- yadro,vegman-n110-bmc
|
||||
- yadro,vegman-rx20-bmc
|
||||
- yadro,vegman-sx20-bmc
|
||||
- const: aspeed,ast2500
|
||||
|
||||
- description: AST2600 based boards
|
||||
items:
|
||||
- enum:
|
||||
- ampere,mtmitchell-bmc
|
||||
- aspeed,ast2600-evb
|
||||
- aspeed,ast2600-evb-a1
|
||||
- facebook,bletchley-bmc
|
||||
- facebook,cloudripper-bmc
|
||||
- facebook,elbert-bmc
|
||||
- facebook,fuji-bmc
|
||||
- facebook,greatlakes-bmc
|
||||
- facebook,yosemite4-bmc
|
||||
- ibm,everest-bmc
|
||||
- ibm,rainier-bmc
|
||||
- ibm,tacoma-bmc
|
||||
- inventec,starscream-bmc
|
||||
- inventec,transformer-bmc
|
||||
- jabil,rbp-bmc
|
||||
- qcom,dc-scm-v1-bmc
|
||||
- quanta,s6q-bmc
|
||||
- ufispace,ncplite-bmc
|
||||
- const: aspeed,ast2600
|
||||
|
||||
additionalProperties: true
|
||||
239
Documentation/devicetree/bindings/arm/atmel-at91.yaml
Normal file
239
Documentation/devicetree/bindings/arm/atmel-at91.yaml
Normal file
@@ -0,0 +1,239 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/atmel-at91.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Atmel AT91.
|
||||
|
||||
maintainers:
|
||||
- Alexandre Belloni <alexandre.belloni@bootlin.com>
|
||||
- Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
- Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
|
||||
description: |
|
||||
Boards with a SoC of the Atmel AT91 or SMART family shall have the following
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: atmel,at91rm9200
|
||||
- items:
|
||||
- enum:
|
||||
- olimex,sam9-l9260
|
||||
- enum:
|
||||
- atmel,at91sam9260
|
||||
- atmel,at91sam9261
|
||||
- atmel,at91sam9263
|
||||
- atmel,at91sam9g20
|
||||
- atmel,at91sam9g45
|
||||
- atmel,at91sam9n12
|
||||
- atmel,at91sam9rl
|
||||
- atmel,at91sam9xe
|
||||
- atmel,at91sam9x60
|
||||
- const: atmel,at91sam9
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- overkiz,kizboxmini-base # Overkiz kizbox Mini Base Board
|
||||
- overkiz,kizboxmini-mb # Overkiz kizbox Mini Mother Board
|
||||
- overkiz,kizboxmini-rd # Overkiz kizbox Mini RailDIN
|
||||
- overkiz,smartkiz # Overkiz SmartKiz Board
|
||||
- gardena,smart-gateway-at91sam # GARDENA smart Gateway (Article No. 19000)
|
||||
- const: atmel,at91sam9g25
|
||||
- const: atmel,at91sam9x5
|
||||
- const: atmel,at91sam9
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- atmel,at91sam9g15
|
||||
- atmel,at91sam9g25
|
||||
- atmel,at91sam9g35
|
||||
- atmel,at91sam9x25
|
||||
- atmel,at91sam9x35
|
||||
- const: atmel,at91sam9x5
|
||||
- const: atmel,at91sam9
|
||||
|
||||
- description: Overkiz kizbox3 board
|
||||
items:
|
||||
- const: overkiz,kizbox3-hs
|
||||
- const: atmel,sama5d27
|
||||
- const: atmel,sama5d2
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: Microchip SAMA5D27 WLSOM1
|
||||
items:
|
||||
- const: microchip,sama5d27-wlsom1
|
||||
- const: atmel,sama5d27
|
||||
- const: atmel,sama5d2
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: Microchip SAMA5D27 WLSOM1 Evaluation Kit
|
||||
items:
|
||||
- const: microchip,sama5d27-wlsom1-ek
|
||||
- const: microchip,sama5d27-wlsom1
|
||||
- const: atmel,sama5d27
|
||||
- const: atmel,sama5d2
|
||||
- const: atmel,sama5
|
||||
|
||||
- items:
|
||||
- const: atmel,sama5d27
|
||||
- const: atmel,sama5d2
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: Microchip SAMA5D2 Industrial Connectivity Platform
|
||||
items:
|
||||
- const: microchip,sama5d2-icp
|
||||
- const: atmel,sama5d27
|
||||
- const: atmel,sama5d2
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: Microchip SAM9X60 Evaluation Boards
|
||||
items:
|
||||
- enum:
|
||||
- microchip,sam9x60ek
|
||||
- microchip,sam9x60-curiosity
|
||||
- const: microchip,sam9x60
|
||||
- const: atmel,at91sam9
|
||||
|
||||
- description: Nattis v2 board with Natte v2 power board
|
||||
items:
|
||||
- const: axentia,nattis-2
|
||||
- const: axentia,natte-2
|
||||
- const: axentia,linea
|
||||
- const: atmel,sama5d31
|
||||
- const: atmel,sama5d3
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: TSE-850 v3 board
|
||||
items:
|
||||
- const: axentia,tse850v3
|
||||
- const: axentia,linea
|
||||
- const: atmel,sama5d31
|
||||
- const: atmel,sama5d3
|
||||
- const: atmel,sama5
|
||||
|
||||
- items:
|
||||
- const: axentia,linea
|
||||
- const: atmel,sama5d31
|
||||
- const: atmel,sama5d3
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: Overkiz kizbox2 board with two heads
|
||||
items:
|
||||
- const: overkiz,kizbox2-2
|
||||
- const: atmel,sama5d31
|
||||
- const: atmel,sama5d3
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: Microchip SAMA5D3 Ethernet Development System Board
|
||||
items:
|
||||
- const: microchip,sama5d3-eds
|
||||
- const: atmel,sama5d36
|
||||
- const: atmel,sama5d3
|
||||
- const: atmel,sama5
|
||||
|
||||
- description: CalAmp LMU5000 board
|
||||
items:
|
||||
- const: calamp,lmu5000
|
||||
- const: atmel,at91sam9g20
|
||||
- const: atmel,at91sam9
|
||||
|
||||
- description: Exegin Q5xR5 board
|
||||
items:
|
||||
- const: exegin,q5xr5
|
||||
- const: atmel,at91sam9g20
|
||||
- const: atmel,at91sam9
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- atmel,sama5d31
|
||||
- atmel,sama5d33
|
||||
- atmel,sama5d34
|
||||
- atmel,sama5d35
|
||||
- atmel,sama5d36
|
||||
- const: atmel,sama5d3
|
||||
- const: atmel,sama5
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- atmel,sama5d41
|
||||
- atmel,sama5d42
|
||||
- atmel,sama5d43
|
||||
- atmel,sama5d44
|
||||
- const: atmel,sama5d4
|
||||
- const: atmel,sama5
|
||||
|
||||
- items:
|
||||
- const: microchip,sama7g5ek # SAMA7G5 Evaluation Kit
|
||||
- const: microchip,sama7g5
|
||||
- const: microchip,sama7
|
||||
|
||||
- description: Microchip LAN9662 Evaluation Boards.
|
||||
items:
|
||||
- enum:
|
||||
- microchip,lan9662-pcb8291
|
||||
- microchip,lan9662-pcb8309
|
||||
- const: microchip,lan9662
|
||||
- const: microchip,lan966
|
||||
|
||||
- description: Microchip LAN9668 PCB8290 Evaluation Board.
|
||||
items:
|
||||
- const: microchip,lan9668-pcb8290
|
||||
- const: microchip,lan9668
|
||||
- const: microchip,lan966
|
||||
|
||||
- description: Kontron KSwitch D10 MMT series
|
||||
items:
|
||||
- enum:
|
||||
- kontron,kswitch-d10-mmt-8g
|
||||
- kontron,kswitch-d10-mmt-6g-2gs
|
||||
- const: kontron,s1921
|
||||
- const: microchip,lan9668
|
||||
- const: microchip,lan966
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- atmel,sams70j19
|
||||
- atmel,sams70j20
|
||||
- atmel,sams70j21
|
||||
- atmel,sams70n19
|
||||
- atmel,sams70n20
|
||||
- atmel,sams70n21
|
||||
- atmel,sams70q19
|
||||
- atmel,sams70q20
|
||||
- atmel,sams70q21
|
||||
- const: atmel,sams70
|
||||
- const: atmel,samv7
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- atmel,samv70j19
|
||||
- atmel,samv70j20
|
||||
- atmel,samv70n19
|
||||
- atmel,samv70n20
|
||||
- atmel,samv70q19
|
||||
- atmel,samv70q20
|
||||
- const: atmel,samv70
|
||||
- const: atmel,samv7
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- atmel,samv71j19
|
||||
- atmel,samv71j20
|
||||
- atmel,samv71j21
|
||||
- atmel,samv71n19
|
||||
- atmel,samv71n20
|
||||
- atmel,samv71n21
|
||||
- atmel,samv71q19
|
||||
- atmel,samv71q20
|
||||
- atmel,samv71q21
|
||||
- const: atmel,samv71
|
||||
- const: atmel,samv7
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user