mmc: Add quirk to disable DDR50 tuning
[ Upstream commit 9510b38dc0ba358c93cbf5ee7c28820afb85937b ] Adds the MMC_QUIRK_NO_UHS_DDR50_TUNING quirk and updates mmc_execute_tuning() to return 0 if that quirk is set. This fixes an issue on certain Swissbit SD cards that do not support DDR50 tuning where tuning requests caused I/O errors to be thrown. Signed-off-by: Erick Shepherd <erick.shepherd@ni.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20250331221337.1414534-1-erick.shepherd@ni.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
74f765e85d
commit
58cf7ba36b
@@ -86,6 +86,7 @@ struct mmc_fixup {
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#define CID_MANFID_MICRON 0x13
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#define CID_MANFID_SAMSUNG 0x15
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#define CID_MANFID_APACER 0x27
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#define CID_MANFID_SWISSBIT 0x5D
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#define CID_MANFID_KINGSTON 0x70
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#define CID_MANFID_HYNIX 0x90
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#define CID_MANFID_KINGSTON_SD 0x9F
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@@ -291,4 +292,9 @@ static inline int mmc_card_broken_sd_poweroff_notify(const struct mmc_card *c)
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return c->quirks & MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY;
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}
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static inline int mmc_card_no_uhs_ddr50_tuning(const struct mmc_card *c)
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{
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return c->quirks & MMC_QUIRK_NO_UHS_DDR50_TUNING;
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}
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#endif
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@@ -34,6 +34,16 @@ static const struct mmc_fixup __maybe_unused mmc_sd_fixups[] = {
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MMC_QUIRK_BROKEN_SD_CACHE | MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY,
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EXT_CSD_REV_ANY),
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/*
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* Swissbit series S46-u cards throw I/O errors during tuning requests
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* after the initial tuning request expectedly times out. This has
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* only been observed on cards manufactured on 01/2019 that are using
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* Bay Trail host controllers.
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*/
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_FIXUP_EXT("0016G", CID_MANFID_SWISSBIT, 0x5342, 2019, 1,
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0, -1ull, SDIO_ANY_ID, SDIO_ANY_ID, add_quirk_sd,
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MMC_QUIRK_NO_UHS_DDR50_TUNING, EXT_CSD_REV_ANY),
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END_FIXUP
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};
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@@ -618,6 +618,29 @@ static int sd_set_current_limit(struct mmc_card *card, u8 *status)
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return 0;
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}
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/*
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* Determine if the card should tune or not.
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*/
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static bool mmc_sd_use_tuning(struct mmc_card *card)
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{
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/*
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* SPI mode doesn't define CMD19 and tuning is only valid for SDR50 and
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* SDR104 mode SD-cards. Note that tuning is mandatory for SDR104.
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*/
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if (mmc_host_is_spi(card->host))
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return false;
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switch (card->host->ios.timing) {
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case MMC_TIMING_UHS_SDR50:
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case MMC_TIMING_UHS_SDR104:
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return true;
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case MMC_TIMING_UHS_DDR50:
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return !mmc_card_no_uhs_ddr50_tuning(card);
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}
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return false;
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}
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/*
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* UHS-I specific initialization procedure
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*/
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@@ -661,14 +684,7 @@ static int mmc_sd_init_uhs_card(struct mmc_card *card)
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if (err)
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goto out;
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/*
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* SPI mode doesn't define CMD19 and tuning is only valid for SDR50 and
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* SDR104 mode SD-cards. Note that tuning is mandatory for SDR104.
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*/
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if (!mmc_host_is_spi(card->host) &&
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(card->host->ios.timing == MMC_TIMING_UHS_SDR50 ||
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card->host->ios.timing == MMC_TIMING_UHS_DDR50 ||
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card->host->ios.timing == MMC_TIMING_UHS_SDR104)) {
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if (mmc_sd_use_tuning(card)) {
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err = mmc_execute_tuning(card);
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/*
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@@ -297,6 +297,7 @@ struct mmc_card {
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#define MMC_QUIRK_BROKEN_SD_CACHE (1<<15) /* Disable broken SD cache support */
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#define MMC_QUIRK_BROKEN_CACHE_FLUSH (1<<16) /* Don't flush cache until the write has occurred */
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#define MMC_QUIRK_BROKEN_SD_POWEROFF_NOTIFY (1<<17) /* Disable broken SD poweroff notify support */
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#define MMC_QUIRK_NO_UHS_DDR50_TUNING (1<<18) /* Disable DDR50 tuning */
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bool written_flag; /* Indicates eMMC has been written since power on */
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bool reenable_cmdq; /* Re-enable Command Queue */
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