a1131dac0f
git-subtree-dir: qcom/wlan git-subtree-mainline:cc9d84727agit-subtree-split:551f3bbb6a
153 lines
4.2 KiB
Plaintext
153 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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&tlmm {
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icnss_sw_ctrl: icnss_sw_ctrl {
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mux {
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pins = "gpio81";
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function = "wcn_sw_ctrl";
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};
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};
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};
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&soc {
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qcom,smp2p-wpss {
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smp2p_wlan_1_in: qcom,smp2p-wlan-1-in {
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qcom,entry-name = "wlan";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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smp2p_wlan_1_out: qcom,smp2p-wlan-1-out {
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qcom,entry-name = "wlan";
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#qcom,smem-state-cells = <1>;
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};
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smp2p_wlan_2_in: qcom,smp2p-wlan-2-in {
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qcom,entry-name = "wlan_soc_wake";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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smp2p_wlan_2_out: qcom,smp2p-wlan-2-out {
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qcom,entry-name = "wlan_soc_wake";
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#qcom,smem-state-cells = <1>;
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};
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smp2p_wlan_3_out: qcom,smp2p-wlan-3-out {
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qcom,entry-name = "wlan_ep_power_save";
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#qcom,smem-state-cells = <1>;
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};
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};
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icnss2: qcom,wcn6750 {
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compatible = "qcom,wcn6750";
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reg = <0x17110040 0x0>,
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<0xc0000000 0x10000>;
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reg-names = "msi_addr", "smmu_iova_ipa";
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qcom,rproc-handle = <&wpss_pas>;
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iommus = <&apps_smmu 0x1480 0x1>;
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wlan-en-gpio = <35>;
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host-sol-gpio = <33>;
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dev-sol-gpio = <32>;
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sw-ctrl-gpio = <81>;
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/* List of GPIOs to be setup for interrupt wakeup capable */
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mpm_wake_set_gpios = <81>;
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pinctrl-names = "sw_ctrl";
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pinctrl-0 = <&icnss_sw_ctrl>;
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interrupts = <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 769 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 770 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 771 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 773 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 774 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 775 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 776 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 777 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 778 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 779 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 780 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 781 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 782 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 783 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 784 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 785 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 786 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 787 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 788 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 789 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 790 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 791 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 792 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 793 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 794 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 796 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 797 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 798 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 799 IRQ_TYPE_EDGE_RISING>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-faults = "stall-disable", "HUPCF", "non-fatal";
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qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>;
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qcom,iommu-geometry = <0xb0000000 0x10010000>;
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dma-coherent;
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pin-ctrl-support;
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qcom,fw-prefix;
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qcom,wlan;
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tsens = "sys-therm-3";
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wcn-hw-version = "qca6750";
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qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
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vdd-cx-mx-supply = <&S3B>;
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qcom,vdd-cx-mx-config = <920000 1040000 0 0 0>;
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vdd-1.8-xo-supply = <&S1B>;
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qcom,vdd-1.8-xo-config = <1856000 2040000 0 0 0>;
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vdd-1.3-rfa-supply = <&S2B>;
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qcom,vdd-1.3-rfa-config = <1256000 1408000 0 0 0>;
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vdd-1.8-io-supply = <&L11B>;
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qcom,vdd-1.8-io-config = <1800000 1800000 0 0 0>;
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qcom,smem-states = <&smp2p_wlan_1_out 0>,
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<&smp2p_wlan_2_out 0>,
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<&smp2p_wlan_3_out 0>;
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qcom,smem-state-names = "wlan-smp2p-out",
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"wlan-soc-wake-smp2p-out",
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"wlan-ep-powersave-smp2p-out";
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qcom,qmp = <&aoss_qmp>;
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qcom,vreg_ol_cpr ="s3b";
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icnss_cdev_apss: icnss_cdev1 {
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#cooling-cells = <2>;
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};
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icnss_cdev_wpss: icnss_cdev2 {
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#cooling-cells = <2>;
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};
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icnss_cdev_bw: icnss_cdev3 {
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#cooling-cells = <2>;
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};
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qcom,smp2p_map_wlan_1_in {
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interrupts-extended = <&smp2p_wlan_1_in 0 0>,
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<&smp2p_wlan_1_in 1 0>;
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interrupt-names = "qcom,smp2p-force-fatal-error",
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"qcom,smp2p-early-crash-ind";
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};
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qcom,smp2p_map_wlan_2_in {
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interrupts-extended = <&smp2p_wlan_2_in 0 0>;
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interrupt-names = "qcom,smp2p-soc-wake-ack";
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};
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};
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};
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