Jigyanshu Mani ed005ef065 ARM: dts: msm: Define max no.of XHCI interrupters for ravelin ...

DWC3 host and XHCI plat now communicates the maximum number
of interrupters the XHCI HCD will allocate. Since platforms
only require a limited number of interrupters (i.e. 3) make
sure XHCI doesn't allocate more than is required.

Change-Id: I9e8592c8f62562f44c760571ac1505ab80b05fc6
Signed-off-by: Jigyanshu Mani <quic_jmani@quicinc.com>

2024-10-01 15:14:27 +05:30

11 KiB

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