Prakash Yadachi e0529a17d7 ARM: dts: msm: Add interconnect-names for Ravelin ...

Add interconnect-names qup-core,qup-config and qup-memory to all qupv3
nodes.

Change-Id: I6cbed2a84fcd1ae7df96253121fc2dc735110b34
Signed-off-by: Prakash Yadachi <quic_pyadachi@quicinc.com>

2024-07-15 23:55:01 -07:00

bindings

Merge "dt-bindings: power: supply: Add DT bindings for QBG"

2024-06-24 08:06:42 -07:00

qcom

ARM: dts: msm: Add interconnect-names for Ravelin

2024-07-15 23:55:01 -07:00

BUILD.bazel

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

Makefile

ARM: dts: msm: Add initial device trees for Sun SoC

2023-04-03 11:54:34 -07:00

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